Subject: RE: [IBIS-Users] Using the '.ibis' (note the dot) in HSPICE
From: Ingraham, Andrew (Andrew.Ingraham@compaq.com)
Date: Wed Apr 10 2002 - 07:03:14 PDT
I was going to comment on this too, but I'm confused exactly what he's doing.
There's no inherent connection between an input buffer and an output buffer. IBIS doesn't model whole devices, such as a complete gate. It models just the input alone, as seen from outside the chip; or just the output alone; but there is no connection from an input (of one model) to an output (of the same or a different model). Signals do not propagate through IBIS models.
That being said, HSPICE's implementation does use buffer elements through which signals effectively propagate with zero delay; but one of those signals is pure binary.
For example, if you model an input buffer ("buffer=input"), the signal that the simulation applies to the "nd_in" node (which represents the device's input pad) does appear, in binary voltage form, at the "nd_out_of_in" node. Merely as a convenience to you. This signal has no physical meaning whatsoever.
For the output buffer ("buffer=output"), *you* need to drive the "nd_in" pin, with a binary voltage source. Again, the signal has no physical meaning. It is just a way to get the buffer element to do something.
As for the node names, the names given in the HSPICE manual to represent syntax, such as "nd_in", are just place-holders for the names you use. "nd_in" itself has no special meaning to HSPICE. Recall the syntax for resistors, which is:
Rxxx n1 n2 ...
Nodes "n1" and "n2" are place-holders.
Your IBIS model could look like:
BTTL 1 2 3 4 5 6 ...
or:
B_xyz VccPad GndPad SigPad BinSig ...
If you instantiate more than one IBIS device, make sure not to use the same node names on all of them, unless you really wanted them all shorted together!
Andy
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