Subject: RE: [IBIS-Users] Measuring Ccomp in HSPICE
From: Peters, Stephen (stephen.peters@intel.com)
Date: Wed Apr 17 2002 - 08:58:22 PDT
Hello Tim:
There are a number of methods, but whatever method is chosen recognize
that C_comp of an output buffer is a function of the pad voltage and
transistor bias. I.e. just extracting the min and max pad capacitance from
a placed and routed buffer design will not be as accurate as doing an in
circuit test. One method I've used for tri-stateable buffers and input
buffers is as follows:
1. In your simulation environment, apply power to the buffer and set the
controls so that the output is in a high impedance state.
2. Thru a series resistor, connect a pulse source to the buffers input or
output node.
3. apply a very fast (<5ps rising edge) step to the resistor. Amplitude of
the step should be close to VCC. Observe the RC waveform at the output or
input node of the buffer, and calculate the C_comp value from the standard
RC time constant equation.
Regards,
Stephen
-----Original Message-----
From: Timothy Coyle [mailto:Timothy.Coyle@nsc.com]
Sent: Friday, April 05, 2002 1:32 PM
To: ibis-users@server.eda.org
Subject: [IBIS-Users] Measuring Ccomp in HSPICE
Hello,
I'm looking for a way to obtain ccomp for inputs/outputs in HSPICE for IBIS.
I would like to be able to get ccomp min and max values from
simulation.
Thanks,
Tim
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