Subject: [IBIS-Users] load capacitor
From: erik.van.der.ven@philips.com
Date: Tue Aug 26 2003 - 23:48:26 PDT
Hello IBIS users,
I have made a model of a differential LVDS output buffer. When I simulate
my IBIS model with a 100 Ohm load resistor, differentially connected, the
results are very close to my circuit simulations with Spectre. The V-T
curves and I-V match very well, I do not get any warnings from the IBIS
parser. When I connect 2pF load capacitors between the outputs and ground
the differnce with the Spectre simulation becomes very big. The output
signals in Spectre look very well and smooth. THe edges are less steep and
look perfect. When I simulate the IBIS model I see significant ringing.
The falling edge drop till 2/3 of the amplitude and then there is
horizontal step (looks a bit like an overshoot or ringing) and then it
continues falling again. The relative maximum error (calculated with Ack)
is about 30% with respect to the amplitude.
How can this big difference be explained? What can I do to improve my
model, if possible?
I don't know if it is relevant but I did my IBIS simulation with
Hyperlynx.
With kind regards,
Erik.
Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334
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