Hi,
I want to clarify something in general about IBIS
modeling; As a behavioral model, it has certain domain
which will work in a proper way inside it. Far a way from
this domain we should not expect much. But, in fact a lot
of model work very good even far from this domain.
What is this domain anyway, It is around the load
resistance in the v-t data which represent the
characteristic impedance of the lines.
Also, I want to clarify other thing which I did it long
time ago: If you put the same resistive load you used in
the V-T data then you should have the same waveforms
regardless of the C-comp value. The reason for that is the
C_comp value along with V-T data are used to calculate the
current multipliers of both pullup and pulldown curves. If
you put the same resistive load you simply make the
inverse operation and you should get the same wave forms
again.
You seem to have either model problem or your buffer has
different C-comp for the pullup and pulldown cases which
is something I?ve experienced before.
Let me now comment on your observation:
1- I think you have the correct pullup C_comp
2- In this case it seems that the pulldown capacitance is
much different from the C_comp you have.
3 & 4- You are off the operating domain but this should
not be the only reason. I have modeled hundreds of buffer
without having this problem while validating them in high
reflection environment much harder than just the
capacitance.
I hope that helps.
Hazem Hegazy
On Wed, 03 Mar 2004 14:13:54 +0530
Alok Rungta <a0875973@india.ti.com> wrote:
>
>Arpad,
>I am not sure if I understood things correctly .. First I
>would further clarify the experiment I did. I simulated a
>simple circuit with a buffer(ibis model) and a load. I
>tried two loads one resistive and other only cap. For
>each load condition I did 2 simulations with different
>ibis model files wherein in the 2nd simulation I just
>changed the c_comp(made it 10x the actual) value to see
>the effect of this parameter on the simulation. What I
>observe is:
>
>For Resistive load:(which is same as the load I used for
>generating the V-t curve in IBIS model):
>1>When there is a transition from low to high the
>waveform in both the cases(with actual ibis model of the
>buffer and with the one which has c_comp modified to 10x)
>is exactly same.
>2>But when there is a fall transition at output the
>waveforms are different for two cases.
>
>For Cap load:
>3> Waveform is different for the rise case in both the
>cases.
>4> Waveform is different for the fall cases in both the
>cases.
>
> From what I understand observation 2 can be explained
>because of
>current flowing in the buffer(outside in) and thus c-comp
>coming in picture.observation 1 => no role of c_comp in
>low to high transition because its inside out.
>Observation 4 can also be attributed to an outside in
>effect where c_comp comes into effect. But observation 3
>is what I am not very clear about .. One thing I deduce
>is that probably the v-t curves in the ibis model are
>generated for resistive loads so when it comes to
>resistive loads the simulator just uses IV curve and V-t
>curves in the model for interpolation and generates the
>curve(accuracy depending on difference between the loads
>you simuated for and load being used in the simuation).
>When using the cap. load it cannot possibly use this V-t
>curve in the same way because the load is of entirely
>different nature. So it has to look at the c-comp. How is
>it using the IV information in this case is not very
>clear to me ?
>Can you please throw some more light on this ...
>
>Thanks in Anticipation
>Alok Rungta
>
>Muranyi, Arpad wrote:
>
>>Alok,
>>
>>What you see is the correct behavior.
>>
>>The meaning of C_comp is die capacitance which includes
>>everything that is on the die, pad, metal, transistors,
>>etc... When you obtain waveforms (Vt curves), this
>>capacitance is in place, so the waveform includes its
>>effects. For this reason, IBIS simulators do not use
>>this capacitance to load the waveform that is in the
>>IBIS model, i.e. no matter what value you provide for
>>C_comp, the simulation waveforms will remain the same
>>(within reasonable limits) with the same resistive
>>load on the output. On the other hand, any external
>>capacitance connected to the output of the IBIS model
>>will change its simulation waveforms, because that
>>will act as a load to the buffer.
>>
>>On the other hand, the value of C_comp will have an
>>effect
>>the reflections which come to the buffer from the
>>outside.
>>
>>In summary, C_comp is invisible from the inside out, but
>>visible from the outside in.
>>
>>I hope this helps,
>>
>>Arpad Muranyi
>>Intel Corporation
>>=========================================================
>>
>>-----Original Message-----
>>From: owner-ibis-users@eda.org
>>[mailto:owner-ibis-users@eda.org]On
>>Behalf Of Alok Rungta
>>Sent: Tuesday, March 02, 2004 8:57 AM
>>To: ibis-users@eda.org
>>Subject: [IBIS-Users]Difference in rise-fall waveform due
>>to c_comp!!
>>
>>
>>Hello IBIS users,
>>
>>I am trying to understand how the simulation tool is
>>using the c_comp parameter in the ibis model. For the
>>same ibis model i just change the c_comp parameter and
>>resimulated to see if there are any differences in the
>>observed output voltage waveform. When using a cap as a
>>load I see differences in both the rise and the fall
>>transition .. but when using a pure resistive load I find
>>that both the models on simulation give the same rise
>>waveform but different fall waveforms. Is this the
>>expected behavior ?? Isnt c_comp supposed to be used
>>only in case of reflection ??
>>
>>Thanks in Anticipation
>>Alok Rungta
>>
>>
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Hazem Hegazy$IBIS modeling manager$Quality
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Received on Tue Mar 9 10:05:14 2004
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