RE: [IBIS-Users] IBIS models for the buffers having Feedback loops

Raghu,

Modeling feedback with conventional IBIS is not possible. You could
make "snapshot" models capturing certain "states" of the feedback,
but you can't model its dynamics. If you need to do that you should
look into using the VHDL-AMS or Verilog-AMS extensions of IBIS.

Arpad Muranyi
=====================================================================

-----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of RaghuNatha Reddy
Sent: Thursday, May 13, 2004 5:26 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] IBIS models for the buffers having Feedback loops

Hi IBIS Gurus,

I am creating an IBIS model for the LVDS unterminated buffer.
This buffer contains common-mode feed back loop. Because of
this feed back , I observed a dc voltage shift between IBIS and
Hspice waveforms. Can anybody suggest, how to incorporate
or compensate the common-mode feed back loop effect?

In general, how IBIS models can be created for the buffers having feed
back loop?

Thanks in advance.

Regards,
Raghu
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Received on Fri May 28 11:15:44 2004