RE: [IBIS-Users] Overshoot and Undershoot issue

Hello, YY,
 
1) What input signal did you use in simulation?  In particular, were the
voltage and the edge rate the same as the signal being used to test the
part?
 
2) How accuarate were the [GND Clamp] and {Power Clamp] tables in the IBIS
model? Was the current too high (perhaps caused by too low a value for RS in
the diode model in SPICE)?
 
3) Did the [GND Clamp] and {Power Clamp] tables in the IBIS model cover the
full range of -Vcc to +2Vcc?

Any of these could cause a discrepancy between test results and simulation.
There are many others, of course.
 
Regards,
Lynne

________________________________

	From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of lau yy
	Sent: Tuesday, August 16, 2005 12:59 AM
	To: ibis-users@eda.org
	Subject: [IBIS-Users] Overshoot and Undershoot issue
	
	
	Dear ALL, 
	 
	 
	Recently, my group member done some testing on the chip. And found
overshoot and undershoot in the Input pins. But this is not shown in the
IBIS model data.
	 
	Is it that mean the model that we built is not accurate? or there
were some other effect need to take in to account?
	 
	ANother question here : How do the model looks when there were
overshoot and undershoot? Can we know this by using IBISCHK? 
	 
	 
	Thanks
	 
	Rdgs
	yylau  
	 



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