Re: [IBIS] [IBIS-Users] pass-trans curves

From: Bob Ross <bob_at_.....>
Date: Thu Apr 27 2006 - 13:10:59 PDT
Fabio:

I will add that the IBIS format for series switch models documents
the allowed states shown in you logic block diagram so that
D connects either through S1 or through S2.

[Series Pin Mapping] will allow documentation of all connection
possibilities (with the function_table_group column for designating
those combinations which are in sync. with each other.

[Series Switch Groups] then captures the allowed cases for the
specific device.

In your case D through S1 or D though S2 could be documented
as two different states that are supported in the IBIS model.

In general, all cases allowed by the other logic could be
documented.  These include no through paths and both S1 and
S2 connected to D.

So the series switch model (with [Series MOSFET]) provides
full electrical and configurability information for the
multiplexer.  An input clamp at D can even be added.

However, you should not use the standard IBIS buffer
I-V/V-T methodology.

Bob

Tom Dagostino wrote:
> Fabio
> 
> This is definitely a case where the series model is the appropriate
> solution.
> 
> Tom Dagostino
> Teraspeed(R) Labs
> 13610 SW Harness Lane
> Beaverton, OR 97008
> 503-430-1065
> tom@teraspeed.com
> www.teraspeed.com
> 
> Teraspeed Consulting Group LLC
> 121 North River Drive
> Narragansett, RI 02882
> 401-284-1827
> 
> -----Original Message-----
> From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org]On
> Behalf Of Fabio BRINA
> Sent: Thursday, April 27, 2006 4:06 AM
> To: ibis-users; ibis
> Subject: [IBIS] [IBIS-Users] pass-trans curves
> 
> 
> 
> Hi  IBIS  expert,
> 
> I have to modelling a multiplexer with only
> one input D  and two  output S1, S2.
> the equivalent circuit is in the attachments.
> ( note that between  D and S1 there is no buffer
>   structure , but only  a pass-transistor, the same
>   between D and S2 ).
> 
> I have characterized  EN,  D , S1 , S2 as input model type
> (only clamp curves) and  S1  S2  are characterized
> through  [series Mosfet].
> Is this a correct and complete characterization ?
> 
> if  you think that S1 and S2 have to been associate to
> output model type, in which way I can extract pullup
> , pulldown , rising , falling curves, if I haven't got a typical
> cmos structure as in this case?
> 
> I hope that my exposition is clear!
> 
> thanks,
> Fabio
> 
> 

-- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Labs
121 North River Drive              13610 SW Harness Lane
Narragansett, RI 02882             Beaverton, OR 97008
401-284-1827                       503-430-1065
http://www.teraspeed.com           503-246-8048 Direct
bob@teraspeed.com

Teraspeed is a registered service mark of Teraspeed Consulting Group LLC

|------------------------------------------------------------------
|For help or to subscribe/unsubscribe, email majordomo@eda.org
|with just the appropriate command message(s) in the body:
|
|  help
|  subscribe   ibis       <optional e-mail address, if different>
|  subscribe   ibis-users <optional e-mail address, if different>
|  unsubscribe ibis       <optional e-mail address, if different>
|  unsubscribe ibis-users <optional e-mail address, if different>
|
|or email a written request to ibis-request@eda.org.
|
|IBIS reflector archives exist under:
|
|  http://www.eda.org/pub/ibis/email_archive/  Recent
|  http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993
Received on Thu Apr 27 13:09:53 2006

This archive was generated by hypermail 2.1.8 : Thu Apr 27 2006 - 13:10:37 PDT