Re: [IBIS-Users] Fwd: FW: ddr103_v.scs true differential buffer IBIS modelling

Arpad,

What is a true differential buffer?if there is no dc current between p
and n , shouldn't it be psuedo differential buffer? since there is
just cseries between p and n


Thanks
Shivani

On 10/15/14, Muranyi, Arpad <Arpad_Muranyi@mentor.com> wrote:
> Shivani,
>
> It is not unusual to see “no” current between the P and N
> pins of a differential buffer.  It all depends on how the
> internal circuit of the buffer is designed.
>
> Thanks,
>
> Arpad
> ==========================================================
>
> From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
> Of Shivani Sharma
> Sent: Wednesday, October 15, 2014 12:19 PM
> To: ibis-users@eda.org
> Subject: [IBIS-Users] Fwd: FW: ddr103_v.scs true differential buffer IBIS
> modelling
>
> Hi all
>
> I am trying to model true differential buffer  following the “Series model
> approach” at  http://www.vhdl.org/ibis/summits/oct03/muranyi.pdf. ).
> I am assuming that a differential buffer should have some sort of
> differential current that would flow from PADP to PADN when the two nodes
> are at different voltages.
>
> I am trying to sweep PADP and PADN voltages to see current between the two
> PADS. However. the currents I see are in nano-Amps indicating that there is
> almost no differential current. Current into PADN is almost independent of
> DC-voltage forced on PADP. Is this an expected behavior or am I missing
> something in this activity?
>
> DC sweep is applied on padn and padp is kept at different voltages (-1.2 to
> 2.4 in steps of 0.4V) .
>
> Regards
> Shivani
>
>
>
>
> Detailed snapshots shown here
>
>
> https://www.blogger.com/blogger.g?blogID=1357760498839013626#editor/target=post;postID=2986411014708903686;onPublishedMenu=posts;onClosedMenu=posts;postNum=0;src=postname
>
>
>
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