Subject: RE: [IBIS] Standard for BGA pin names in IBIS files
From: Angulo, John (john_angulo@mentorg.com)
Date: Tue Oct 15 2002 - 14:53:18 PDT
The following is posted on behalf of Mike Lamson at Texas Instruments. Please send all private replies to m-lamson@ti.com only.
----------
I think the issue of providing ground and power ports in the IBIS model
needs discussion here. The problem is that on certain kinds of packages
there is not a one to one correspondence between an input port and an output
port for a ground or power conection. It is readily accomplished in a
single layer package. This is not the case for a power or ground plane with
multiple ports. The ground and power paths must also be coupled to the
signal paths for proper simulation results. These things can all be
accomplished in SPICE. How does IBIS handle this?
Regards,
Mike Lamson
-----Original Message-----
From: Scott McMorrow [mailto:scott@teraspeed.com]
Sent: Tuesday, October 08, 2002 6:57 AM
To: Mike Ventham
Cc: ibis@eda.org
Subject: Re: [IBIS] Standard for BGA pin names in IBIS files
Mike,
I'm probably well qualified to comment on these issues, since I have
been working with and creating ibis models for 10 years. In addition, I
oversaw the research that went in to the SiQual paper, and I delivered
the paper at DesignCon back in February of this year.
>
> Is there a standard for BGA pin naming ?
\
no, each silicon vendor uses a different standard in naming BGA pins.
If you'd like to help set a standard, go sit on a JEDEC committee and
see if you can get them to converge on a standard for all forms of BGAs..
>
> The problem we have seen in doing simulations is that the layout
> library has used A2 A3 A4 etc. while the IBIS model creator has used
> A02 A03 r in some cases 0A02 0A03
The question is whether it is the model that is incorrect or the layout
library. Often the layout library is incorrect, as it does not follow
the manufacturers standard conventions for pin naming.
As for the leading zero, it is often used as an aid in sorting pins.
>
> This means when we try to match the pins up to connect the required
> IBIS model to the right pin (an automatic process in the Omega PLUS
> software) there is no pin name match and we have to edit the
> IBIS file to remove the leading/middle zeroes.
Correct. The question, again, is where does the error lie. Sometimes
it is the model naming convention. Sometimes in the layout. Sometimes
both diverge from the manufacturers part specifications.
>
> Also can I appeal to the IBIS file creators to include all pins
> of the component not just the I/Os. I have seen 100 pins components
> with 22 pins missing, grid arrays with only one power and ground pin
> when they
> have lots.
Generally power pins are not modeled correctly by manufacturers, or not
modeled at all, either in spice or in IBIS. Because the power pins are
not driven, they are often not modeled. And even if they are modeled,
they are most likely grossly incorrect. In my estimation, this is not a
huge issue, since power modeling opens up such an incredible can of
worms. We model only what is available. If an accurate model of the
power pin parasitics is not available, we do not model them. I count
this as a blessing, since one can come to the wrong conclusion with a
poorly constructed model of the power system on a package.
>
> If engineers have to spend time just getting the correct pins defined
> they just get annoyed that the model creators have not bothered
> putting the effort in. It's bad enough that some of the models require
> editing just to get them to make them useful (as described by Roy
> Leventhal and SiQual in their recent reviews of model quality).
If you have the right tools, the amount of time to correct these pin
issues are minor. These are nits, since the correct data exists in the
file and the pin list and names can be extracted from the cad data base
quite easily. The SiQual paper does not even consider this a problem.
What we were concerned with were models that were so poorly constructed
that they were entirely unusable and non repairable.
An article recently reported that the SiQual paper specified that 70
percent of models available on the web had errors. This is true, but is
a gross mischaracterization of the gist of the presentation that I gave.
However, more than half of these error were minor and easily
correctable. Should they have been corrected by the vendor?
Absolutely! Can they be easily corrected? Yes. It is the other half
of the models that I am most concerned with, (about 35% of the entire
model population) because these have serious problems that are non
correctable without re-extraction or measurement.
In the end, you get what you pay for. If suppliers and end users are
unwilling to pay for the cost of engineering good models, then you will
(pardon my language) get crap! You'll have some person just out of
college in the tech marketing department of a semiconductor company
performing spice to ibis conversions without any understanding of how
the models work and how they are used in real life simulation environments.
There are reliable ways to create good, robust and accurate IBIS models.
Silicon vendors, EDA vendors and users need to either develop the
expertise to accomplish this, or they need to out source the process to
someone who knows what they are doing. Currently in the industry there
are three independent companies that provide IBIS model engineering
services to the community. SiSoft, SiQual, and Teraspeed all provide
accurate and tested Hspice to IBIS model conversions. In addition,
Mentor provides Spice to IBIS model conversions to it's customers.
Teraspeed also provides high resolution measurement based IBIS models to
the industry. And Gigatest and TDA Systems provide package modeling
capabilities that can be used in the creation of IBIS package models.
The ability and expertise to create excellent IBIS models already exists
in the industry. What is lacking is the will to use that expertise by
all parties involved. About 7 years ago I recognized that IBIS modeling
was a professional problem in my business and a problem throughout the
industry. Rather than complaining, I took steps to do something about it.
best regards,
Scott
-- Scott McMorrow President Teraspeed Consulting Group LLC 2926 SE Yamhill St. Portland, OR 97214 (503) 239-5536 http://www.teraspeed.com http://www.teraspeed.com/modeling.html> > Thanks for your attention, > > Regards > > Mike > ________________________________________________________________ > | Mike Ventham - Vice-President Engineering, | > | Quantic EMC Inc. Headquarters | > | Croft House, Chilcompton, 191 Lombard Ave., Winnipeg,| > | Somerset, UK, BA3 4JA Manitoba, Canada R3B 0X1 | > | Tel: 44 (0)1761 232191 Tel: (204) 942 4000 | > | Fax: 44 (0)7974 141685 Fax: (204) 957 1158 | > | Mobile: 44 (0)7971 553260 | > | Email: ventham@quantic-emc.co.uk http://www.quantic-emc.com | > > > -----------------------------------------------------------------
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