Re: [IBIS] Time scale for VT plots on IBIS model.


Subject: Re: [IBIS] Time scale for VT plots on IBIS model.
From: Robert Haller (rhaller@sisoft.com)
Date: Thu Nov 14 2002 - 10:53:19 PST


Weston, Gerd
        I think that to many people keep SI simulation and timing separate. The
larger the disconnect between timing and SI the more problems that fall
in the cracks. I claim that timing and SI simulation should be
integrated. This can be accomplished without negative times in your VT
tables. As others have pointed out the negative time in VT tables would
probably cause issues in some tools.

regards,
bob

-- 
Robert J. Haller (rhaller@sisoft.com)
Principal Consultant
Signal Integrity Software Inc.
6 Clock Tower Place, Suite 250
Maynard, MA 01754
Phone: (978) 461-0449, ext 15

Beal, Weston wrote: > Gerd, > > While the IBIS specification does not explicitly prohibit time values less than 0, I'll bet that all the simulator vendors assumed that time is always positive. A model with negative times in the waveforms will most likely not work. > > If you want to do a full simulation of your clock tree then you'll need to use a timing analysis tool along with your SI tool. First, you must correctly specify the input thresholds, timing reference load, and corresponding device propagation delay of the clock buffer. Then you can simulate the net driving into the clock buffer, the clock buffer driving its net and use the interconnect delays in your timing analysis that includes the delay through the clock buffer. > > This buffer delay might be negative in some cases in order to correlate with the other simulations. Don't worry too much about negative delays of parts of the circuit. This is a possible and logical byproduct of the way we measure the sections of the overall circuit in different simulators. When you add up the component propagation delays with interconnect delays, then the sum should be positive. > > So, don't put negative times in your IBIS model. Use a timing analysis tool to augment the features of your SI tool. > > Regards, > Weston > > > -----Original Message----- > From: Baumann, Hans-Gerhard [mailto:HGBaumann@ti.com] > Sent: Wednesday, November 13, 2002 6:52 AM > To: 'ibis@eda.org' > Subject: [IBIS] Time scale for VT plots on IBIS model. > > > I am working to generate IBIS models for "zero delay buffers". The main > building block is a internal PLL. One differentiation between different > products is the phase relation between input and output. Different products > have different phase. > > I thought, in system simulation it might be interesting if the IBIS model > reflects the "locked phase" on its VT-tables. This however might require > that a negative start time is acceptable. I am not sure if this is OK with > current IBIS spec (working with version 3.2) or if there are plans to accept > this in future. > > Any recommendation on that ? > > Best Regards, > Gerd Baumann > --------------------------------------------------------------------------- > EUROPEAN HPA PRODUCT ENGINEERING > Texas Instruments, Haggertystr. 1, D-85356 Freising, Germany > E-mail: HGBaumann@ti.com > Phone: +49 8161 804341 > Fax: +49 8161 804909 > --------------------------------------------------------------------------- > ----------------------------------------------------------------- > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with the appropriate command message(s) in the body: > | > | help > | subscribe ibis <optional e-mail address, if different> > | subscribe ibis-users <optional e-mail address, if different> > | unsubscribe ibis <optional e-mail address, if different> > | unsubscribe ibis-users <optional e-mail address, if different> > | > |or email a request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > ----------------------------------------------------------------- > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with the appropriate command message(s) in the body: > | > | help > | subscribe ibis <optional e-mail address, if different> > | subscribe ibis-users <optional e-mail address, if different> > | unsubscribe ibis <optional e-mail address, if different> > | unsubscribe ibis-users <optional e-mail address, if different> > | > |or email a request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993

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