RE: [IBIS] Re: hspice vs IBIS model correlation at different capacitive loads

Andy,

I think he is saying that the oscillations happen
because of the feedback in the buffer is trying to
settle to a steady state condition.

If so, legacy IBIS can not model your buffer, since
there are no provisions for describing feedback.

Arpad
---------------------------------------------------

-----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Andrew Ingraham
Sent: Wednesday, January 04, 2006 8:49 AM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS] Re: hspice vs IBIS model correlation at different capacitive loads

Vinayak wrote:

> We have this case where in the *buffer has feedback* and with R-load we see
> V-T table with lot of ringing(oscillations) when pad has reached steady
> state.
> As this is no real situation for us as TL delay that buffer would see in
> real world is too small
> comparable to buffer tr/tf.

I think you are saying that you get these oscillations in your simulations
with the SPICE model that you used to create your IBIS model; and that you
see them only in simulations, not real devices.

If that is correct, then I'd investigate why the oscillations happen, and
fix it.  It isn't just because your buffer has feedback, because real
devices also have feedback and they don't oscillate.

SPICE is known to occasionally have numeric oscillations when it should be
steady-state, which can be fixed by changing to Method=Gear.

Oscillations can also happen because things are missing in the SPICE
simulation, device models are too ideal and lack resistance, etc.

If, on the other hand, your buffer really does oscillate when loaded this
way, then you've got a different problem.  One fix (not necessarily good)
would be to truncate the V/T data just before the oscillations start,
and/or smooth out the tail so it approaches the correct final value.

Regards,
Andy


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