RE: [IBIS] Rfixture value

It is best for simulators when the test fixture offers a load that is
close to the impedance that will be seen in real designs. Hence,
R_fixture=50 ohms is common.
 
If your buffer is not reaching steady state in the waveforms then maybe
extending the simulation time is the best solution. Note that IBISCHK
will warn only if the final voltage on a waveform is more than 2% from
the calculated steady state value. So you don't have to simulate so long
that it reaches absolute steady state. But it should look reasonable
flat at the end.
 
It is not necessary for the buffer to go from rail to rail in the
waveforms when pulling against the R_fixture, although it probably
should go through both Vol and Voh in the waveforms. Don't set R_fixture
so high that the waveform goes rail to rail, because the simulators need
to see how the buffer behaves under different loads.
 
Lastly, hopefully there is not some large C_fixture preventing the
waveform from settling within a reasonable time.
 
Mike LaBonte

________________________________

From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of
Sudarshan Honnudike
Sent: Thursday, April 12, 2007 8:25 AM
To: ibis@eda-stds.org
Subject: [IBIS] Rfixture value



Hello Experts, 

One of my IO buffer is very slow and i need to increase R_fixture to
considerably high value to 
make the V-t curves attains steady state. I actually increased to
10k(10,000). 

Will this have any major effect during SI simulations or is it ok to
have this big load also.?   


Best Regards,

Sudarshan HN
NXP Semiconductors/CTO /PLT
C-4, Manyata Tech Park, Nagawara
Bangalore-560 045 , India.    
Ph:+91-80-40247073  
Fax: +91-80-4026 7855
seri:sudarsha@inpsblr
E-mail: sudarshan.honnudike@nxp.com
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