RE: [IBIS-Users] RE: [IBIS] RE: IBIS model behavior between Vinh and Vinl input

Tom,

I may disagree with you on this one.  The 1 volt and 0 volt
representation
of "true" and "false" is just as "unreal" as an "X".  None of these are
actual
waveforms.  These are indicators which tells you whether the input
signal
was below, above, or between Vinh and Vinl.  I think it is plain wrong
to
have a "1" or a "0" on the output of the receiver when the signal is
between
Vinh and Vinl and it misleads the user of these tools thinking that they
have good signal integrity while they have problems.

I fully agree that digital parts are not made to operate with waveforms
between Vinh and Vinl.  Ant that is exactly the reason we should have an
output value of "X" to find out when the waveforms are in that region.
And that fact that you described that the "actual output ... will
change"
is exactly the reason for the "X", because we simply don't know what it
will be.  It is not guaranteed that it will be a "1" or a "0".  How do
you describe that if not with an "X"?

Arpad
========================================================================
=======

-----Original Message-----
From: Tom Dagostino [mailto:tom@teraspeed.com] 
Sent: Friday, January 04, 2008 1:34 AM
To: 'Akhilesh CHANDRA'; Muranyi, Arpad; ibis@server.eda-stds.org;
owner-ibis-users@server.eda.org; ibis-users@server.eda.org
Subject: RE: [IBIS-Users] RE: [IBIS] RE: IBIS model behavior between
Vinh and Vinl input

...
...
...

But having all simulators default to some arbitrary state when the input
is
between the reference levels is setting the user up for failure.  People
tend to assume if the simulator says X, X is real.  If they don't see X
in
the real circuit then there is something wrong.  Not all parts will
conform
to some arbitrarily designated state.

Digital parts are not made to operate with their inputs between Vinh and
Vinl.  Most parts have specifications that state the minimum slew rate
(input risetime/falltime) as the input to the part transitions between
the
two reference levels.  The actual output of an input buffer for a given
input voltage between Vinl and Vinh will change depending on the
internal
noise of the IC, the noise on the input, process, temperature, voltage,
phase of the moon, crosstalk, etc.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
503-430-1285 FAX
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

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