Several quick comments.
"Samples_Per_Bit"
* Is this a practice that we want to encourage?
o Seems to me that fractional sample rate conversion required
for models with dissimilar Samples_Per_Bit values will
become nightmare for the EDA tool.
+ On the other hand, the EDA tool is probably better
equipped to handle this than the model itself.
+ But really shouldn't the model need to handle this?
* Seems to me that what is also needed is a model range of
applicability. This could be specified as a BW, a Bit Rate, or in
some other means, so that the model is driven beyond it's means.
Tstonefile
* What would be the node mapping for Multi-path simulations of
crosstalk?
o This is where Agilent-standard even/odd port numbering gets
difficult.
+ Personally I prefer 1-to-N/2, N/2+1-to-N mapping
* Where is the termination network located for Tx and Rx?
o Is it embedded in the network s-parameters.
* How is Termination voltage accounted for with the network
s-parameters for non-DC-blocked applications?
* Assuming that the summer input and output is high impedance, is
Touchstone port impedance on the Silicon side also high impedance?
o Is the termination assumed to be at this point?
*
Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax
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Teraspeed Consulting Group LLC
On 10/6/2010 11:54 AM, Mirmak, Michael wrote:
>
> The enclosed BIRD 119, IBIS-AMI New Reserved Parameters, is
> distributed on behalf of Walter Katz, Mike Steinberger and Todd
> Westerhoff of SiSoft. It will be introduced at the next IBIS Open
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>
> A full list of BIRDs, their status and association with particular
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> Please note that the enclosed file is a "pointer" to a separate PDF
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> http://www.eda.org/ibis/birds/bird119/bird119.pdf
>
> Michael Mirmak
>
> Intel Corp.
>
> Chair, IBIS Open Forum
>
>
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