RE: [IBIS] SI_location / Timing_Location

From: Robert Haller <rhaller@enterasys.com>
Date: Tue Aug 27 2013 - 10:54:20 PDT
OK I stand corrected (didn’t even think of searching the birds). And Yes I
completely agree that the large non-monotonic edges often seen on pins of
FPGA’s can corrupt timing results too.



*From:* Scott McMorrow [mailto:scott@teraspeed.com]
*Sent:* Tuesday, August 27, 2013 1:39 PM
*To:* Robert Haller
*Cc:* Aubrey Sparkman; Muranyi, Arpad; IBIS; IBIS-users
*Subject:* Re: [IBIS] SI_location / Timing_Location



Actually, Si_location and Timing_location go back to 1997 and were
introduced by Bob Ross of Interconnectix (pre-Mentor)



http://www.eda.org/ibis/birds/bird43.txt



Timing_location may also need to be changed to die for large FPGA type
devices, because of large non-monotonic signals at the pins.







On Tue, Aug 27, 2013 at 1:30 PM, Robert Haller <rhaller@enterasys.com>
wrote:

I think the SiSoft guys probably pushed for this a while ago. Their
software can do chip to chip timing either at pin or pad (on either end of
transmission line). Usually one performs static timing from pin to pin
because then there is no double counting when using data sheet timing
specs. But if you are designing the silicon and the package, there are
good reasons to perform timing pad to pad when you are trying to shave
picoseconds.
Regards
Bob

-----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Aubrey
Sparkman
Sent: Monday, August 26, 2013 2:19 PM
To: Muranyi, Arpad
Cc: IBIS; IBIS-users
Subject: Re: [IBIS] SI_location / Timing_Location

I have used these switches, though I'm not sure I gave them different
values.

Possible scenario...   Interface specs timing at pin, but I want to make
sure edges are monotonic at the silicon.

Just a though.

Aubrey Sparkman

Sent from my iPhone

On Aug 26, 2013, at 11:44 AM, "Muranyi, Arpad" <Arpad_Muranyi@mentor.com>
wrote:

> Hello IBIS experts,
>
> Someone asked me the question whether Si_location and Timing_Location
> can have two different values because they have an IBIS file which
> does that.
>
> In attempt to answer their question, I searched the IBIS specification
> for Si_location and only found this sentence on pg. 16 (in v5.1):
>
> "Si_location and Timing_location are optional and specify where the
Signal Integrity and Timing measurements are made for the component.
Allowed values for either subparameter are "Die" or "Pin". The default
location is at the "Pin"."
>
> I found no other occurrences of "Si_location" or "Timing_location"
> in the entire specification, i.e. their meaning, usage and purpose are
> not defined.  Or am I missing something?
>
> Going back to the original question, does it make sense to have two
> different values for these two parameters?
>
> Thanks,
>
> Arpad
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Received on Tue Aug 27 10:54:31 2013

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