[IBIS] Asian IBIS Summit (Shanghai) - Fourth Announcement

From: Bob Ross <bob@teraspeedlabs.com>
Date: Thu Oct 30 2014 - 19:50:51 PDT
To All:

 

The IBIS Open Forum is holding an Asian IBIS Summit Meeting in

Shanghai, China on Friday, November 14, 2014. We have a full

program with tentative presentations given below.

 

Several companies listed below are co-sponsoring this large event

to be held again at the Parkyard Hotel, Shanghai.

 

For travel consideration, two other Asian IBIS Summits follow this

event:

 

  Taipei, Taiwan, Monday, November 17, Sherwood Hotel

  Yokohama, Japan, Thursday, November 20, Pacifico Yokohama

 

Lance Wang

IO Methodology Inc.

 

Bob Ross

Teraspeed Labs

 

 

 

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                       ASIAN IBIS SUMMIT (SHANGHAI)

                      FOURTH CALL FOR PARTICIPATION

-----------------------------------------------------------------------

 

http://www.eda.org/ibis/summits/nov14a/announcement_chinese.pdf

 

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

 

           A S I A N   I B I S   S U M M I T   ( S H A N G H A I )

 

Time/Date:  Friday, November 14, 2014, 8:00 AM to 5:30 PM

            Meeting starts at 9:00 AM

 

Location:   Parkyard Hotel Shanghai

            699 Bibo Road

            Zhangjiang Hi-Tech Park

            Shanghai 201203

            P.R. China

 

      http://www.parkyard.com/en/hotel_index.aspx?currenthotelid=6

 

Content:    Presentations and Discussions

 

Purpose:    Solicit and exchange IBIS and interconnect model related

            information and ideas.

 

Primary Sponsor:

            Huawei Technologies

 

Co-sponsors (in alphabetical order):

            ANSYS

            Intel Corporation

            IO Methodology

            Keysight Technologies

            Synopsys

            Teledyne LeCroy

            ZTE Corporation

 

Cost:       FREE, including refreshments and buffet lunch

 

Vendors:    Some vendors will have information tables

 

            Contact us for details regarding sponsorship.

 

BACKGROUND

 

   We have held nine successful meetings in Shenzhen, Shanghai and Beijing.

   This year we are meeting again in Shanghai where many Chinese and

   foreign high technology companies operate.  These events are archived

   along with all our other Summits:

 

     http://www.eda.org/pub/ibis/summits/

 

   Our objective is to reach out internationally to communicate with

   the local experts and to learn of regional concerns.

 

CONFERENCE LANGUAGE

 

   The conference language is English, but we will plan for technical

   translations in English and Mandarin.  So presenters can optionally

   deliver in Mandarin as long as an English version of the material is

   available.

 

IBIS SUMMIT

 

   This meeting will be conducted as a formal IBIS Summit Meeting.

   Presentations will be archived in an electronic format on our

   Summits site, and minutes of the meeting will be issued.  However,

   no formal decisions requiring votes will be planned.

 

CALL FOR PARTICIPANTS

 

   People involved in IBIS and interconnect model development, EDA

   tool development, and digital circuit design are invited to

   participate in the Summit meeting.  If you plan to participate,

   please register using the information below (in English):

 

     Name:

     E-mail address:

 

     Company:

     Top-level Web Link:

 

     Country:

 

   Send to BOTH:

 

     Lance Wang, IO Methodology Inc.         lwang@iometh.com

     Bob Ross, Teraspeed Labs                bob@teraspeedlabs.com

 

 

   SIGNUP DEADLINE: November 10, 2014

 

AGENDA

 

   8:15 -   9:00  Vendor table setup and tables

   8:30 -   9:00  Sign in

   9:00 -  12:00  Presentations

   12:00 - 13:30  Free buffet lunch, vendor tables

   13:30 - 17:00  Presentations

 

TENTATIVE PRESENTATIONS

 

   Intel Corporation

     Activities and Direction of IBIS

 

   Teraspeed Labs

     Corner Considerations

 

   Cadence Design Systems

     True Differential IBIS Model for SerDes Analog Buffer

 

     Signing IBIS Model Against DDR4 Spec

 

   Synopsys

     An Effective Solution to Simulate Composite Current When

       Over-clocking

 

   Keysight Technologies and Micron Technology

     Handling of Overclocking Caused by Delay in Waveform Tables

 

   ANSYS

     Best Practices for High-Speed Serial Link Simulation

 

   Xpeedic Technology

     Connector Via Footprint Optimization for 25Gbps Channel

       Design

 

   ZTE Corporation

     Using IBIS-AMI Model for 25Gbps Retimer Simulation

 

   Ericsson

     IBIS AMI Validation

 

   Huawei Technologies

     TBD

 

 

LIST OF NEARBY HOTELS AND TRAVEL RULES

 

   Hotels in all price ranges can be found through internet searches.

 

   Comply with your travel rules, such as indicated in the link

   below to China and Shanghai.  Work with your travel agent.  Notify

   us as a sign-up comment if you need assistance.  Visas, if needed,

   should fall in the visit/business category:

 

     http://travel.state.gov/travel/cis_pa_tw/cis/cis_1089.html

 

--

 

Bob Ross

Teraspeed Labs

http://www.teraspeedlabs.com

bob@teraspeedlabs.com

Direct: 503-246-8048

Office: 971-279-5325

 


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Received on Thu Oct 30 19:51:02 2014

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