================================================================================ IBIS INTERCONNECT TASK GROUP http://www.ibis.org/interconnect_wip/ Mailing list: ibis-interconnect@freelists.org Archives at http://www.freelists.org/archive/ibis-interconn/ ================================================================================ Attendees from January 3, 2018 Meeting (* means attended at least using audio) ANSYS Curtis Clark Cadence Design Systems Bradley Brim Intel Corp. Michael Mirmak Keysight Technologies Radek Biernacki Mentor, A Siemens Business Arpad Muranyi* Micron Technology Justin Butterfield, Randy Wolff* SiSoft Walter Katz, Mike LaBonte* Teraspeed Labs Bob Ross* Mike LaBonte convened the meeting. No patents were declared. Randy Wolff took minutes. Review of Minutes: - Mike called for review of the minutes from the December 20 meeting. Randy Wolff moved to approve the minutes. Arpad Muranyi seconded. The minutes were approved without objection. Review of ARs: - Mike to post draft13.1 as draft14 [AR]. Done. Bob used this as a baseline for a draft 15 version. Arpad commented that draft 13 and draft 14 were posted on the same day, but were not in order at first. Mike fixed this. - Bob to start working on the editorial changes to the BIRD [AR]. Bob started a draft 15 for review. Opens: - None. BIRD189.5 draft 14 review: Arpad asked if Bob based his draft off of draft 14. Bob stated that there was a lot of forward referencing in the BIRD that needed to be fixed. He also made some changes to rail definitions. These changes are in draft 15. BIRD189.5_draft15_v1 review: Mike showed a difference document comparing draft 14 with draft 15_v1. Bob added a section defining the interface locations of pin, die pad and buffer. Bob changed instances of Group to Interconnect Model Group. Mike noted that some grammar fixes are needed where Bob started to break up long sentences. Also, Bob added some comments "Please clarify what is meant here", indicating more explanation is needed. Mike asked about the interface combinations for an I/O pin_name. Arpad clarified that each of the bullet items are exclusive. Mike noted that the last bullet describes no path. Bob thought this was irrelevant. Randy noted it reads funny saying that "An I/O pin-name may be in Interconnect Models ... In no Interconnect Model at all." All agreed to drop the last bullet item. Mike asked about the bullet item about an I/O pin_name in a model as an aggressor but in no model as a victim. Bob noted the statement was in draft 14. Bob stated that the sentence says the methodology may be busted, using a model where it isn't intended. Mike asked if this should be in IBIS at all. Bob didn't think IBISCHK should flag a warning. Mike noted the statement is essentially describing the Agressor_only definition. Mike stated the case is about having an incomplete model. Bob said you'd be building an interconnect case without worse case conditions. Mike suggested waiting for Walter to discuss this further. Bob noted under I/O pin_name rules, the second bullet item inserted was "All *_I/O pin_names may be victims (non-aggressors)". Also, tagging a signal as an aggressor at one interface location makes it an aggressor at all interfaces. The EDA tools will have to figure out how to support this. Mike showed a drawing of a package with full package and partial package models. He was marking "Aggressor_Only" at both interfaces in the model. Bob said there is a lot of confusion about what to do when signals are only included as aggressors in interconnect models. Will tools end up defaulting to RLC models? Bob noted that under rail terminal rules, he made some technical changes to clarify that tracking the names of interfaces at pads versus pins requires [Bus Label] or [Die Supply Pads]. Bob added descriptions of Pin_Rail terminals at all three interfaces. Mike referenced "An Interconnect Model with only rail terminals (no I/O terminals) can be used for a Power Delivery Network (PDN)". Do we agree with this? Bob noted this should be ok if the PDN-only model is in the same group as the I/O models. Rail terminals can be repeated across Interconnect Models, since I/O models may need a rail terminal as a reference. Bob also added some bullet items to the list of examples of Interconnect Models. Next Meeting: The next meeting will be January 10. Mike will discuss the graphic for Aggressor_Only. Bob will issue a new draft15_v2 [AR]. Randy moved to adjourn. Bob seconded. The meeting adjourned without objection. Task List BIRD189.5 editorial additions/changes to be completed: 1. Remove the word "reference" from the IBIS-ISS examples 2. Clarify the terms "Model", "Sets" and "Groups" 3. Resolve the comments in the document (e.g., on page 26, addressing “may” vs. “should/shall”) 4. Remove comments from Mike LaBonte regarding use of the phrase "by the EDA tool" 5. Add a new example showing the A_gnd syntax 6. Remove or modify Requirements 12 and 15