adding: Verilog-AMS LRM 2.0 Annex E/ (stored 0%)
  adding: Verilog-AMS LRM 2.0 Annex E/resistor.va (deflated 54%)
  adding: Verilog-AMS LRM 2.0 Annex E/vpulse.va (deflated 60%)
  adding: Verilog-AMS LRM 2.0 Annex E/isine.va (deflated 68%)
  adding: Verilog-AMS LRM 2.0 Annex E/capacitor.va (deflated 53%)
  adding: Verilog-AMS LRM 2.0 Annex E/vsine.va (deflated 68%)
  adding: Verilog-AMS LRM 2.0 Annex E/primitives.va (deflated 62%)
  adding: Verilog-AMS LRM 2.0 Annex E/conductor.va (deflated 54%)
  adding: Verilog-AMS LRM 2.0 Annex E/ipulse.va (deflated 60%)
  adding: Verilog-AMS LRM 2.0 Annex E/inductor.va (deflated 52%)
  adding: Verilog-AMS LRM 2.0 Annex E/vpwl.va (deflated 61%)
  adding: Verilog-AMS LRM 2.0 Annex E/vccs.va (deflated 53%)
  adding: Verilog-AMS LRM 2.0 Annex E/ipwl.va (deflated 60%)
  adding: Verilog-AMS LRM 2.0 Annex E/vcvs.va (deflated 53%)
  adding: Verilog-AMS LRM 2.0 Annex E/iexp.va (deflated 62%)
  adding: Verilog-AMS LRM 2.0 Annex E/vexp.va (deflated 62%)