CONTENT OF THE IBIS OPEN FORUM SUMMIT MEETING May 26, 2022 SPI 2022 European Virtual IBIS Summit (On-site After SPI 2022) .zip compressed .ppt, .pptx PowerPoint .doc, .docx Word .pdf Adobe Acrobat .txt Text ADMINISTRATIVE DOCUMENTS: 00readme.txt This Document Recording of Summit summit_recording.mp4 a052622.txt Agenda a052622.html agenda.docx m052622.docx Minutes m052622.pdf backdrop.pptx Meeting Backdrop PRESENTATIONS AND ACTUAL TITLES (IN ACTUAL ORDER OF PRESENTATION): wolff.pdf IBIS Chair's Report Randy Wolff (Micron Technology, USA) (Chair, IBIS Open Forum) chou.pdf Circuit Synthesis of Multiport Networks from Passive Poles and Residues# Chiu-Chih (George) Chou*, Jose Schutt-Aine**## (*National Central University, **University of Illnois; #ROC, ##USA) [Presented by Chiu-Chih (George) Chou*, Jose Schutt-Aine*]] de_stefano.pdf 20 minutes, repeat from SPI2022 Low-Frequency Modal Extrapolation and Regularization for Full-Bandwidth Macromodeling of Electromagnetic Structures Marco De Stefano*#, Stefano Grivet-Talocia*#, T. Wendt**##, C. Yang**##, Christian Schuster**## (Politecnico di Torino*, Hamburg University of Technology (TUHH)**; #Italy, ##Germany) [Presented by Marco De Stefano (Politecnico di Torino; Italy)] bradde.pdf Fast Simulation of Analog Circuit Blocks under Nonstationary 30 minutes Operating Conditions via Reduced Order Equivalent Circuits Tommasso Bradde, Alexssandro Zanco, Stefano Grivet-Talocia (Politecnico di Torino, Italy) [Presented by Tommasso Bradde, (Politecnico di Torino; Italy)] ross.pdf K.T. Wang (Wang Algebra) - Expanded History - 17 slides 20 minutes Bob Ross (Teraspeed Labs, USA) viscardi.pdf IBIS Power Current Prediction with Overclocking (topic) Aniello Viscardiz*, Xuefeng Chen** (Micron Technology*; Italy, Synopsys**, PRC) {Presented by Aniello Viscardi (Micron Technology*, Italy)] bai.pdf Bathtub Extrapolation of IBIS-AMI Timing Jitter repeat from SPI2022 Longfei Bai (Dassault Systemes, Germany) muranyi.pdf Pole-Residue in Touchstone 20 minutes??? Arpad Muranyi*, Bob Ross** (Siemens EDA*, Teraspeed Labs**; USA) [Presented by Arpad Muranyi (Siemens EDA, USA)]