To submit an TSIRD to the IBIS Open Forum, please use the TSIRD Template Rev. 1.0.
| ID# | Issue Title | Requester | Date Submitted |
Date Accepted |
Supporting Version |
|---|---|---|---|---|---|
| 8 | Option line changes | Arpad Muranyi, Siemens EDA | March 20, 2024 , | ||
| 7.2 | Standardized Pole-Residue Representation of Touchstone Data | Arpad Muranyi, Siemens EDA | February 14, 2024; May 7, 2024; June 3, 2024 , | ||
| 7.1 | Standardized Pole-Residue Representation of Touchstone Data | Arpad Muranyi, Siemens EDA | February 14, 2024; May 7, 2024 , | ||
| 7 | Standardized Pole-Residue Representation of Touchstone Data | Arpad Muranyi, Siemens EDA | February 14, 2024 , | ||
| 6 | Clarify File Extension Rule for Touchstone 1.0 and 1.1 Files | Bob Ross, Teraspeed Labs; Arpad Muranyi, Siemens EDA | July 5, 2023 , | September 15, 2023 | |
| 5.1 | Per Port Reference Resistance on the Option Line | Arpad Muranyi, Randy Wolff, Siemens EDA; Bob Ross, Teraspeed Labs | June 14, 2023; July 5, 2023 , | September 15, 2023 | |
| 4.1 | [End] Keyword Corrections and Other Editorial Changes | Michael Mirmak, Intel Corp. | March 2, 2022 , July 20, 2022 | September 9, 2022 | |
| 3 | Clarify S-parameter Definition | Radek Biernacki, Agilent Technologies; Michael Mirmak, Intel | July 20, 2011 , | October 7, 2011 | |
| 2.1 | Binary Format Support | Michael Mirmak, Intel Corp. for Interconnect Task Group | June 9, 2010 , July 14, 2010 | August 20, 2010 | |
| 1.1 | Sparse Matrix Mapping | Bob Ross, Teraspeed Consulting Group for Interconnect Task Group | February 26, 2010, April 23, 2010 | April 23, 2010 |
The incorporation of the TSIRDs into versions of Touchstone are shown in tsirddir.txt.