Subject: [IBIS-Users] FW: ibis modeling question
From: John Angulo (jangulo@innoveda.com)
Date: Tue Jun 04 2002 - 17:41:57 PDT
The following is posted on behalf of Ping-Chung Li of TSMC. Please send
private replies to PCLI@tsmc.com.tw.
------------------
Dear IBIS experts,
I have three questions regarding IBIS modeling.
1. I have an I/O cell, where at the output pin I have connected a resistor
to a
reference voltage source. The purpose of this
resistor and voltage source is to model the surrounding environment of the
I/O
cell. How should I generate IBIS model for
this cell? Since the output node is connected to a voltage source via a
resistor, there is an current thru the resistor when I sweep
the output pin. Should I take out the resistor and voltage source when
generating Clamp V-I table?
2. How do I generate pull-up and pull-down tables for 3-state cells? my
understanding is that I generate power/ground clamp first,
with enable pin turned-off so that the output pin is high impedance. Then I
activate enable pin and sweep output pin, then subtract
both power/ground clamp tables from the pull-up/pull-down tables to get
pull-up
and pull-down V-I curves. Is this correct?
3. How does ibischk3 check the accuracy of my cell's rising and falling
waveform? My understanding is that it would take the sum
of pull-up and power/ground clamp tables (or pull-down and power/ground
clamp
tables) and compare them with the end points of
rising/falling
waveforms. Is this correct? With my cell, it seems ibischk3 does not work
this
way. Is there anything I missed?
your help on these questions is highly appropriated.
Ping-Chung Li
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