Subject: RE: [IBIS-Users] FW: Extreme currents????
From: Muranyi, Arpad (arpad.muranyi@intel.com)
Date: Fri Jul 12 2002 - 08:11:17 PDT
Parabhu,
Your solutions is close but not quite perfect...
The problem is that if you put a resistor between the source and
GND, you actually alter the channel currents also, which usually
are fairly accurate. What you should do instead is connect the
resistor between the substrate and GND. This would only limit
the diode currents but would not effect the channel currents.
The problem is that not all SPICE tools have or give access to
the fourth node of the transistor, so you may not be able to do
this with every tool.
An then there are other higher order effects which involve the
currents and voltages of the substrate which may get effected
by this additional resistance, but these may be negligible in
terms of making IBIS models.
Arpad Muranyi
Intel Corporation
================================================================
-----Original Message-----
From: Mohan, Prabhu [mailto:Prabhu.Mohan@actel.com]
Sent: Thursday, July 11, 2002 6:02 PM
To: 'dbcox'; 'Kim Helliwell'
Cc: ibis-users@eda.org
Subject: RE: [IBIS-Users] FW: Extreme currents????
Hi all,
I've come across a few kilo Amps(!) in the -3.3V region while generating
IBIS models. In all the cases the reason was the clamp-diodes (with zero R).
Here is what I do. For all the transistors that are directly connected to
the PAD, I just stick a resistor (say 5ohms) between substrate and ground
(or power). This brings the current down to "reasonable" levels. Once some
silicon measurements are done I just tune the resistors that I inserted.
Please tell me if there is anything wrong with the above method.
Ofcourse, this means sifting through the spice netlist but it has worked
quite well so far.
Prabhu/~
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