Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question
From: Peter LaFlamme (plaflamm@amcc.com)
Date: Tue Jul 23 2002 - 10:52:47 PDT
Hi Hassan,
Thanks alot for the comments and information. I have done the same thing previously in simulations. I have also received input models that had the internal termination modeled as a dynamic clamp. In comparisons between dynamic clamp modeled terminations
and your method, I found that (just in my case) there was not real good correlation.
Regards,
Peter
Peter LaFlamme
Applied Micro Circuits Corp.
System Applications Engineer
200 Minuteman Rd, 3rd Floor
Andover, MA 01810
978-247-8470 phone
978-623-0055 Fax
Hassan Ali wrote:
>
> Hi Peter,
>
> I had the same situation a few months ago and I only had to go with an
> adhoc solution.
>
> Yes indeed most simulators do not have good support for differential
> models with [R Series] termination. I ended up creating a single-ended
> input buffer model (same for the P and N side) with no termination
> between P and N sides. This only captured the clamping function.
>
> In my simulation I had to recreate the terminated differential input
> buffer by using two single-ended buffers (one for the P and one for the
> N pin) with a termination resistor tied between them. The package
> parasitics were also tied to the two pins. I manually changed the values
> of the termination resistor and package parasitics to cover their
> variation in the typical, minimum and maximum corners.
>
> Probably there is a better solution, but that's what I did as a
> quick-and-dirty work-around.
>
> Regards.
>
> Hassan.
>
> Hassan Ali, Ph.D.
> Signal Integrity Specialist -Talented, innovative designers
> Fidus Systems Inc. -Highly competitive rates
> Tel: (613) 828-0063 Ext.342 -Fixed-price business model
> Fax: (613) 828-3113 -State-of-the-art design tools
> http://www.fidus.ca -Customer-friendly attitude
>
> -----Original Message-----
> From: Peter LaFlamme [mailto:plaflamm@amcc.com]
> Sent: Tuesday, July 23, 2002 9:01 AM
> To: ibis-users@eda.org
> Subject: [IBIS-Users] LVDS RECEIVER TERMINATION Question
>
> Hi All,
> I am tasked with creating an IBIS model for an LVDS receiver cell that
> has an internal 100 ohm termination between the P and N nodes. I had
> asked Bob Ross about this a while ago and as usual he was very helpful.
> >From his response I used the following
> implementation:
>
> |****************************************************************
> | Component: LVDSRCV
> |****************************************************************
> |
> [Component] LVDSRCV
> [Manufacturer] AMCC
> |
> |
> |
> [Package]
> | variable typ min max
> R_pkg 1E-3 NA NA
> L_pkg 1E-9 NA NA
> C_pkg 1E-12 NA NA
> |
> [Pin] signal_name model_name R_pin L_pin C_pin
> 1 PAD lvdsrcv NA NA NA
> 2 PADN lvdsrcv NA NA NA
> |
> [Series Pin Mapping] pin_2 model_name function_table_group
> 1 2 rterm_100
>
> |
> [Diff_pin] inv_pin vdiff tdelay_typ tdelay_min
> tdelay_max
> |
> 1 2 0.2 0 0 0
>
> [Model] rterm_100
> C_comp 0.1pF 0.1pF 0.1pF
>
> Model_type Series
> |variable R(typ) R(min) R(max)
> [R Series] 100 80 120
>
> [Temperature Range] 25.00 125.00 0.00
> [Voltage Range] 1.800 1.650 1.950
>
> ************************************************************************
> ****************
>
> I was able to get the model past the IBIS checker but my simulations did
> not show the 100 ohm terminator. I was using a tool which I believe does
> not support this implementation (no need to mention names). I have seen
> other implementations where I believe
>
> a "Dynamic clamp" is used to model the termination behavior, but I am
> unsure. Can anyone guide me to some reference material or weigh in with
> your experience or help.
>
> Thanks alot,
> Peter
>
>
>
> --
> Peter LaFlamme
>
> Applied Micro Circuits Corp.
> System Applications Engineer
> 200 Minuteman Rd, 3rd Floor
> Andover, MA 01810
>
> 978-247-8470 phone
> 978-623-0055 Fax
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