Subject: RE: [IBIS-Users] number of waveforms
From: Muranyi, Arpad (arpad.muranyi@intel.com)
Date: Tue May 27 2003 - 09:22:32 PDT
Erik,
I am only aware of two tools which can use more than
one waveform per edge (or more than 4 per CMOS buffer).
This is probably the reason most IBIS models do not
contain more waveforms.
The reason the IBIS specification allows for more is
accuracy. It is generally true that the V_fixture
R_fixture combination of an IBIS model will reproduce
the most accurate results when the buffer is used with
the same load in the simulation. In case the model is
used in environments where the load impedance has a
wide range, it would be better if the model could also
use waveform tables which were made under similar
conditions.
Now that I am studying the algorithms in order to be
able to write VHDL-AMS IBIS models, I am discovering
a lot of interesting numeric details which I wasn't
aware of before, however, it would be to difficult to
explain all of them here. You can expect to see a
presentation by me and Luca Giacotto on this subject
in the upcoming IBIS summit.
Arpad Muranyi
Intel Corporation
=======================================================
-----Original Message-----
From: erik.van.der.ven@philips.com [mailto:erik.van.der.ven@philips.com]
Sent: Tuesday, May 27, 2003 6:43 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] number of waveforms
Dear IBIS users,
It is possible to specify more than one waveform table, for instance with different loads.
I have studied many IBIS models by semiconductor companies. All models I have seen give only one waveform (both rising and falling).
What is the purpose of specifying more than one waveform? Does this yield better results in the simulator if the load differs from the standard load?
With kind regards,
Ir. Erik van der Ven
Room DB1032
Business Line Networking Infrastructure
Philips Semiconductors BV
Gerstweg 2
6534 AE Nijmegen
The Netherlands
Phone: +31-24-3534334
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