Nirav,
A accurate IBIS model can be constructed that correlates to SPICE and
bench at 2.5 Ghz. Yes there can be limitations in models depending on
the I/O cell circuit design, and the simulator. Some of the potential
issues;
- Was the model accurately constructed ?
- Accuracy of package model
- Does the I/O cell use special circuit tricks that IBIS may have
difficulty modeling (or the model creator doesn't capture)
- Crossover current in the I/O cell
- Input capacitance versus output capacitance (C_comp) on I/O cell
regards,
Bob
Nirav Patel wrote:
> Hi All,
>
> I need your help to get more clarification on the following issues:
>
> 1. Simulators are capable of handling IBIS model which needs to run at
> 2.5 GHz.
> 2. Is there any limitation in IBIS specification for characterizing any
> buffer
> which is operating at 2.5GHz.
>
> Thanks
> Nirav
>
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