RE: [IBIS-Users] IBIS models for the buffers having Feedback loops

Raghu,
 
There are numerous simulators out there which can simulate
VHDL-AMS and/or Verilog-AMS models. I would suggest to
do your research on your own to find them, we usually
do not get into recommending vendors/tools.
 
A golden parser will be available later this year (I hope)
for checking IBIS 4.1 models. It will, however, not go inside
the *-AMS models to check their content.
 
Arpad
=============================================================
 

________________________________

From: raghu@alcerelay.agere.com [mailto:raghu@alcerelay.agere.com] On
Behalf Of RaghuNatha Reddy
Sent: Monday, May 31, 2004 10:50 PM
To: Muranyi, Arpad; ibis-users@eda.org
Subject: Re: [IBIS-Users] IBIS models for the buffers having Feedback
loops

Hi Arpad,

Thanks for the information. We have created IBIS model for one specific
state.

If I create an IBIS model with VHDL/Verilog-AMS features, which
simulators I can use to verify them. Also, what about GOLDEN parser?

Thanks and regards,
Raghu

"Muranyi, Arpad" wrote:

        Raghu,

        Modeling feedback with conventional IBIS is not possible. You
could
        make "snapshot" models capturing certain "states" of the
feedback,
        but you can't model its dynamics. If you need to do that you
should
        look into using the VHDL-AMS or Verilog-AMS extensions of IBIS.

        Arpad Muranyi
        
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Received on Fri Jun 11 13:02:03 2004