Re: [IBIS-Users] BIRD95: Power Integrity Analysis Using IBIS

Hi Matsui-san,

Thanks for your questions/comments on BIRD95. We are including our
responses below. Pls feel free to let us know if you have more
questions.

Regards,
Syed--
IBIS Vice-Chair & Webmaster
Cisco Systems, Inc

On Sun, 2004-12-26 at 09:00, Mirmak, Michael wrote:
> Comments from Matsui-san on BIRD95.
>
> - MM
>
> ______________________________________________________________________
> From: matsui [mailto:matsui@apsimtech.com]
>
> My comments and thoughts on SSO and EMI models are below.
>
> 1. If I_bypass is described as a current source, it may not be
> right.
> Series current source always feed the same current to out side.
> I think the I_bypass and C_p+b may be in parallel. Or voltage
> source
> is OK. All current source models must have admittance or
> device models
> in parallel. The current waveforms will be varied by loads and
> admittance/
> impedance of switching transistors. The admittance/impedance
> consists
> of linear power rails and nonlinear transistors. I remember
> Arpad has
> presented nonlinear model of C_comp.

Cisco:(1)
I_bypass is not a current source. I_bypass simply represents current
that flows through the bypass components.

> 2. There are two types of core models. One is shown in the bird.
> The other (I think this is more popular) type of core logic is
> not connected
> to I/O buffer. I/O core logic may be connected to lower
> voltage sources
> with no I/O.

Cisco:(2)
We have internally discussed that I/O and core voltages can be different
and the pre-driver can be supplied with either.

> 3. SSO needs time domain model. EMI needs frequency domain model
> and time
> domain model. The frequency domain model means linearized
> model and it
> is an approximation. Current sources should be described in
> real and imaginary
> parts at various frequencies. The parallel admittance, if it
> is a macro model, may
> be approximated as real and imaginary parts at various
> frequencies.
> Time domain model of cores is more preferable for SSO and EMI,
> because
> switching transistors have strong non linearity. Current
> source model is a kind of
> linear approximation. Current waveforms are results. Constant
> external voltage
> sources are switched by nonlinear transistors. Only current
> sources can't describe
> load effects. They need nonlinear admittance / impedance.
> Transistor or behavioral
> model may describe these effects.

Cisco:(3 and 6)
Again BIRD95 has no current sources. BIRD95 based simulations will have
more accurate EMI results than pre-BIRD95 simulations. However, BIRD95
is not specifically directed towards EMI simulations. EMI simulations
are best addressed with the ICEM model.

> 4. How to simplify the models of power rails on a chip and a
> package is another
> serious issue. Even for a package, number of die pads and
> balls for power/ground
> I/O. ICM and SPICE may be OK, but too complex model with too
> many terminals are
> not good for simulation.
> 5. All the core logic is connected to common power rails with some
> different DC levels
> and the power/ground rails are connected to number of die pads
> and package balls.
> A figure of Bird 95 seems to consist of one I/O and one core
> logic. I think the starting
> point may be more realistic structures of an LSI chip.

Cisco:(4 and 5)
Common Spice package models are scaled down to a slice of the package
with a handful of drivers. It should be possible to scale the model down
to a single buffer.

> 6. I think there is a big difference between SSO and EMI models. A
> simple EMI simulation
> does not need individual power I/O pin models. But accurate EMI
> simulation may not
> accept this model.
>
> Best Regards,
> Norio Matsui
>
>

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Received on Tue Dec 28 10:40:26 2004