RE: [IBIS-Users] VHDL-AMS Model

Hello all,
Thanks a lot for the information. It is very informative and helpful.
Much appreciated with the responces.
-Lee

>From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
>To: <ibis-users@eda.org>
>Subject: RE: [IBIS-Users] VHDL-AMS Model
>Date: Tue, 1 Feb 2005 09:21:24 -0800
>
>Lee,
>
>The biggest difference between (legacy) IBIS and VHDL-AMS models
>is flexibility. First, the IBIS v4.1 specification allows you to
>use VHDL-AMS, Verilog-AMS models as external models, that's why
>I refer to the older IBIS capabilities as legacy IBIS.
>
>So the biggest problem with legacy IBIS was that the algorithms
>were all predefined, and the IBIS file would just give you data
>for those algorithms. Every time there was a change in the behavior
>of the buffers we wanted to model we had to come up with a new
>keyword and this took a prohibitively long time.
>
>VHDL-AMS and Verilog-AMS are more like programming languages.
>You can write equations almost any whichever way you want.
>Therefore basically sky is the limit as far as modeling is
>concerned.
>
>This is a wonderful thing, because all those limitations that
>existed in legacy IBIS models can be done away without possibly
>having to change anything in the spec any more. On the other hand,
>this may make it somewhat more difficult for the model maker,
>because they will have to learn the language, and they will also
>need to learn how to translate a certain behavior they observe
>into the form of equations. This may not necessarily have to be
>a big concern, though, because I believe that there will be many
>models written in these languages which will be used as templates,
>so that by providing parameters for them they could be used for
>many devices as long as they belong to the same general family.
>
>I hope this helps you to understand what these languages can do.
>
>Thanks,
>
>Arpad
>=================================================================
>
>
>
>-----Original Message-----
>From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
>Of lee yang
>Sent: Sunday, January 30, 2005 9:35 PM
>To: ibis-users@eda.org
>Subject: [IBIS-Users] VHDL-AMS Model
>
>Hi,
>
>Recently I heard about another behavioral model call VHDL-AMS, can anyone
>please give some background about it?
>Since we already have IBIS model, what is the reason we need to use
>VHDL-AMS
>model instead? What is the pros and cons compared to IBIS model?
>Thanks and appreciate if someone can shed some light.
>
>-Lee Yang
>
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Received on Thu Feb 3 05:41:51 2005