[IBIS-Users] RE: How simulate and I/O buffer like only input model?

Ramiro,

As I understand the HSPICE syntax, the node 'nd_out' is always the analog signal node for the I/O buffer B element.  When you put the I/O buffer into input mode, the node 'V_out_of_in' carries the digital output of the input buffer, i.e., its response to the analog signal at 'nd_out'.

The Hyperlynx GUI does not force you to deal directly with these nodal connections when you assign and configure models, and I believe other SI tools likewise hide these details.  However, it is the policy of the IBIS Open Forum Users list not to discuss the detailed features of particular tools.  We're putting you in touch with Hyperlynx people who can discuss details offline.

Best regards,

John Angulo
Software Development Engineer
Hyperlynx Products
Mentor Graphics Corp.


> -----Original Message-----
> From: owner-ibis-info@eda.org 
> [mailto:owner-ibis-info@eda.org] On Behalf Of RODRIGUEZ_LECONA_RAMIRO
> Sent: Thursday, March 10, 2005 9:25 AM
> To: Flora, Matthew
> Cc: ibis-users@eda.org; ibis-info@eda.org
> Subject: Re: How simulate and I/O buffer like only input model?
> 
> Hi Matthew, 
> 
>      I am not user of HyperLinx, but I am interesed to know 
> how HyperLinx simulates IBIS models, in special how Hyperlinx 
> simulates different types of buffers by means of IBIS models. 
> Is it possible that there are differencies in the accuracy of 
> IBIS simulations between HSPICE and Hyperlinx?  With this 
> information I can consider to use HyperLinx. 
> 
>                   Regards, 
> 
> Flora, Matthew escribió: 
> 
> > Dear Ramiro,
> > 
> > Were the Customer Support people for HyperLynx unable to help you? 
> > 
> > Best regards,
> > Matthew Flora
> >   
> > 
> >> -----Original Message-----
> >> From: owner-ibis-users@eda.org
> >> [mailto:owner-ibis-users@eda.org] On Behalf Of 
> >> RODRIGUEZ_LECONA_RAMIRO
> >> Sent: Thursday, March 10, 2005 7:56 AM
> >> To: ibis-users@eda.org; ibis-info@eda.org
> >> Subject: [IBIS-Users] How simulate and I/O buffer like only input 
> >> model?
> >> 
> >> Hi all,
> >> 
> >>         Someone knows how Hyperlinx simulates an IBIS 
> model of an I/O 
> >> buffer when I want to see the model like a single input model?
> >> 
> >>         In HSPICE the syntax for an input/output buffer 
> element card 
> >> is
> >> 
> >>         B_IO nd_pu nd_pd nd_out nd_in nd_en V_out_of_in 
> [nd_pc nd_gc]
> >> 
> >>         In order to simulate this buffer like a single 
> input model I 
> >> have to set the buffer in Disable state, but which is my 
> input node?
> >> Is it nd_out? 
> >> If it is, then it doesn't import the nd_in node and 
> V_out_of_in node 
> >> connections?
> >> 
> >>          And what happened in Hyperlinx? Do I have to consider the 
> >> same criteria for the nodes?
> >> 
> >>          Best Regards,
> >> 
> >>          Ramiro
> >> 
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