Hi experts, once again (almost) the same question, but now other way around ... Recently I am getting lot of pressure to figure out how (in which format) to generate reasonable package model for IBIS models of our components. Possible solutions: ============== 1.) [Sparse Matrix] - contra: tools that generate [Sparse Matrix] models can't generate models for multidrop networks (i.e. one pin one the input, more than one pads on output), sloppy support from simulation tools 2.) ICM - contra: no available tool for automated extraction (and nobody wants to do it manually :-(((() 3.) Simple RLC parameters - contra: no information about cross-coupling RLC elements (coupling capacitances, mutual inductances, etc.) Workaround: use HSpice model of package, but how to "connect" it with IBIS model? IBIS 4.1 provides new keywords [External Circuit], [End External Circuit], [External Model], [End External Model] [Node Declarations], [End Node Declarations], [Circuit Call] and [End Circuit Call] to support multi-lingual models - nice! Main question: Is there a possibility to replace package description in [Pin] section of [Component] with some [External Circuit] or [External Model] or [Node Declarations]? So what I want to do is to replace: [Pin] signal_name model_name R_pin L_pin C_pin | A1 VDD POWER 210m 4.07nH 0.27pF A2 NF NF_INPUT 168m 2.70nH 0.19pF . . . T8 VSS GND 127m 1.45nH 0.23pF T9 VSSQ GND 151m 2.18nH 0.13pF With a call to HSpice netlist [Circuit Call] Pointer to HSpice model of package [End Circuit Call] Or [External Circuit] Pointer to HSpice model of package [End External Circuit] Allows IBIS 4.1 something like that - is IBIS 4.1 planed for something like that at all? When I take a look (please see below) on a Figure 1 provided in IBIS specs, I am not sure that it is possible. | The placement of these keywords within the hierarchy of IBIS is shown in the | following diagram: | | | |-- [Component] | | | ... | | |-- [Node Declarations] | | |-- [End Node Declarations] | | | ... | | | ... | | |-- [Circuit Call] | | |-- [End Circuit Call] | | | ... | | ... | |-- [Model] | | | ... | | |-- [External Model] | | |-- [End External Model] | | | ... | | ... | |-- [External Circuit] | |-- [End External Circuit] | | ... Has anybody some idea about it? Many thanks for every answer! Best regards / Mit freundlichen Grüßen / S po¹tovanjem Radovan Vuletiæ Infineon Technologies AG MP PD PDE MUC/10.2.236 AP 3 Am Campeon 1-12 D-85579 Neuebiberg Phone: +49 (0)89 234 20108 Fax (PC): +49 (0)89 234 955 5305 E-mail: radovan.vuletic@infineon.com |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis <optional e-mail address, if different> | subscribe ibis-users <optional e-mail address, if different> | unsubscribe ibis <optional e-mail address, if different> | unsubscribe ibis-users <optional e-mail address, if different> | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993Received on Thu Mar 23 08:15:30 2006
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