RE: [IBIS-Users] Warnings in V-t curves

From: Haller, Robert <rhaller_at_.....>
Date: Fri Nov 10 2006 - 09:26:00 PST
Sudarshan,

 SiSoft's SiAuditor has a Spice2ibis that works well without manual
intervention (assuming you have debugged spice models) .

Bob  

Robert Haller
Enterasys Networks
Core Routing - Hardware
Phone: 978-684-1340 
FAX:     978-684-1499

 

________________________________

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Sudarshan Honnudike
Sent: Friday, November 10, 2006 6:25 AM
To: Muranyi, Arpad
Cc: ibis-info@eda.org; ibis-users@eda.org; owner-ibis-users@eda.org
Subject: RE: [IBIS-Users] Warnings in V-t curves

 


Hi Arpad, 

As  I am working on only generating IBIS models for our buffers and
never looked into SI simulations,  it became difficult to me for
understanding those parameters. Yesterday I contacted one of our
customer and saw how they do SI simulations. That really helped me in
clearing some of my doubts that i had regarding Vmeas, Vref, Rref and
other parameters. 

I want to know is there any tool like spectre2IBIS like S2ibis?. I know
Spice is universally accepted language and hence only S2ibis is present.
But just as a clarification I wanted to know,  by any chance is there
any tool like spectre2IBIS as all our netlists and simulations decks are
in spectre. 

One more thing is,  will S2IBIS version 1.3 supports new features of
IBIS like 4.2 version of IBIS ? 

Thanks for your help! 

Best Regards,

Sudarshan HN
NXP Semiconductors/CTO /PLT
# 1 Murphy Road, Ulsoor, Bangalore - 560 008 , India.    
Ph:+91-80-40247073  
Fax: +91-80-4024 7855
seri:sudarsha@inpsblr
E-mail: sudarshan.honnudike@nxp.com 








"Muranyi, Arpad" <arpad.muranyi@intel.com> 

Sent by: 
owner-ibis-users@server.eda.org 

2006-11-08 10:13 PM 

To

<ibis-info@server.eda.org>
<ibis-users@server.eda.org> 

cc

 

Subject

RE: [IBIS-Users] Warnings in V-t curves 

Classification

 

 

 

 




Sudarshan, 
  
One thing that I haven't seen in any of the responses yet 
is the definition of Vmeas.  From the IBIS specification: 
  
| The Vmeas subparameter is the timing reference voltage level
| that the semiconductor vendor uses for the model.  Include
| Cref, Rref, Vref, and Vmeas information to facilitate
| board-level timing simulation. 
  
In other words, this is the voltage at which Tco is measured 
with the load circuit which is described by Rref, Cref, Vref. 
This information is usually available in the data sheet of a 
chip.  You need to have an understanding of what Tco means, 
how it is measured for the data sheet, and what it is used for 
in the timing spreadsheet together with the flight time and 
setup and hold time parameters.  Welcome to signal integrity! 
  
If you have a buffer that cannot drive through this value using 
the give Vref, Rref and Cref load, Vmeas becomes useless. 
  
Arpad 
=============================================================== 
  

________________________________

From: owner-ibis-users@server.eda.org
[mailto:owner-ibis-users@server.eda.org] On Behalf Of Sudarshan
Honnudike
Sent: Wednesday, November 08, 2006 12:22 AM
To: Lynne D. Green; Bob Ross
Cc: ibis-info@server.eda.org; ibis-users@server.eda.org
Subject: RE: [IBIS-Users] Warnings in V-t curves


Hi Bob & Lynne, 

I want to get some more clarifications on your answers. Lynne told that
, Vmeas should be between 
Vinl and Vinh. As Vin = 1.2 V , Vinl and Vinh would be 0.36 and 0.84 V
respectively . In that case Vmeas 
should be between 0.36 and 0.84. But if we connect R_fix to VDDE(2.5 V)
then in falling waveform, it will fall to 
1.25V. So in that case it will not cross Vmeas. 

So according to what Bob suggested,  Vmeas should be between 1.25 and
2.5 V. Please correct me if i am wrong in 
explanation. 

And as Bob said, it is an open drain cell. I have taken R_fix as 44 ohm.


I have changed R_ref to 50 ohm , Vmeas to 1.25 V and V_ref to 1.3V. Now
I am able to get rid of those warnings. 

From the cookbook I understood that Vref, Cref, Rref and Vmeas are AC
test load conditions. i.e, under this setup, 
buffer's delay information is measured. Can we use the same value of
R_fix, C_fix and V_fix to Rref , Cref and Vref 
parameters,  as under these parameters we measure the V-t waveforms. ? 

Please let me know your answers. 

Best Regards,

Sudarshan HN
NXP Semiconductors/CTO /PLT
# 1 Murphy Road, Ulsoor, Bangalore - 560 008 , India.    
Ph:+91-80-40247073  
Fax: +91-80-4024 7855
seri:sudarsha@inpsblr
E-mail: sudarshan.honnudike@nxp.com 






"Lynne D. Green" <lgreen22@mindspring.com> 

2006-11-08 12:22 PM 

 

To

"'Sudarshan Honnudike'" <sudarshan.honnudike@nxp.com>
<ibis-users@eda.org>
<ibis-info@eda.org> 

cc

 

Subject

RE: [IBIS-Users] Warnings in V-t curves 

Classification

 

 

 

 





Hello, Sudarshan,

1) Please use ibischk4.  This is capable of checking [IBIS ver] 3.2
models.
Bug fixes and enhancements are not patched back into older versions of
ibischk.

2) Rref, Cref, Vref and Vmeas are used for hardware testing, and should
be
on the I/O data sheet or on the I/O interface specification.  Vmeas is
normally between Vinl and Vinh.

3) Rref default value is 50 ohms.  1E+9 is not a reasonable value.

4) Vcc_core is not used in the IBIS model.  It is used only in
simulation to
drive the "core" pins (Enable, Data) on the I/O buffer.

5) There are two good sources of modeling help.  These are the
IBIS Cookbook http://www.eigroup.org/ibis/tools.htm 
and the IBIS Quality Checklist http://www.vhdl.org/pub/ibis/quality_wip/


Best regards,
Lynne


"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com- Lynne




________________________________

               From: owner-ibis-users@eda.org
[mailto:owner-ibis-users@eda.org] On
Behalf Of Sudarshan Honnudike
               Sent: Tuesday, November 07, 2006 9:25 PM
               To: ibis-users@eda.org; ibis-info@eda.org
               Subject: [IBIS-Users] Warnings in V-t curves
               
               

               Hi Experts, 
               
               I am getting the following warnings while running
ibischk3 on the
buffer models. 
               
               WARNING - Model 'bsppon3mchpt3v3_p': TYP VI curves cannot
drive
through Vmeas=0.6V 
                         given load Rref=1e+09 Ohms to Vref=0V 
               WARNING - Model 'bsppon3mchpt3v3_p': MIN VI curves cannot
drive
through Vmeas=0.6V 
                         given load Rref=1e+09 Ohms to Vref=0V 
               WARNING - Model 'bsppon3mchpt3v3_p': MAX VI curves cannot
drive
through Vmeas=0.6V 
                         given load Rref=1e+09 Ohms to Vref=0V 
               
               Our buffer models will be operating at 2 voltages
coreside voltage
and pad side voltage. 
               In this case, coreside voltage(VDD) is 1.2 v and pad side
voltage(VDDE) is 2.5v. So in V-t waveforms 
               
               1. Rising waveform with R_fix connected to VDDE(2.5v):
waveforms are
varying from 1.249v to 2.5v 
               2. Falling waveform with R_fix connected to
VDDE(2.5v):waveforms are
varying from 2.5v to  1.254v 
               
               I have a confusion regarding the selection of Vmeas.
Should it be
half of corevoltage(1.2/2) or half of pad voltage (2.5/2)? 
               Please let me know how this parameter is used in the
application
(may be in SI or somewhere else). 
               
               I even changed Vmeas to 1.25 V. Still I am getting
warnings like 
               
               WARNING - Model 'bsppon3mchpt3v3_p': TYP VI curves cannot
drive
through Vmeas=1.25V 
                         given load Rref=1e+009 Ohms to Vref=0V 
               WARNING - Model 'bsppon3mchpt3v3_p': MIN VI curves cannot
drive
through Vmeas=1.25V 
                         given load Rref=1e+009 Ohms to Vref=0V 
               WARNING - Model 'bsppon3mchpt3v3_p': MAX VI curves cannot
drive
through Vmeas=1.25V 
                         given load Rref=1e+009 Ohms to Vref=0V 
               
               Please let me know your answers. 
               
               Best Regards,
               
               Sudarshan HN
               NXP Semiconductors/CTO /PLT
               # 1 Murphy Road, Ulsoor, Bangalore - 560 008 , India.    
               Ph:+91-80-40247073  
               Fax: +91-80-4024 7855
               seri:sudarsha@inpsblr
               E-mail: sudarshan.honnudike@nxp.com







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Received on Fri, 10 Nov 2006 12:26:00 -0500

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