For CMOS devices three things happen in the min corner. First the edge rate
gets slower. Second the drive strength weakens. A slower edge rate will
change timing. A weaker driver will not swing as many Volts in the output.
So with a slower edge and a lower swing it take longer for the edge to reach
the thresholds, Vinl and Vinh. And third, the prop delay increases.
Conversely, the max corner is faster and stronger. Like the min corner the
timing changes and more important the faster edge rate will cause more
crosstalk and more signal integrity issues.
Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
503-430-1285 FAX
tom@teraspeed.com
www.teraspeed.com
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of ji xiao
Sent: Friday, April 16, 2010 5:37 AM
To: ibis-users
Subject: [IBIS-Users] what is the use of minimum and maximum data in IBIS?
Hi,guys. Usually in IBIS simulation, we use typ data, then what's the use of
min. and max. data?
Some papers said," a slow model can be created by combining the min.
currents with max. ramp time and max. package element values. The slow model
can be used to determine the propagation time". However, in my
understanding, IBIS model can only simulate the buffer delay time. Is it
true that it can be used to determine the propagation time in that way?
Thanks and regards,
Yuancheng
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