Date: Thu Aug 04 2011 - 15:46:03 PDT
Hi Anand,
Are you using the same load circuit in Spice as in the IBIS simulator? For example, if you're using an RLC component terminator in Spice then it pays to use the same RLC circuit in IBIS simulator (as opposed to a transmission line).
Another suggestion would be: perhaps your S2I file is only setup to model the output buffer structure (typically the case). It seems that you are incorporating a bandgap generator in the Spice deck to reach 2.6V low logic voltage, so its contribution to the ripple would be modeled in Spice but obviously ignored by an IBIS extraction of an output buffer structure.
-Graham
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Anand Ramalingam
Sent: Thursday, August 04, 2011 6:29 PM
To: IBIS
Subject: [IBIS-Users] simulating ringing behavior
I want to simulate the ringing behavior found in following signal in IBIS. This snapshot is from the spice simulation.
(logic high - 3.3v ; logic low - ringing between 2.65 - 2.75v)
[cid:image001.png@01CC52D6.C31C9110]
The ibis simulation yields the following waveform
[cid:image002.png@01CC52D6.C31C9110]
The logic low's ringing is not captured in IBIS.
I tried changing the numerical algorithm from TRAP to GEAR in spice simulation to make sure it is not a numerical artifact. The following are the rising and falling tables
|
[Rising Waveform]
R_fixture = 50
V_fixture = 3.3
|
| Time V(typ) V(min) V(max)
|
0 2.72122 NA NA
8.3554p 2.72933 NA NA
66.4303p 3.0285 NA NA
0.109129n 3.15831 NA NA
0.130693n 3.19638 NA NA
0.160088n 3.23045 NA NA
0.204145n 3.25956 NA NA
0.263155n 3.27863 NA NA
0.494298n 3.29621 NA NA
31.25n 3.29998 NA NA
|
[Falling Waveform]
R_fixture = 50
V_fixture = 3.3
|
| Time V(typ) V(min) V(max)
|
0 3.30001 NA NA
77.4596p 3.2744 NA NA
0.142103n 2.91665 NA NA
0.446801n 2.67684 NA NA
29.4488n 2.65867 NA NA
29.9943n 2.76514 NA NA
30.1222n 2.65842 NA NA
30.668n 2.76505 NA NA
30.7944n 2.65829 NA NA
31.25n 2.76182 NA NA
|
As one can see in the Falling table the waveform cycles between 2.65 and 2.76 but it does not get reflected when the file is simulated.
Any pointers in getting ringing behavior on the ibis simulation would be helpful.
Is there any setting in the spice file that needs to set? I am using the following:
+ typ=typ
+ ramp_fwf =1
+ ramp_rwf =1
Thanks
Anand
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