To All: The IBIS Open Forum is holding an Asian IBIS Summit Meeting in Shanghai, China on Friday, November 9, 2012. Some of the planned and tentative titles are under AGENDA below. Several companies listed below are co-sponsoring this large event to be held again at the Parkyard Hotel, Shanghai. For travel consideration, two other Asian IBIS Summits follow this event: Hsinchu, Taiwan, Tuesday, November 13, Ambassador Hotel Hsinchu Yokohama, Japan, Friday, November 16, Pacifico Yokohama Lance Wang IO Methodology Inc. Bob Ross Teraspeed Consulting Group ----------------------------------------------------------------------- ASIAN IBIS SUMMIT (SHANGHAI) FIFTH CALL FOR PARTICIPATION ----------------------------------------------------------------------- http://www.eda.org/ibis/summits/nov12a/announcement_chinese.pdf ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ A S I A N I B I S S U M M I T (S H A N G H A I ) Time/Date: Tuesday, November 9, 2012, 8:00 AM to 5:30 PM Meeting starts at 9:00 AM Location: Parkyard Hotel Shanghai 699 Bibo Road Zhangjiang Hi-Tech Park Shanghai 201203 P.R. China http://www.parkyard.com/en/hotel_index.aspx?currenthotelid=6 Content: Presentations and Discussions Purpose: Solicit and exchange IBIS and interconnect model related information and ideas. Primary Sponsor: Huawei Technologies Co-sponsors (in alphabetical order): Agilent Technologies, ANSYS, Cadence Design Systems, Intel Corporation, IO Methodology, Synopsys, and ZTE Corporation. Cost: FREE, including refreshments and buffet lunch Vendors: Some vendors will have information tables Contact us for details regarding sponsorship. BACKGROUND We have held seven successful meetings in Shenzhen, Shanghai and Beijing. This year we are meeting again in Shanghai where many Chinese and foreign high technology companies operate. These events are archived along with all our other Summits: http://www.eda.org/pub/ibis/summits/ Our objective is to reach out internationally to communicate with the local experts and to learn of regional concerns. CONFERENCE LANGUAGE The conference language is English, but we will plan for technical translations in English and Mandarin. So presenters can optionally deliver in Mandarin as long as an English version of the material is available. IBIS SUMMIT This meeting will be conducted as a formal IBIS Summit Meeting. Presentations will be archived in an electronic format on our Summits site, and minutes of the meeting will be issued. However, no formal decisions requiring votes will be planned. CALL FOR PARTICIPANTS People involved in IBIS and interconnect model development, EDA tool development, and digital circuit design are invited to participate in the Summit meeting. If you plan to participate, please register using the information below (in English): Name: E-mail address: Company: Top-level Web Link: Country: Telephone: Send to BOTH: Lance Wang, IO Methology Inc. lwang@iometh.com Bob Ross, Teraspeed Consulting Group bob@teraspeed.com SIGNUP DEADLINE: November 2, 2012 AGENDA 8:15 - 9:00 Vendor table setup and tables 8:30 - 9:00 Sign in 9:00 - 12:00 Presentations 12:00 - 13:30 Free buffet lunch, vendor tables 13:30 - 17:30 Presentations The Agenda is still being developed as topics and presentations are submitted. Below is a tentative list of planned presentations. Intel Corporation (tentative topic) IBIS Advances topic Cadence Design Systems and University of Illinois IBIS Modeling Using Latency Insertion Method (LIM) Huawei Technologies (tentative topic) A Quick Channel Performance Estimation Method Agilent Technologies Efficient End-to-end Simulations of 25G Optical Links ZTE Corporation Analysis of the Impact of Crosstalk in High-Speed Serial Links Cadence Design Systems Designing DDR3/4 System Using Static Timing Analysis in Conjunction with IBIS Simulations ANSYS (tentative topic) DDR3 and DDR4 topic Cadence Design Systems Chip PDN Model for Power Aware Signal Integrity Analysis Teraspeed Consulting Group (tentative topic) IBIS Parser Update topic Celestica (tentative topic) IBIS-AMI Correlation IO Methodology IBIS Validation Method Review LIST OF NEARBY HOTELS AND TRAVEL RULES Hotels in all price ranges can be found through internet searches. Comply with your travel rules, such as indicated in the link below to China and Shanghai. Work with your travel agent. Notify us as a sign-up comment if you need assistance. Visas, if needed, should fall in the visit/business category: http://travel.state.gov/travel/cis_pa_tw/cis/cis_1089.html ------------------------------------------------------------------ To All: The IBIS Open Forum is holding an Asian IBIS Summit Meeting in Shanghai, China on Friday, November 9, 2012. Some of the planned and tentative titles are under AGENDA below. Several companies listed below are co-sponsoring this large event to be held again at the Parkyard Hotel, Shanghai. For travel consideration, two other Asian IBIS Summits follow this event: Hsinchu, Taiwan, Tuesday, November 13, Ambassador Hotel Hsinchu Yokohama, Japan, Friday, November 16, Pacifico Yokohama Lance Wang IO Methodology Inc. Bob Ross Teraspeed Consulting Group ----------------------------------------------------------------------- ASIAN IBIS SUMMIT (SHANGHAI) FIFTH CALL FOR PARTICIPATION ----------------------------------------------------------------------- http://www.eda.org/ibis/summits/nov12a/announcement_chinese.pdf ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ A S I A N I B I S S U M M I T (S H A N G H A I ) Time/Date: Tuesday, November 9, 2012, 8:00 AM to 5:30 PM Meeting starts at 9:00 AM Location: Parkyard Hotel Shanghai 699 Bibo Road Zhangjiang Hi-Tech Park Shanghai 201203 P.R. China http://www.parkyard.com/en/hotel_index.aspx?currenthotelid=6 Content: Presentations and Discussions Purpose: Solicit and exchange IBIS and interconnect model related information and ideas. Primary Sponsor: Huawei Technologies Co-sponsors (in alphabetical order): Agilent Technologies, ANSYS, Cadence Design Systems, Intel Corporation, IO Methodology, Synopsys, and ZTE Corporation. Cost: FREE, including refreshments and buffet lunch Vendors: Some vendors will have information tables Contact us for details regarding sponsorship. BACKGROUND We have held seven successful meetings in Shenzhen, Shanghai and Beijing. This year we are meeting again in Shanghai where many Chinese and foreign high technology companies operate. These events are archived along with all our other Summits: http://www.eda.org/pub/ibis/summits/ Our objective is to reach out internationally to communicate with the local experts and to learn of regional concerns. CONFERENCE LANGUAGE The conference language is English, but we will plan for technical translations in English and Mandarin. So presenters can optionally deliver in Mandarin as long as an English version of the material is available. IBIS SUMMIT This meeting will be conducted as a formal IBIS Summit Meeting. Presentations will be archived in an electronic format on our Summits site, and minutes of the meeting will be issued. However, no formal decisions requiring votes will be planned. CALL FOR PARTICIPANTS People involved in IBIS and interconnect model development, EDA tool development, and digital circuit design are invited to participate in the Summit meeting. If you plan to participate, please register using the information below (in English): Name: E-mail address: Company: Top-level Web Link: Country: Telephone: Send to BOTH: Lance Wang, IO Methology Inc. lwang@iometh.com Bob Ross, Teraspeed Consulting Group bob@teraspeed.com SIGNUP DEADLINE: November 2, 2012 AGENDA 8:15 - 9:00 Vendor table setup and tables 8:30 - 9:00 Sign in 9:00 - 12:00 Presentations 12:00 - 13:30 Free buffet lunch, vendor tables 13:30 - 17:30 Presentations The Agenda is still being developed as topics and presentations are submitted. Below is a tentative list of planned presentations. Intel Corporation (tentative topic) IBIS Advances topic Cadence Design Systems and University of Illinois IBIS Modeling Using Latency Insertion Method (LIM) Huawei Technologies (tentative topic) A Quick Channel Performance Estimation Method Agilent Technologies Efficient End-to-end Simulations of 25G Optical Links ZTE Corporation Analysis of the Impact of Crosstalk in High-Speed Serial Links Cadence Design Systems Designing DDR3/4 System Using Static Timing Analysis in Conjunction with IBIS Simulations ANSYS (tentative topic) DDR3 and DDR4 topic Cadence Design Systems Chip PDN Model for Power Aware Signal Integrity Analysis Teraspeed Consulting Group (tentative topic) IBIS Parser Update topic Celestica (tentative topic) IBIS-AMI Correlation IO Methodology IBIS Validation Method Review LIST OF NEARBY HOTELS AND TRAVEL RULES Hotels in all price ranges can be found through internet searches. Comply with your travel rules, such as indicated in the link below to China and Shanghai. Work with your travel agent. Notify us as a sign-up comment if you need assistance. Visas, if needed, should fall in the visit/business category: http://travel.state.gov/travel/cis_pa_tw/cis/cis_1089.html ------------------------------------------------------------------ -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail mikelabonte@eda-stds.org |or ibis-request@eda-stds.org | |IBIS reflector archives exist under: | | http://www.eda-stds.org/ibis/email_archive/ Recent | http://www.eda-stds.org/ibis/users_archive/ Recent | http://www.eda-stds.org/ibis/email/ E-mail since 1993Received on Fri Oct 5 14:19:13 2012
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