All: Attached is the Agenda for a full meeting with 11 presentations. We look forward to seeing you in Shanghai. Registration information is at the end. Lance and Bob ------------------------------------------------------------------ A S I A N I B I S S U M M I T I N F O R M A T I O N Time/Date: 8:15 - 17:30, Tuesday November 15, 2013 Location: Parkyard Hotel Shanghai 699 Bibo Road Zhangjiang Hi-Tech Park Shanghai 201203 P.R. China Rooms: Ballroom ABC (Look for signs) Sponsors: Huawei Technologies (Primary) Agilent Technologies ANSYS Cadence Design Systems Intel Corporation IO Methodology Synopsys Teledyne LeCroy ------------------------------------------------------------------ I B I S S U M M I T M E E T I N G A G E N D A 8:15 SIGN IN - Vendor Tables Open at 8:30 8:45 Welcome - Li, JinJun (Huawei Technologies, China) - Wang, Lance (Vice-Chair IBIS Open Forum) (IO Methodology, USA) 9:00 Introducing IBIS 6.0 (.pptx) Mirmak, Michael (Intel Corporation, USA) 9:30 IBIS Summary Documents Ross, Bob (Teraspeed Consulting Group, USA) 10:00 More on IBIS Modeling for Load-Dependent Current-Mode Differential Drivers Wang, Lance (IO Methodology, USA) 10:30 BREAK (Refreshments and Vendor Tables) 10:50 Combined I-V Table Checking Problem (.pptx) Ross, Bob*; Sun, YingXin** and Li, Joy** (*Teraspeed Consulting Group and **Cadence Design Systems, USA) 11:20 An Advanced Behavioral Buffer Model With Over-Clocking Solution Sun, YingXin and Chen, Raymond Y. (Cadence Design Systems, USA) 12:00 FREE BUFFET LUNCH (Hosted by Sponsors) - Vendor Tables 13:30 When Could PCB and PKG PDN Lumped Loop be Extracted Separately? Xu, ZhenRong (Huawei Technologies, China) 14:00 DDRn Interface Signoff Analysis with Distributed Chip IO Interconnect Model Guo, Steven*; Qin, ZuLi**; and Zhong, ZhangMin** (*Spreadtrum and **Cadence Design Systems, China) 14:45 IBIS Model for IO-SSO Analysis Lay, Thunder and Lin, Jack W.C. (Cadence Design Systems, China) 15:20 BREAK (Refreshments and Vendor Tables) 15:40 Modeling, Extracting and Verification of VCSEL Model for IBIS AMI Yuan, ZhaoKai (Agilent technologies, China) 16:10 Adaptive Crosstalk Cancellation Block for SERDES and its AMI Implementation Kukal, Taranjit#; Sharma, Shivani#; and Zhong, ZhangMin## (Cadence Design Systems, #India, ##China) 16:50 Anisotropic Substrate for IBIS-AMI Simulation Hsuan, Naijen (ANSYS, China) 17:20 Concluding Items 17:30 END OF IBIS SUMMIT MEETING ------------------------------------------------------------------ To Register by November 12, 2013: Name: E-mail address: Company: Top-level Web Link: Country: Telephone: Send to BOTH: Lance Wang, IO Methodology Inc. lwang@iometh.com Bob Ross, Teraspeed Consulting Group bob@teraspeed.com -- Bob Ross Teraspeed Consulting Group, LCC http://www.teraspeed.com bob@teraspeeed.com Direct : 503-246-8048 Teraspeed Labs: 971-279-5325 Headquarters: 401-284-1827 Teraspeed is a registered service mark of Teraspeed Consulting Group LLC -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail mikelabonte@eda-stds.org |or ibis-request@eda-stds.org | |IBIS reflector archives exist under: | | http://www.eda-stds.org/ibis/email_archive/ Recent | http://www.eda-stds.org/ibis/users_archive/ Recent | http://www.eda-stds.org/ibis/email/ E-mail since 1993Received on Mon Nov 4 16:08:36 2013
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