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From: "Mirmak, Michael" <michael.mirmak@intel.com>
To: "'ibis@vhdl.org'" <ibis@vhdl.org>
Cc: "'ibischk-bug@vhdl.org'" <ibischk-bug@vhdl.org>
Subject: Problems noted with posted v3.2.6 parser -- requires BUG filing?
Date: Fri, 5 Jan 2001 17:26:30 -0800 
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The most recent edition of the parser (v.3.2.6, DOS32) seems to have a
problem 
with models which lack a [Pullup] keyword.  It flags models which 
have a Model_type of I/O_open_drain, which would not require [Pullup].

I've enclosed an IBIS model below to demonstrate the warning.  Is this 
warning intentional?  Should this problem be filed as BUG53?

Thanks!

- Michael Mirmak, Intel Corp.

|***********************************************************************
|
[IBIS Ver]       3.2
[File Name]      bug53.ibs
[File Rev]       0.0
[Date]           05-January-2001
[Source]         File created from specification
[Notes]          Using the IBISCHK3 v3.2.6 parser, the following file
                 will generate a single warning regarding the lack of
                 a [Pullup] section.  This warning does not appear in
                 the v.3.2.5 parser's output.  
|
[Disclaimer]
    (C) Copyright 2001 Intel Corp.
    All rights reserved
    This model is for demonstration purposes only,
|
[Component]      GENERIC_IBIS
[Manufacturer]   Intel Corp.
|
[Package]
|                typ        min        max
R_pkg            6.0mO      5.0mO      7.0mO
L_pkg            5.0nH      2.0nH      8.0nH
C_pkg            1.0pF      0.5pF      1.5pF
|
|
[Pin]     signal_name      model_name    R_pin    L_pin    C_pin
    1     TestSignal1       TestModel1
|
|************************************************************************
|
[Model]          TestModel1
Model_type       I/O_open_drain
Polarity         Non-Inverting
Vinl = 800mV
Vinh = 2.0V
|
Cref = 10.0pF
Vref = 0.0
Vmeas = 0.4
C_comp                    5.00pF            4.00pF            6.00pF
|
|
[Temperature Range]       27.00             100.00            0.00
[Voltage Range]           5.0V             4.75V              5.25V
|
[Pulldown]
| voltage     I(typ)              I(min)              I(max)
|
  -5.0000      -40.0m          -34.00m           -45.00m
  -4.0000      -39.0m          -33.00m           -43.00m
   0.0000       0.0m             0.00m             0.00m
   5.0000       40.0m            34.0m            45.00m 
  10.0000       45.0m            40.0m            49.00m
|
|
[GND Clamp]
| voltage     I(typ)              I(min)              I(max)
|
  -5.0000    -3900.0mA         -3800.00mA           -4000.00m
  -0.7000      -80.0m            -75.00m              -85.00m
  -0.6000      -22.0m            -20.00m              -25.00m
  -0.5000       -2.4m             -2.00m               -2.90m
  -0.4000        0.0A              0.0A                 0.00A 
   5.0000        0.0A              0.0A                 0.00A
|
[Power Clamp]
| voltage     I(typ)              I(min)              I(max)
|
  -5.0000     4450.00m            NA                   NA
  -0.7000       95.0m             NA                   NA
  -0.6000       23.0m             NA                   NA
  -0.5000        2.4m             NA                   NA
  -0.4000        0.0m             NA                   NA
   0.0000        0.0m             NA                   NA
|
[Ramp]
|variable        typ              min                  max
dV/dt_r          2.20/1.06n       1.92/1.28n           2.49/650p
dV/dt_f          2.46/1.21n       2.21/1.54n           2.70/770p
R_load = 300ohms
|
|
|************************************************************************
[End]
|
| The new v3.2.6 parser gives the following spurious output:
|
|IBISCHK3 V3.2.6
|
|Checking bug53.ibs for IBIS 3.2 Compatibility...
|
|WARNING - [Model] TestModel1 has no description of the buffer's high state
|         DC drive characteristics (no [Pullup] table).  This warning
|         can be silenced by changing the Model_type or by adding a
|         [Pullup] table.
|
|Errors  : 0
|Warnings: 1
|
|File Passed
|
|
|


 
From owner-ibis Fri Jan  5 18:31:11 2001
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To All:

New ibischk3 executables designate Version 3.2.6 have been uploaded
in the ibischk3 link from the EIA IBIS home page Free Tools site.

These executables are available at

  http://www.eda.org/pub/ibis/ibischk3/

Thanks to Guy de Burgh and Matthew Flora for generating them.  The
Linux executable should be available shortly.  The older Version 3.2.5
executables are archived under the same directory.

Bob Ross
Mentor Graphics
 
From owner-ibis Mon Jan  8 16:02:22 2001
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To: "Mirmak, Michael" <michael.mirmak@intel.com>
CC: "'ibis@vhdl.org'" <ibis@vhdl.org>,
   "'ibischk-bug@vhdl.org'" <ibischk-bug@vhdl.org>
Subject: Re: Problems noted with posted v3.2.6 parser -- requires BUG filing?
References: <B277BC01AFFAD211AC4E00A0C95D740303F78FA3@fmsmsx66.fm.intel.com>
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Michael:

It appears that BUG34 may have been implemented incorrectly.
Thank you for reporting this.

This will be filed as BUG53.  As we check ibischk3.2.6,
we might issue ibischk3.2.7 to correct any problems found.

Bob Ross
Mentor Graphics


"Mirmak, Michael" wrote:
> 
> The most recent edition of the parser (v.3.2.6, DOS32) seems to have a
> problem
> with models which lack a [Pullup] keyword.  It flags models which
> have a Model_type of I/O_open_drain, which would not require [Pullup].
> 
> I've enclosed an IBIS model below to demonstrate the warning.  Is this
> warning intentional?  Should this problem be filed as BUG53?
> 
> Thanks!
> 
> - Michael Mirmak, Intel Corp.
> 
> |***********************************************************************
> |
> [IBIS Ver]       3.2
> [File Name]      bug53.ibs
> [File Rev]       0.0
> [Date]           05-January-2001
> [Source]         File created from specification
> [Notes]          Using the IBISCHK3 v3.2.6 parser, the following file
>                  will generate a single warning regarding the lack of
>                  a [Pullup] section.  This warning does not appear in
>                  the v.3.2.5 parser's output.
> |
> [Disclaimer]
>     (C) Copyright 2001 Intel Corp.
>     All rights reserved
>     This model is for demonstration purposes only,
> |
> [Component]      GENERIC_IBIS
> [Manufacturer]   Intel Corp.
> |
> [Package]
> |                typ        min        max
> R_pkg            6.0mO      5.0mO      7.0mO
> L_pkg            5.0nH      2.0nH      8.0nH
> C_pkg            1.0pF      0.5pF      1.5pF
> |
> |
> [Pin]     signal_name      model_name    R_pin    L_pin    C_pin
>     1     TestSignal1       TestModel1
> |
> |************************************************************************
> |
> [Model]          TestModel1
> Model_type       I/O_open_drain
> Polarity         Non-Inverting
> Vinl = 800mV
> Vinh = 2.0V
> |
> Cref = 10.0pF
> Vref = 0.0
> Vmeas = 0.4
> C_comp                    5.00pF            4.00pF            6.00pF
> |
> |
> [Temperature Range]       27.00             100.00            0.00
> [Voltage Range]           5.0V             4.75V              5.25V
> |
> [Pulldown]
> | voltage     I(typ)              I(min)              I(max)
> |
>   -5.0000      -40.0m          -34.00m           -45.00m
>   -4.0000      -39.0m          -33.00m           -43.00m
>    0.0000       0.0m             0.00m             0.00m
>    5.0000       40.0m            34.0m            45.00m
>   10.0000       45.0m            40.0m            49.00m
> |
> |
> [GND Clamp]
> | voltage     I(typ)              I(min)              I(max)
> |
>   -5.0000    -3900.0mA         -3800.00mA           -4000.00m
>   -0.7000      -80.0m            -75.00m              -85.00m
>   -0.6000      -22.0m            -20.00m              -25.00m
>   -0.5000       -2.4m             -2.00m               -2.90m
>   -0.4000        0.0A              0.0A                 0.00A
>    5.0000        0.0A              0.0A                 0.00A
> |
> [Power Clamp]
> | voltage     I(typ)              I(min)              I(max)
> |
>   -5.0000     4450.00m            NA                   NA
>   -0.7000       95.0m             NA                   NA
>   -0.6000       23.0m             NA                   NA
>   -0.5000        2.4m             NA                   NA
>   -0.4000        0.0m             NA                   NA
>    0.0000        0.0m             NA                   NA
> |
> [Ramp]
> |variable        typ              min                  max
> dV/dt_r          2.20/1.06n       1.92/1.28n           2.49/650p
> dV/dt_f          2.46/1.21n       2.21/1.54n           2.70/770p
> R_load = 300ohms
> |
> |
> |************************************************************************
> [End]
> |
> | The new v3.2.6 parser gives the following spurious output:
> |
> |IBISCHK3 V3.2.6
> |
> |Checking bug53.ibs for IBIS 3.2 Compatibility...
> |
> |WARNING - [Model] TestModel1 has no description of the buffer's high state
> |         DC drive characteristics (no [Pullup] table).  This warning
> |         can be silenced by changing the Model_type or by adding a
> |         [Pullup] table.
> |
> |Errors  : 0
> |Warnings: 1
> |
> |File Passed
> |
> |
> |
 
From owner-ibis Tue Jan  9 13:04:49 2001
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From: guy@camarillo.innoveda.com (Guy de Burgh)
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To: ibis@eda.org
Subject: EIA IBIS Open Forum Meeting Minutes


Date: 1/9/01

SUBJECT: 1/5/01 EIA IBIS Open Forum Meeting Minutes

VOTING MEMBERS AND 2001 PARTICIPANTS LIST:
3Com (& CommWorks)             Roy Leventhal*
Agilent                        (Mark Chang)
Ansoft Corporation             (Eric Bracken)
Applied Simulation Technology  (Raj Raghuram)
Avanti                         (Chen Hongyu)
Brocade Communications         (Robert Badal)
Cadence Design                 Ian Dodd*
Cisco Systems                  (Syed Huq)
Compaq                         (Peter LaFlamme)
Cypress                        (Rajesh Manapat)
EMC Corporation                (Fabrizio Zanella)
Fairchild Semiconductor        (Craig Klem)
IBM                            Michael Cohen*, Greg Edlund*
Innoveda (& HyperLynx)         Guy de Burgh*, John Angulo*
Intel Corporation              Stephen Peters*, Arpad Muranyi*, Dave Lorang*,
                               Michael Mirmak*
LSI Logic                      Larry Barnes*
Mentor Graphics                Bob Ross*
Micron Technology              Randy Wolff*, Yong Phan*
Mitsubishi                     (Tam (Tom) Cao)
Molex Incorporated             (Gus Panella)
Motorola                       (Ron Werner)
National Semiconductor         Milt Schwartz*
Nortel Networks                Calvin Trowell*
North East Systems Associates  (Edward Sayre)
Philips Semiconductor          (D.C. Sessions)
Quantic EMC                    (Mike Ventham)
Robinson-Nugent, Inc.          (Alexander Barr)
Siemens AG                     (Gerald Bannert)
SiQual                         (Scott McMorrow)
Texas Instruments              (Thomas Fisher)
Time Domain Analysis Systems   (Dima Smolyansky
Tyco Electronics               (Russell Moser)
Via Technologies               (Weber Chuang)
Zuken (& Incases)              (Werner Rissiek)

OTHER PARTICIPANTS IN 2001:
EIA                            Cecilia Fleming*
Foundary Networks              Bertram Chan*
Independent, Consultant        Al Davis*

In the list above, attendees at the meeting are indicated by *. Principal
members or other active members who have not attended are in parentheses.
Participants who no longer are in the organization are in square brackets.

Upcoming Meetings:  The bridge numbers for future IBIS teleconferences are as
follows:

  Date                Bridge Number    Reservation #    Passcode
  January 29, 2001 - IBIS Summit Meeting, No Teleconference

All meetings are 8:00 AM to 9:55 AM Pacific Time.  We try to have agendas out
7 days before each Open Forum and meeting minutes out within 7 days after.
When you call into the meeting, ask for the IBIS Open Forum hosted by Will
Hobbs and give the reservation number and passcode.

NOTE: "AR" = Action Required.

-------------------------------- MINUTES -------------------------------------
INTRODUCTIONS AND MEETING QUORUM
Bertram Chan joined from Foundary Networks.  Bertram described doing EMC and
SI and timing analysis in recent designs.  His interest in IBIS is in the
quality of vendor supplied IBIS models.  Bob Ross commented that this will be
a topic at the next IBIS Summit Meeting.


MEMBERSHIP UPDATE AND TREASURER'S REPORT
Cecilia Fleming reported that she has received about 15 payments so far for
the 33 invoices issued in December 2000 for 2001 membership.  Many payments
are telephoned in and made by credit card.  The telephone number is on the
invoice.  Bob Ross stated that it is often administratively more efficient in
many organizations.  Bob is still seeking a representative for one company.  He
also noted that HyperLynx is now combined with Innoveda in the IBIS
Participants list.


REVIEW OF MINUTES AND AR'S
The December 8, 2000 IBIS Minutes were approved without change.

The AR's will be discussed during the meeting.


MISCELLANY/ANNOUNCEMENTS
Bob Ross stated that the December 8, 2000 uploaded Minutes document the IBIS
meeting participation for 2000.  The new list is started with these Minutes
for 2001.  All member companies are retained, but non-member companies are
dropped.


PRESS AND WEB PAGE UPDATES
Bob Ross reported that Greg Edlund sent out the announcements of C code and
of Accuracy Report under

  http://www.eda.org/pub/ibis/accuracy/


NEW MODELS AVAILABLE, LIBRARY UPDATE
Bob Ross reported that some IBIS models exist from Fairchild Semiconductor
for the EnSigna(TM) products at:

  http://www.fairchildsemi.com/designcenter/labs/ensigna/resources/models.html


OPENS FOR NEW ISSUES
Bob Ross - Add [IBIS List] to ibis email.


INTERNATIONAL/EXTERNAL PROGRESS
- IEC 62014-1 (IBIS Version 3.2) - Cecilia Fleming stated that she requested
status information from IEC TC 93 Secretariat, Greg Ledenbach, but has not yet
received a response.

- pr EIAJ ED-5302 Standard for I/O Interface Model for Integrated Circuits
(IMIC) - No report.

- IEC PWI 93-1 Models of Integrated Circuits for EMI Behavioral Simulation
(formerly designated as IEC 93/67/NP IBIS and EMC Simulation) - Bob Ross
expects Jean-Claude Perrin to give more information at the European IBIS
Summit Meeting in Munich, Germany on March 16, 2001.

- JEDEC JC-16 - Modeling and Testing - Bob Ross had no report from the JEDEC
JC-16 and JC-42 meetings in December 2000.  Cecilia Fleming stated that the
JEDEC minutes are still being prepared.  She will send Bob a copy when they
are available.


IBIS LIBRARIAN
Bob Ross restated from the last meeting that Mike LaBonte has resigned the
IBIS Librarian position as a result of accepting a new job at a start-up
company.  Bob called for nominations for the new position.  

Bob nominated Michael Cohen, but he declined based on job responsibility
issues.  Bob then nominated Roy Leventhal.  With no further nominations, Bob
called for a vote.

Roy was unanimously elected to the IBIS Librarian position.  Roy stated that
his group is currently being formed as CommWorks Corporation, a wholly owned
subsidiary of 3Com.  Roy's address is at the end of the Minutes.


DESIGNCON 2001 IBIS SUMMIT MEETING
Bob Ross stated again the basic information that the next IBIS Summit Meeting
is planned on January 29, 2001 in Santa Clara, California along with
DesignCon 2001 (January 29 - February 1, 2001).  National Semiconductor is a
co-sponsor of this meeting and will provide the lunch.  Milt Schwartz is
planning for 50 lunches.  DesignCon is the other co-sponsor as a result of
IBIS Associate Sponsorship of DesignCon 2001.

Bob mentioned that we have a passive Booth #861.  It is free from DesignCon
as part of our co-sponsorship.  In the past we have had some electronic
demonstrations related to the Accuracy and Connector activities.  Innoveda
is providing the booth and backdrop.  Guy de Burgh requested IBIS member 
companies to review existing company logos or to provide new logos with
Velcro backing for a visual backdrop.  The booth will be primarily a meeting
place for interaction.  Bob will bring some EIA literature.

Bob provided some tentative additions to the program (the titles may change):

  "LVDS Modeling", Hazem Hegany and Mohammed Korany, Mentor Graphics
  "Modeling Approach for Pre-emphasis Buffers", Hazem Hegany and Mohammed
     Korany, Mentor Graphics
  "The Joy of Downloaded Models" Tom Dagostino, Mentor Graphics

The existing program so far includes:

  "Spice 2 IBIS Accuracy Report", Scott McMorrow, Siqual
  "Connector Specification Discussion", Gus Panella, Molex
  "IBIS Futures", Stephen Peters, Intel
  "SCSI-3 Compensation Modeling" Larry Barnes, LSI Logic.
 
Roy Leventhal will not be able to attend, so his presentation is removed:

  "Modeling Semiconductor Components from 30,000 Feet", Roy Leventhal, 3Com

Bob expected another IBIS-Futures presentation to be determined at the next
Working Group Meeting, probably by Al Davis:

  "IBIS-X Prototype", Al Davis, Consultant

Bob stated that we will have enough presentations and discussion items for a
full day meeting.  Bob may have an introductory presentation.  As before,
interactive discussion and even Ad-Hoc presentations will be encouraged.

Milt Schwartz reported about 10 new signups as a result of the last
announcement sent in late December 2000.  Bob estimates over 20 people so far,
including several that indicated they were attending at this meeting.  So we
are on target for the usual 30 to 50 attendees.  Bob will work with Milt to
add the program topics to the next announcement planned for next week.  A
final announcement should follow later to get a more accurate estimate for
participation and lunch (Milt has reserved room for 50).


DATE 2001 EUROPEAN IBIS SUMMIT MEETING
Bob Ross stated for the Minutes that the early plans for the European IBIS
Summit meeting to be held Friday, March 16, 2000 in Munich, Germany along with
the Design Automation and Testing in Europe (DATE 2001) conference and
exhibit.  The IBIS Summit Meeting is on the day after the tradeshow portion of
the show.  Bob indicated that four companies are now planning to co-sponsor
the meeting: Cadence, Innoveda, Mentor Graphics and Zuken (Incases).

Bob plans to work with the co-sponsors on the final commitments, details,
time of meeting, etc.


IBIS MODEL REVIEW COMMITTEE DISCUSSION
John Angulo stated that he received a model but returned it for further works
since it failed ibischk3.


ADD [IBIS-List] TO IBIS E-MAIL (New Agenda Item)
Bob Ross stated that a request was made regarding adding to tag such as
[IBIS-List] to the subject line of IBIS reflector mail.  This is similar to
the SI list [SI-List] tag.  Bob asked John Angulo to look into this.  We are
now using an older manual mail system, but might transition to Majordomo.
John agreed to look into this.


CONNECTOR PROPOSAL REVIEW
Ian Dodd stated that the planned meeting between he and Gus Panella did not
occur on December 12, 2000.  After some discussion with Bob Ross, the next
Working Group meeting will be planned on January 16, 2001.  

Roy Leventhal asked, and Bob responded that we were quite far along on the
Connector Specification.  Ian stated that his main concern was to complete the
new formal language for naming pins in the Specification.


IBIS FUTURES (IBIS-X, API, BIRDxx)
Stephen Peters reported on the IBIS Futures meeting held on December 19, 2000.
The current activity centers on writing the Header document for the IBIS-X
specification.  The macro-language for buffers needs to be formally documented
based on Al Davis' work.

Stephen presented the current issues: (1) aligning the Connector Specification
header with the proposed IBIS-X header (this may involve having the same
[Begin .. ] [End ..] syntax, and (2) including a die interconnect section
(this was one motivation for IBIS-X).

Al has released a partially working prototype to the Working Group.  It is
not ready for public release, but interested people can contact Al directly
at aldavis@ieee.org for a copy.

Stephen expects to deliver a high level overview of IBIS-X at the IBIS
Summit meeting.  Al will probably discuss the prototype.  This will be 
discussed at the next Working Group meeting scheduled on January 9, 2001.


BIRD65.1 - C_comp REFINEMENTS
Bob Ross stated that we have already approved four BIRDs in a planned IBIS
Version 4.0 release.  A work in progress draft version of IBIS Version 4.0
with these four BIRDs exists in the following directory:

  http://www.eda.org/pub/ibis/wip/

Bob introduced BIRD65.1 noting that Arpad Muranyi, the author, changed the
proposed sub-parameter names to C_comp_pullup, C_comp_pulldown, C_comp_power
and C_comp_ground to be consistent with other keywords and sub-parameters.
Bob commented that he would like C_comp_ground to be changed to C_comp_gnd to
be even more consistent.  Arpad agreed to do this.  Bob also noted that Al
Davis documented several concerns in and IBIS reflector e-mail.

Arpad gave a brief overview of BIRD65.1 indicating that there was a need to
split C_comp into four components for better return path analysis.  Bob then
asked Al to discuss his concerns and Arpad to respond.  

Al asked how the C_comp components were extracted.  Arpad responded that he
has been able to do this from Spice files using his extraction utility.  Al
asked Arpad to post this information.

Al stated that vendors often have difficulty allocating DC currents when
forming the various I-V tables.  He felt that splitting C_comp would be
equally difficult.  Arpad responded that if the right techniques are followed,
the allocation of C_comp can be done correctly (for the purposes of modeling).

Roy Leventhal wanted clarification from a higher level on why we should do
this.  Arpad responded that simulations for return path and resonances need
this added detail.  Bob asked, and Arpad responded that he has successfully
prototyped this decomposition and got improved simulation results.  There
was some more discussion about modeling level of abstraction and also
whether this level of detail created intellectual property issues.

Based on Al's comments and discussion, we needed to clarify whether BIRD65.1
intended four or five power nodes.  Al stated that BIRD65.1 might be
interpreted to mean if C_comp is provided, it is attached to an ideal ground
(node "0") reference.  Arpad indicated that he intended to have four power
nodes.  Bob and Al stated that this needs to be clarified.

Al commented that IBIS-X could handle even more general C_comp descriptions
and decompositions including voltage dependencies.

Bob also commented that the TTpower and TTgnd based C value was actually a
voltage dependent capacitor.  The decomposed C_comp terms were different and
assumed to be constant effective capacitances for the purposes of modeling.

Bob suggested deferring the vote so that BIRD65.2 could be issued and people 
absorb some of the discussion.  More responses and discussion will be done on
the IBIS reflector.  So BIRD65.2 will be scheduled for a vote at the next IBIS
teleconference meeting.


BIRD68 - CLARIFY THAT RISING AND FALLING WAVEFORM TABLES SHOULD BE CORRELATED
Bob Ross introduced BIRD68 by noting that it had been discussed previously.
It clarified further that the [Rising Waveform] and [Falling Waveform] tables
should be time correlated with each other to a common time reference point.
Equal lead-in delay could optionally be removed form both edges.  The primary
reason for BIRD68 was for correct intersymbol interference analysis.  However,
in prior meetings, we noted that differential models, driver schedule models
and submodels all could have a similar implied restriction.  Dave Lorang,
author of BIRD68, concurred.

Bob noted that one issue was whether to document time correlation explicitly
by some sub-parameter or follow BIRD68 and just add this requirement as a
clarifying statement.  Al Davis favored adding just a clarifying statement
since it really is a necessary assumption.  Bob agreed, even though he knew of
some possible measurement extraction concerns.

As previously mentioned, Bob also was concerned with the specific language
"input stimulus is assumed to have initiated at the logic transition".  This
could be interpreted as the time of actually triggering the transition - an
undefined or hard to determine value.  A better statement might refer to a
common input stimulus reference time, such as the beginning of the input
stimulus waveform for each edge.  While there might be some slight error
because of input signal amplitude or ramp rate, this approach would still be
more consistent with actual waveform extraction based on simulation or
measurement.

AR - Bob Ross will work with Dave Lorang regarding the wording, leading
possibly for BIRD68.1

Bob stated that BIRD68.1 will be scheduled for a vote at the next
teleconference meeting.


BIRD69 - GOLDEN WAVEFORMS
Greg Edlund briefly introduced BIRD69.  Greg stated that the IBIS Cookbook,
Section 3.2.2, introduced using V-T tables as Golden Waveforms for accuracy
comparison.  This concept was expanded by the IBIS East Accuracy group that
eventually produced the IBIS Accuracy Report.  BIRD69 provides the syntax to
set up the test circuits (as suggested by Jerry Hayes) and document a
corresponding set of "golden waveforms".  This is done under two new keywords:
[Rising Golden Waveform] and [Falling Golden Waveform].  EDA tools could
ignore these additional waveforms or could do accuracy testing by setting up
the test circuit simulation and comparing the simulation results with the
stored waveforms.

Since we were approaching the end of the meeting, Bob Ross planned more
discussion on BIRD69 at the next teleconference meeting.


IBISCHK3 BUG TRACKING
Bob Ross reported that Atul Agarawal delivered the ibischk3.2.6 source code
and it was distributed to the companies holding the parser license on January
2, 2001.  New executables for ibischk3 have been generated by Guy de Burgh
for various Unix operating systems and Matthew Flora for Windows.  Syed Huq
is expected to generate a Linux executable soon.  The executables are uploaded
at:

  http://www.eda.org/pub/ibis/ibischk3/

The older Version 3.2.5 executables are also archived under this directory.

Bob noted that the new ibischk3 includes fixes for all bugs through BUG47.
The fixes still need to be checked.

- BUG49 - Warning Message for Unreferenced Models, Submodels
  Bob stated that we ran out of time before reaching this topic.  All that
  remained was to decide on how we wanted to resolve it.  We will plan the
  final resolution at the next teleconference meeting.


NEXT MEETING:
The next IBIS Meeting will be the IBIS Summit Meeting at DesignCon in
San Jose, CA on Monday, January 29, 2001 from 8:30 AM to 5:00 PM.
There will not be any teleconference connection.

The next teleconference meeting will be on Friday at a date to be determined
from 8:00 AM to 10:00 AM.  BIRD65.2 and BIRD68.1 are scheduled for a vote.
==============================================================================
                                      NOTES

IBIS CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897
            bob_ross@mentor.com
            Modeling Engineer, Mentor Graphics
            8005 S.W. Boeckman Road, Wilsonville, OR 97070

VICE CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-4515
            stephen.peters@intel.com
            Senior Hardware Engineer, Intel Corporation
            M/S JF1-209
            2111 NE 25th Ave.
            Hillsboro, OR 97124-5961

SECRETARY:  Guy de Burgh (805) 988-8250, Fax: (805) 988-8259
            gdeburgh@innoveda.com
            Senior Manager, Innoveda
            1369 Del Norte Rd.
            Camarillo, CA 93010-8437

LIBRARIAN:  Roy Leventhal (837) 797-2152, Fax: (847) 222-2799
            roy_leventhal@3com.com
            Senior Engineer, CommWorks Corp. (a wholly owned 3Com subsidiary)
            1800 W. Central Rd.
            Mt. Prospect, IL 60056-2293  

WEBMASTER:  Syed Huq (408) 525-3399, Fax: (408) 526-5504
            shuq@cisco.com
            Manager, Hardware Engineering, Cisco Systems
            170 West Tasman Drive
            San Jose, CA 95134-1706

POSTMASTER: John Angulo (425) 869-2320, Fax: (425) 881-1008
            jangulo@innoveda.com
            Development Engineer, HyperLynx, Inc.
            14715 N.E. 95th Street, Suite 200
            Redmond, WA 98052

This meeting was conducted in accordance with the EIA Legal Guides and EIA
Manual of Organization and Procedure.

The following e-mail addresses are used:

  ibis-request@eda.org
      To join, change, or drop from either the IBIS Open Forum Reflector
      (ibis@eda.org), the IBIS Users' Group Reflector (ibis-users@eda.org)
      or both.  State your request.

  ibis-info@eda.org
      To obtain general information about IBIS, to ask specific questions
      for individual response, and to inquire about joining the EIA-IBIS
      Open Forum as a full Member.

  ibis@eda.org
      To send a message to the general IBIS Open Forum Reflector.  This
      is used mostly for IBIS Standardization business and future IBIS
      technical enhancements.  Job posting information is not permitted.

  ibis-users@eda.org
      To send a message to the IBIS Users' Group Reflector.  This is
      used mostly for IBIS clarification, current modeling issues, and
      general user concerns.  Job posting information is not permitted.

  ibischk-bug@eda.org
      To report ibischk2/3 parser bugs.  The Bug Report Form Resides on
      eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs.

      To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms
      which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt,
      /pub/ibis/bugs/s2ibis2/bugs2i2.txt, & /pub/ibis/bugs/s2iplt/bugsplt.txt
      respectively.

Information on IBIS technical contents, IBIS participants, and actual
IBIS models are available on the IBIS Home page found by selecting the
Electronic Information Group under:

  http://www.eigroup.org/ibis/ibis.htm

Check the pub/ibis directory on eda.org for more information on previous
discussions and results.  You can get on via FTP anonymous.
==============================================================================

 
From owner-ibis Tue Jan  9 15:46:05 2001
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Date: Tue, 9 Jan 2001 15:40:31 -0800 (PST)
From: Milt Schwartz x3261 <schwartz@galaxy.nsc.com>
Message-Id: <200101092340.PAA05588@xi.nsc.com>
To: ibis@eda.org
Subject: IBIS Summit 3rd Announcement
X-Sun-Charset: US-ASCII

     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     ----------------------------------------------------------------------
     DESIGNCON 2001 THIRD IBIS SUMMIT CALL FOR PARTICIPATION, PRESENTATIONS
     ----------------------------------------------------------------------
     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

                    I B I S   S U M M I T   M E E T I N G

Time/Date:     8:00 PM - 5:00 PM, Monday, January 29, 2001

Location:      Santa Clara Convention Center
               Santa Clara, CA

Content:       IBIS Future Requirements is the main topic of this meeting
               These include an exchange of ideas on IBIS accuracy,
               connectors, and new requirements under discussion.

Purpose:       Solicit and Exchange IBIS Model Related Information and Ideas.

Sponsors:      DesignCon 2001 & National Semiconductor Corporation

IBIS Summit Signup:
               Milt Schwartz
               schwartz@galaxy.nsc.com


                   D E S I G N C O N   2 0 0 0   M E E T I N G S

Time/Date:     Monday - Thursday, January 29 - February 1, 2001

Exhibition:    Tuesday - Wednesday, 12:30 PM - 6:30 PM, January 30-31, 2001

IBIS Booth:    #861, Exhibition Hall
               - IBIS Information

URL DesignCon2001:
               http://www.designcon.com/


CALL FOR IBIS SUMMIT PRESENTATIONS

We already have several presentations and discussion topics planned.  However,
we are also seeking presentations from individuals who have IBIS experiences
or issues.

Format of Presentation:  Overhead Projections
Time:                    15-30 Minutes
Electronic Archival:     We request electronic versions so that the
                         presentations can be archived and also made
                         available to non-attendees.  Formats used in
                         the past have been text, Power Point, Word, 
                         Postscript, and Acrobat.  If you cannot provide
                         an electronic format, then plan to bring 50
                         copies for distribution at the meeting.


If you plan a presentation, please supply

  Title:
  Presenter:
  E-mail address:
  Company:
  Telephone:

  Estimate Time:

Send this to:

  Milt Schwartz
  schwartz@galaxy.nsc.com

Deadline: Wednesday, January 24, 2001 for receiving presentations for
          copying.
 

AGENDA

The agenda includes presentations, discussions, refreshments, and a free
buffet luncheon for participants.  In addition, we will have an opportunity
for Ad Hoc presentations and extended discussions.  Tentatively we plan the
following topics (titles may change):

  "The Joy of Downloaded Models", Tom Dagostino, Mentor Graphics
  "Spice 2 IBIS Accuracy Report", Scott McMorrow, Siqual
  "LVDS Buffer Modeling", Hazem Hegany and Mohammed Korany, Mentor Graphics
  "Modeling Approach for Pre-emphasis Buffers", Hazem Hegeny and
     Mohammed Korny, Mentor Graphics
  "Connector Specification Discussion", Gus Panella, Molex
  "SCSI-3 Compensation Modeling" Larry Barnes, LSI Logic
  "IBIS Futures and Discussion", Stephen Peters, Intel
  "IBIS-X Prototype", Al Davis, Consultant
 
From owner-ibis Wed Jan 10 13:35:31 2001
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Message-ID: <00bb01c07b4d$111b3d70$fd96fea9@C541536A>
Reply-To: "Dima Smolyansky" <dima@tdasystems.com>
From: "Dima Smolyansky" <dima@tdasystems.com>
To: "Milt Schwartz x3261" <schwartz@galaxy.nsc.com>, <ibis@eda.org>
References: <200101092340.PAA05588@xi.nsc.com>
Subject: Re: IBIS Summit 3rd Announcement
Date: Wed, 10 Jan 2001 13:32:21 -0800
Organization: TDA Systems, Inc.
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Milt:

There will be two people from TDA Systems present - Dima Smolyansky and
Steven Corey. Please let me know if you need additional sign up information.

-Thanks,

===================
Dima Smolyansky
TDA Systems, Inc.
11140 SW Barbur Blvd., Suite 100
Portland, OR 97219
(503) 246-2272
(503) 246-2282 (fax)
(503) 804-7171 (mobile)
http://www.tdasystems.com
The Interconnect Modeling Company(TM)


----- Original Message -----
From: "Milt Schwartz x3261" <schwartz@galaxy.nsc.com>
To: <ibis@eda.org>
Sent: Tuesday, January 09, 2001 3:40 PM
Subject: IBIS Summit 3rd Announcement


>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>      ---------------------------------------------------------------------
-
>      DESIGNCON 2001 THIRD IBIS SUMMIT CALL FOR PARTICIPATION,
PRESENTATIONS
>      ---------------------------------------------------------------------
-
>
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>
>                     I B I S   S U M M I T   M E E T I N G
>
> Time/Date:     8:00 PM - 5:00 PM, Monday, January 29, 2001
>
> Location:      Santa Clara Convention Center
>                Santa Clara, CA
>
> Content:       IBIS Future Requirements is the main topic of this meeting
>                These include an exchange of ideas on IBIS accuracy,
>                connectors, and new requirements under discussion.
>
> Purpose:       Solicit and Exchange IBIS Model Related Information and
Ideas.
>
> Sponsors:      DesignCon 2001 & National Semiconductor Corporation
>
> IBIS Summit Signup:
>                Milt Schwartz
>                schwartz@galaxy.nsc.com
>
>
>                    D E S I G N C O N   2 0 0 0   M E E T I N G S
>
> Time/Date:     Monday - Thursday, January 29 - February 1, 2001
>
> Exhibition:    Tuesday - Wednesday, 12:30 PM - 6:30 PM, January 30-31,
2001
>
> IBIS Booth:    #861, Exhibition Hall
>                - IBIS Information
>
> URL DesignCon2001:
>                http://www.designcon.com/
>
>
> CALL FOR IBIS SUMMIT PRESENTATIONS
>
> We already have several presentations and discussion topics planned.
However,
> we are also seeking presentations from individuals who have IBIS
experiences
> or issues.
>
> Format of Presentation:  Overhead Projections
> Time:                    15-30 Minutes
> Electronic Archival:     We request electronic versions so that the
>                          presentations can be archived and also made
>                          available to non-attendees.  Formats used in
>                          the past have been text, Power Point, Word,
>                          Postscript, and Acrobat.  If you cannot provide
>                          an electronic format, then plan to bring 50
>                          copies for distribution at the meeting.
>
>
> If you plan a presentation, please supply
>
>   Title:
>   Presenter:
>   E-mail address:
>   Company:
>   Telephone:
>
>   Estimate Time:
>
> Send this to:
>
>   Milt Schwartz
>   schwartz@galaxy.nsc.com
>
> Deadline: Wednesday, January 24, 2001 for receiving presentations for
>           copying.
>
>
> AGENDA
>
> The agenda includes presentations, discussions, refreshments, and a free
> buffet luncheon for participants.  In addition, we will have an
opportunity
> for Ad Hoc presentations and extended discussions.  Tentatively we plan
the
> following topics (titles may change):
>
>   "The Joy of Downloaded Models", Tom Dagostino, Mentor Graphics
>   "Spice 2 IBIS Accuracy Report", Scott McMorrow, Siqual
>   "LVDS Buffer Modeling", Hazem Hegany and Mohammed Korany, Mentor
Graphics
>   "Modeling Approach for Pre-emphasis Buffers", Hazem Hegeny and
>      Mohammed Korny, Mentor Graphics
>   "Connector Specification Discussion", Gus Panella, Molex
>   "SCSI-3 Compensation Modeling" Larry Barnes, LSI Logic
>   "IBIS Futures and Discussion", Stephen Peters, Intel
>   "IBIS-X Prototype", Al Davis, Consultant
>

 
From owner-ibis Fri Jan 12 07:22:35 2001
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From: David Erickson <DErickson@iec.org>
To: "'ibis@eda.org'" <ibis@eda.org>
Subject: Your free E-PASS for DesignCon 2001!
Date: Fri, 12 Jan 2001 09:37:49 -0600
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Here is your free E-PASS for complimentary exhibits-only registration at
DesignCon 2001 **PLUS*** you can attend the Keynote and Plenary sessions for
free.  See the latest electronic design technologies and services from more
than 130 exhibitors on the DesignCon 2001 exhibit floor-the largest exhibit
floor to date! Simply complete the form at the end of the page and bring it
to the Santa Clara Convention Center, or go directly to
www.designcon.com/2001/register.asp. Register now and qualify to win one of
two Palm Pilots given away each week! 

Attend the IBIS SUMMIT: Monday January 29, 2001 8:30 AM to 5 PM.  To
register for the summit, contact Milt Schwartz at schwartz@galaxy.nsc.com. 
**********************************************************************
DesignCon 2001
Conference: January 29 - February 1
Exhibits: January 30-31
Santa Clara Convention Center, Santa Clara California 
*********************************************************************
Congratulations to last week's Palm Pilot winners: Chie Lie Wang, 3COM and
John Thomas, Broadcom
 
Attend DesignCon 2001, the design-engineering industry's premier conference
and exhibition-located right in Silicon Valley. View the exhibits on January
30-31, at the Santa Clara Convention Center, Santa Clara, California. Visit
www.designcon.com for complete details, or view the complete exhibitor list
at www.designcon.com/2001/exhlist.asp. 
 
Exhibits
The exhibits at DesignCon 2001 provide attendees with a firsthand look at
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Here are some of the products and demonstrations you will find on the
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Exhibit and Demonstration Hours
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VISIT DESIGNCON EXHIBITORS ON THE WEB! www.designcon.com/2001/exhlist.asp
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Please print this form and fill in the following information to complete
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From owner-ibis Fri Jan 12 15:58:13 2001
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Date: Fri, 12 Jan 2001 18:55:26 -0500
From: Mike LaBonte <mlabonte@hhnetwk.com>
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Hello,

One would think I would know the answers by now, but...

1) Has anyone used s2ibis2 to convert 1.5V logic? I had to fix it
   because it was putting bogus points near the ends of thepullup
   and pulldown VI curves.

2) Why does s2ibis2 run waveform simulations with 100 points,
   then resample them down to 51 points for output to the IBIS
   file, when the IBIS spec allows 100 points? The resampled
   waveform even has a time lag with respect to the original.

Since s2ibis2 has been used to create many IBIS models since it
was last updated in August 1998, one would assume that it is
producing fairly good results, once one learns to use it. But I
find these issues and others, too. Has every working copy out
there been modified like mine?

Mike LaBonte
 
From owner-ibis Fri Jan 12 16:26:51 2001
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From: Al Davis <aldavis@ieee.org>
To: Mike LaBonte <mlabonte@hhnetwk.com>, IBIS Users <ibis@eda.org>
Subject: Re: s2ibis2 issues
Date: Fri, 12 Jan 2001 16:22:53 -0800
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On Fri, 12 Jan 2001, Mike LaBonte wrote:
> 2) Why does s2ibis2 run waveform simulations with 100 points,
>    then resample them down to 51 points for output to the IBIS
>    file, when the IBIS spec allows 100 points? The resampled
>    waveform even has a time lag with respect to the original.

Here's my guess:

They were planning to add an algorithm to do smart point selection, 
but the student graduated and no-one else picked up the work.
 
From owner-ibis Fri Jan 12 19:33:08 2001
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Date: Fri, 12 Jan 2001 19:29:25 -0800
From: Scott McMorrow <scott@vasthorizons.com>
Organization: SiQual
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To: Mike LaBonte <mlabonte@hhnetwk.com>
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Mike,

1) Yes, it puts in bogus points.  We just delete them.

2) Good question.  I modified the code to simulate
with 250 points.  This is available in s2ibis2fix.
We resample down to 100 points with an external
algorithm.

3) We also modified the code to run on Windows NT
and 2000 with HSpice, and increased the number of
significant digits being printed in the tables, also.

Welcome to the club.

regards,

scott


--
Scott McMorrow
Principal Engineer
SiQual, Signal Quality Engineering
18735 SW Boones Ferry Road
Tualatin, OR  97062-3090
(503) 885-1231
http://www.siqual.com


Mike LaBonte wrote:

> Hello,
>
> One would think I would know the answers by now, but...
>
> 1) Has anyone used s2ibis2 to convert 1.5V logic? I had to fix it
>    because it was putting bogus points near the ends of thepullup
>    and pulldown VI curves.
>
> 2) Why does s2ibis2 run waveform simulations with 100 points,
>    then resample them down to 51 points for output to the IBIS
>    file, when the IBIS spec allows 100 points? The resampled
>    waveform even has a time lag with respect to the original.
>
> Since s2ibis2 has been used to create many IBIS models since it
> was last updated in August 1998, one would assume that it is
> producing fairly good results, once one learns to use it. But I
> find these issues and others, too. Has every working copy out
> there been modified like mine?
>
> Mike LaBonte



 
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All,

Unless I have missed something, the IBIS spec seems unclear 
as to what parameters are valid on what types of model.

For example is Vmeas valid for an output type?

Did I miss something, and if not, have we discussed this problem?

Thanks

Ian Dodd
idodd@cadence.com
 
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From: Al Davis <aldavis@ieee.org>
To: Ian Dodd <idodd@cadence.com>, ibis reflector <ibis@vhdl.org>
Subject: Re: Clarification question for threshold parameters
Date: Thu, 18 Jan 2001 22:46:09 -0800
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On Thu, 18 Jan 2001, Ian Dodd wrote:
> Unless I have missed something, the IBIS spec seems unclear
> as to what parameters are valid on what types of model.

Correct.

> For example is Vmeas valid for an output type?

1. Some models use it, and the parser doesn't reject it.

2. It is useful for mixed-mode (mixed A & D) simulators, when the 
output node is interpreted as a digital node.


> Did I miss something, and if not, have we discussed this problem?

As far as I know, it has not come up before.  I ran into it working 
on the IBIS-X standard macro file, and attempting to interface the 
IBIS-X translator to a mixed-mode simulator (ACS).

So, it looks like the answer is YES.  I assumed it was NO, and got in 
trouble for it.

al.
 
From owner-ibis Fri Jan 19 09:43:06 2001
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From: "Dagostino, Tom" <tom_dagostino@mentorg.com>
To: "'Al Davis'" <aldavis@ieee.org>, Ian Dodd <idodd@cadence.com>,
   ibis reflector <ibis@vhdl.org>
Subject: RE: Clarification question for threshold parameters
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I thought Vmeas is only for outputs.  It is the voltage reference for timing
measurements under the manufacturers recommended load (Cref, Rref, Vref).

Tom Dagostino
IBIS and Tau Modeling Manager
SDD
Mentor Graphics Corp.
503-685-1613
tom_dagostino@mentor.com


-----Original Message-----
From: Al Davis [mailto:aldavis@ieee.org]
Sent: Thursday, January 18, 2001 10:46 PM
To: Ian Dodd; ibis reflector
Subject: Re: Clarification question for threshold parameters


On Thu, 18 Jan 2001, Ian Dodd wrote:
> Unless I have missed something, the IBIS spec seems unclear
> as to what parameters are valid on what types of model.

Correct.

> For example is Vmeas valid for an output type?

1. Some models use it, and the parser doesn't reject it.

2. It is useful for mixed-mode (mixed A & D) simulators, when the 
output node is interpreted as a digital node.


> Did I miss something, and if not, have we discussed this problem?

As far as I know, it has not come up before.  I ran into it working 
on the IBIS-X standard macro file, and attempting to interface the 
IBIS-X translator to a mixed-mode simulator (ACS).

So, it looks like the answer is YES.  I assumed it was NO, and got in 
trouble for it.

al.
 
From owner-ibis Fri Jan 19 14:41:23 2001
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Tom,

You are correct.

scott

"Dagostino, Tom" wrote:

> I thought Vmeas is only for outputs.  It is the voltage reference for timing
> measurements under the manufacturers recommended load (Cref, Rref, Vref).
>
> Tom Dagostino
> IBIS and Tau Modeling Manager
> SDD
> Mentor Graphics Corp.
> 503-685-1613
> tom_dagostino@mentor.com
>
> -----Original Message-----
> From: Al Davis [mailto:aldavis@ieee.org]
> Sent: Thursday, January 18, 2001 10:46 PM
> To: Ian Dodd; ibis reflector
> Subject: Re: Clarification question for threshold parameters
>
> On Thu, 18 Jan 2001, Ian Dodd wrote:
> > Unless I have missed something, the IBIS spec seems unclear
> > as to what parameters are valid on what types of model.
>
> Correct.
>
> > For example is Vmeas valid for an output type?
>
> 1. Some models use it, and the parser doesn't reject it.
>
> 2. It is useful for mixed-mode (mixed A & D) simulators, when the
> output node is interpreted as a digital node.
>
> > Did I miss something, and if not, have we discussed this problem?
>
> As far as I know, it has not come up before.  I ran into it working
> on the IBIS-X standard macro file, and attempting to interface the
> IBIS-X translator to a mixed-mode simulator (ACS).
>
> So, it looks like the answer is YES.  I assumed it was NO, and got in
> trouble for it.
>
> al.

--
Scott McMorrow
Principal Engineer
SiQual, Signal Quality Engineering
18735 SW Boones Ferry Road
Tualatin, OR  97062-3090
(503) 885-1231
http://www.siqual.com


 
From owner-ibis Mon Jan 22 11:55:13 2001
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To IBIS Summit Attendees:

If you have not done so already, please let Milt Schwartz know
if you are attending:

  schwartz@galaxy.nsc.com

People who are presenting: please send the presentations to
Milt for copying at the above address.  Otherwise, plan to
bring 50 copies for distribution at the meeting.

We will have an overhead slide projector and also a projector
for laptop presentations.  I prefer using slides, if practical,
to maximize interaction during discussions and for Ad Hoc
presentations.

Bob Ross
Mentor Graphics

------------------------------------------------------------------

                   AGENDA, IBIS SUMMIT MEETING
                        JANUARY 29, 2001

                          Westin Hotel
                  Santa Clara Convention Center
                     Santa Clara, California
                  Check Signs for Meeting Room

------------------------------------------------------------------

8:00 AM     Refreshments & Sign In

8:30 AM     Introductions
            - Welcome to Summit
            - Introductions
            - IBIS Booth #861 Placards
            - IBIS Program - Bob Ross, Mentor Graphics
            - Opens for Issues, Discussion           

9:00 AM     The Joy of Web Models
            Tom Dagostino, Mentor Graphics

9:30 AM     Spice 2 IBIS Accuracy Report
            Scott McMorrow, Siqual

10:00 AM    Break

10:15 AM    LVDS Buffer Modeling
            Hazem Hegany and Mohammed Korany, Mentor Graphics

10:45 AM    LSI Power and Ground Model for EMI Simulation
            Norio Matsui, Applied Simulation Technology

11:15 AM    SCSI-3 Compensation Modeling
            Larry Barnes, LSI Logic

12:00 PM    Lunch - (Hosted by National Semiconductor)
            Westin Hotel

1:00 PM     API Questions and Issues
            Al Davis, Consultant

1:30 PM     Connector Specification
            Gus Panella, Molex

1:45 PM     Connector Pin Name Syntax
            Ian Dodd, Cadence

2:00 PM     Connector Specification Discussion
            Gus Panella, Molex

2:30 PM     Break

2:45 PM     IBIS Futures
            Stephen Peters, Intel

3:00 PM     IBIS-X Prototype
            Al Davis, Consultant

3:15 PM     IBIS Futures Discussion
            Stephen Peters, Intel

3:45 AM     Open Discussion and Ad Hoc Topics
            All

4:45 PM     Concluding Items
            - Date2000 IBIS Summit
            - Next Meeting February 16, 2001
            - ??

5:00 PM     End of IBIS Summit Meeting

------------------------------------------------------------------
 
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Subject: EUROPEAN IBIS SUMMIT MEETING ANNOUNCEMENT
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To All:

We have been holding successful European IBIS Summit Meetings for the
last three years.  This year we are again holding a meeting along with
DATE 2001 on Friday, March 16, 2001.  The purpose is to promote
communication among users and developers of IBIS models in Europe.

The meeting is free and open to everyone.  Refreshments and a hot
lunch will be provided to all attendees.

Below is some information on the IBIS Summit and some related events.
You are invited to register and also to submit presentation proposals.
We already have three or four presentations.

Bob Ross
Mentor Graphics


          E U R O P E A N   I B I S   S U M M I T   M E E T I N G
                    F I R S T   A N N O U N C E M E N T 

Time/Date:     8:30 PM - 5:00 PM, Friday, March 16, 2001

Location:      ASTRON HOTEL/Neue Messe
               Eggenfeldener Strasse 100
               Munich, Germany 

               This hotel is near the DATE 2001 Conference

Content:       Presentations and Discussions

Purpose:       Solicit and Exchange IBIS Model Related Information and Ideas

Sponsors:      Cadence Design, Innoveda, Mentor Graphics, Zuken

DATE 2001:     March 13 - 16, 2001.  The IBIS meeting is scheduled
               the day after the DATE 2001 exhibition ends.

Location:      International Congress Center, Munich, Germany

               See http://www.date-conference.com for more information.

BACKGROUND

We have been holding interesting European IBIS Summit Meetings for the
last three years.  This year we are planning another meeting to include:

  Submitted Presentations on IBIS Topics (See below)
  Information about IBIS Version 3.2 and Activities
  Less formal Ad Hoc Presentations and Discussions
  IBIS Questions and Answers
  
Below is an invitation to register and also to submit presentations.

CALL FOR PARTICIPANTS

People involved in IBIS Model development, EDA tool development, and digital
circuit design are invited to participate in the European IBIS Summit meeting.
If you plan to participate, please register with the information below
(deadline, March 9, 2001):

  Name:
  E-mail address:
  Company:
  Telephone:

Send to:

  Karine Loudet (karine_loudet@mentor.com)  +33 1 40 94 74 54
  
CALL FOR PRESENTATIONS

We are seeking presentations from individuals who have IBIS experiences
or issues.  Some suggested subjects of interest are:

  IBIS Model Development Experiences
  Company IBIS Standards and Requirements
  Generating and Validating IBIS Models
  Future IBIS Requirements
  EMC/EMI IBIS Issues

Format of Presentation:  Overhead Projections
Time:                    15-30 Minutes
Electronic Archival:     We request electronic versions so that the
                         presentations can be archived and also made
                         available to non-attendees.  Formats used in
                         the past have been text, Power Point, Word, 
                         Postscript, and Acrobat.  Electronic presentations
                         should be made available by March 6, 2001.
                         Otherwise the presentor will be expected to provide
                         50 copies for distribution.

If you plan a presentation, please supply

  Title:
  Presenter:
  E-mail address:
  Company:
  Telephone:

  Estimate Time:

Send this to:

  Karine Loudet (karine_loudet@mentor.com)
  Bob Ross (bob_ross@mentor.com)

AGENDA

The agenda includes presentations, discussions.  A free lunch is scheduled
for all attendees.

FOR FURTHER INFORMATION:

Bob Ross,
Chair, EIA/IBIS Open Forum
Mentor Graphics
8005 S.W. Boeckman Road
Wilsonville, Oregon 97070
USA

(503) 685-0732
bob_ross@mentor.com
 
From owner-ibis Thu Jan 25 09:31:41 2001
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To IBIS Summit Meeting Attendees:

This is a slightly revised Agenda with some time adjustments,
order and content adjustments.  We expect a full program,
so presentors please plan to stay within the time limits.

A new work in progress connector specification Version
0.960 has been uploaded in 

  http://www.eda.org/pub/ibis/connector/

Looking forward to seeing you at the meeting.

Bob Ross,
Mentor Graphics

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                   AGENDA, IBIS SUMMIT MEETING
                        JANUARY 29, 2001

                          Westin Hotel
                  Santa Clara Convention Center
                     Santa Clara, California
                  Check Signs for Meeting Room

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8:00 AM     Refreshments & Sign In

8:30 AM     Introductions
            - Welcome to Summit
            - Introductions
            - IBIS Booth #861 Placards
            - IBIS Today - Bob Ross, Mentor Graphics
            - Opens for Issues, Discussion           

9:00 AM     The Joy of Web Models
            Tom Dagostino, Mentor Graphics

9:30 AM     Spice 2 IBIS Accuracy Report
            Scott McMorrow, Siqual

10:00 AM    Break

10:15 AM    LVDS Modeling
            Hazem Hegany and Mohammed Korany, Mentor Graphics

11:00 AM    LSI Power and Ground Model for EMI Simulation
            Norio Matsui, Applied Simulation Technology

11:30 AM    SCSI-3 Compensation Modeling
            Larry Barnes, LSI Logic

12:00 PM    Lunch - (Hosted by National Semiconductor)
            Westin Hotel

1:00 PM     Connector Specification
            Gus Panella, Molex

1:15 PM     Connector Pin Name Syntax
            Ian Dodd, Cadence

1:30 PM     Connector Specification Discussion
            Gus Panella, Molex

2:00 PM     API Questions and Issues
            Al Davis, Consultant

2:30 PM     Break

2:45 PM     IBIS Futures
            Stephen Peters, Intel

3:00 PM     IBIS-X Technical Overview
            Ian Dodd, Cadence

3:15 PM     IBIS-X Prototype
            Al Davis, Consultant

3:30 PM     IBIS-X Pros and Cons
            Ian Dodd, Cadence

3:45 PM     IBIS Futures Discussion
            Stephen Peters, Intel

4:15 PM     Open Discussion and Ad Hoc Topics
            All

4:45 PM     Concluding Items
            - Date2000 IBIS Summit
            - Next Meeting February 16, 2001

5:00 PM     End of IBIS Summit Meeting

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