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Date: Mon, 2 Jan 95 09:36:35 PST
From: huq@rockie.nsc.com (Syed Huq)
Message-Id: <9501021736.AA00618@rockie.nsc.com>
To: ibis@vhdl.org
Subject: Fri teleconf....

Hello IBISgurus,

Happy New Year to you all.

For the coming Fri teleconference, I would like us to address two questions
I have.

1) When is ibischk2.1 getting released ?
2) Who are the simulator vendors that can support v2.1 and when will this be
   available?
3) Status of EIA and IBIS.

Best Regards,
Syed.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Syed B. Huq 
Applications Engineer/Data Transmission Products
National Semiconductor 
Tel:(408)721-4874; Fax:(408)721-4785
Internet:huq@rockie.nsc.com
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

From Will_Hobbs@ccm2.jf.intel.com  Tue Jan  3 08:26:07 1995
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From: Will Hobbs <Will_Hobbs@ccm2.jf.intel.com>
Message-Id: <950103082125_2@ccm.jf.intel.com>
To: huq@rockie.nsc.com, ibis@vhdl.org
Subject: Re: Fri teleconf....


Text item: 

Syed,

These topics will be on the agenda, due out in the next day or so.  thanks 
for the input.

Will


______________________________ Reply Separator _________________________________
Subject: Fri teleconf....
Author:  huq@rockie.nsc.com at SMTPGATE
Date:    1/2/95 9:52 AM


Hello IBISgurus,

Happy New Year to you all.

For the coming Fri teleconference, I would like us to address two questions 
I have.

1) When is ibischk2.1 getting released ?
2) Who are the simulator vendors that can support v2.1 and when will this be
   available?
3) Status of EIA and IBIS.

Best Regards,
Syed.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 
Syed B. Huq
Applications Engineer/Data Transmission Products 
National Semiconductor
Tel:(408)721-4874; Fax:(408)721-4785 
Internet:huq@rockie.nsc.com
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Text item: External Message Header

The following mail header is for administrative use
and may be ignored unless there are problems.

***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.

Subject: Fri teleconf....
To: ibis@vhdl.org
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From: huq@rockie.nsc.com (Syed Huq)
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From Derrick_Duehren@ccm2.jf.intel.com  Tue Jan  3 12:35:50 1995
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Date: Tue, 3 Jan 95 12:31:07 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950103123107_4@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS 1/6/95 Meeting Agenda 


Text item: Text_1

 
                       IBIS Open Forum Meeting Agenda 
                                for 1/6/95
 
                           Bridge:          Res:
                           (916) 356-9999   435319
 
 All meetings are 8:00 AM to 10:00 AM PST (16:00 to 18:00 UTC).  When you call 
 into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give 
 the reservation number.
 
  8:00 Check-in, Intros, Announcements                         Hobbs
       - Intros of new IBIS participants              
       - Review of previous meeting's minutes (and ARs)
       - Miscellany/announcements/treasurer's report  
       - Opens for new issues                         
       - Press updates                                
       - New models available
 
  8:20 Progress toward enlisting new IC vendors                All
 
       Golden Parser 2.1 progress and release date             Munsey
     
       Who are the simulator vendors that can support v2.1 
       and when will this support be available?                Huq
 
  9:00 Status of EIA affiliation                               Hobbs
 
       Rev 2.1 updates                                         Hobbs
       o S2IBIS 2.1?
       o Cookbook?
       o Overview?
 
  9:30 IBIS General Session/Summit (face-to-face)              Hobbs
       Location: Santa Clara (Intel facility)
       Date:     2/6/95
       Time:     9:30 - 5:00
 
  9:55 Wrap-up, next meeting plans                             Hobbs
 
 

From mbs@eos.ncsu.edu  Thu Jan  5 12:16:45 1995
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From: mbs@eos.ncsu.edu
Message-Id: <9501052012.AA19019@mbs.ece.ncsu.edu>
To: ibis@vhdl.org
Subject: IBIS Models
Date: Thu, 05 Jan 95 15:12:01 EST

From the IBIS model librarian

	Well business has been slow.  So far the IBIS model library
	contains the original Intel models (two of which were recently
	updated 82433nx.ibs and 82434nx.ibs) .  Currently old versions of 
	model files are removed from the library.

	The procedure for submitting models is described in the file
	vhdl.org:/pub/ibis/models/PROTOCOL.TXT . Alternatively a copy can
	be obtained from me directly.

	Commerical model vendors are encouraged to submit a list of their
	wares and this will be included in the model library.  These
	model lists will be included in the directory
	/pub/ibis/models/commercial/YOUR_COMPANY_NAME_HERE


Michael Steer
<mbs@ncsu.edu>


From Will_Hobbs@ccm2.jf.intel.com  Fri Jan  6 10:16:19 1995
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From: Will Hobbs <Will_Hobbs@ccm2.jf.intel.com>
Message-Id: <950106101058_1@ccm.jf.intel.com>
To: bward@neosoft.com, ibis@vhdl.org
Cc: Derrick_Duehren@ccm2.jf.intel.com
Subject: Press Release Draft


Text item: Text_1


 For more information contact:
 IBIS Open Forum                                     For Immediate Release 
 Will Hobbs, (503) 696-4369 (number not to be published)
 Jon Powell, (805) 988-8250

                            IBIS Press Release
                               DRAFT 12/13/94

Rev 2.1 of IBIS Signal Integrity Model Specification Announced IBIS Standard
that Supports Early, Accurate Models for Signal Integrity Simulations of
High-speed Digital Systems Now Supports More Functions

HILLSBORO, Ore.  _ December 9, 1994 _ A group of Electronic Design Automation
(EDA) and semiconductor companies today announced the ratification and
acceptance of Revision 2.1 of the I/O Buffer Information Specification (IBIS)
standard for integrity models.  This release is an upgrade to the rev 1.1
specification released last year (Press Release dated Oct.  12, 1993).  This
improved and refined standard adds support for ECL, dual-supply buffers, 
ground
bounce due to shared power rails, differential I/O, termination components,
controlled rise-time buffers, much more complete package descriptions, 
improved
open-side device modeling (open drain, etc.) and reference waveforms.  These
enhancements are a result of more EDA companies supporting the IBIS
specification and feedback of those using rev 1.1 models.

The IBIS Open Forum has created a version 2.1 of the "golden parser" that
checks model syntax for comformance to the specification.  It is currently
being Beta tested.  When completed, the parser will be made freely available 
in
object code format

IBIS is a consistent software parsable format that semiconductor vendors can
use to specify the analog characteristics of input and output buffers.  This
essential information is readily transformed into accurate models by end 
users
and simulation tool vendors.  The resulting behavioral models enable users to
perform high-speed, accurate signal-integrity simulations of their digital
system interconnects.

The IBIS Version 2.1 specification was developed through the cooperative
efforts of simulator vendors and semiconductor companies who together 
comprise
the IBIS Open Forum (see the attached roster).

For More Information

For more information about the IBIS Open Forum, send an e-mail request to
ibis-info@vhdl.org.  All of the documents and publicly available models are
currently accessible via the public repository of VHDL International's 
Internet
based machine (vhdl.org, 198.31.14.3, http://vhdl.org/).  WWW, Gopher, FTP 
and
Telnet "Anonymous", and "guest" dial-in access, (415) 335-0110, are all
available.


IBIS Open Forum
Contact List (Roster)
 .
 .
 .


From Derrick_Duehren@ccm2.jf.intel.com  Fri Jan  6 11:33:07 1995
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Date: Fri, 6 Jan 95 11:28:26 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950106112826_2@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS Press Rel w/Roster Attached


Text item: Text_1

 
 The Press Release with the edited participant's roster is attached as a ASCII 
 text file.
 
 Derrick Duehren
 ------------------------------------------------------------------------------
 XTG TPV Programs Manager, Intel Corp. |  
 Phone (503) 696-4299                  |  "Experience is not what happens to 
 Fax   (503) 696-4904                  |   you; it's what you do with what
 Derrick_Duehren@ccm.jf.intel.com      |   happens to you."
 5200 NE Elam Young Pkwy. JF1-97       |                     - Aldous Huxley
 Hillsboro, OR 97224                   |
 ------------------------------------------------------------------------------


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`
end


From 71436.1314@compuserve.com  Fri Jan  6 22:24:17 1995
Return-Path: <71436.1314@compuserve.com>
Received: from arl-img-1.compuserve.com by vhdl.vhdl.org (4.1/SMI-4.1/BARRNet)
	id AA09288; Fri, 6 Jan 95 22:24:17 PST
Received: by arl-img-1.compuserve.com (8.6.9/5.941228sam)
	id BAA24328; Sat, 7 Jan 1995 01:19:31 -0500
Date: 07 Jan 95 01:18:27 EST
From: Kellee Crisafulli <71436.1314@compuserve.com>
To: IBIS ALL <ibis@vhdl.org>
Subject: Re Press Release Draft, From Kellee Crisafulli
Message-Id: <950107061826_71436.1314_HHB34-1@CompuServe.COM>

I have just read the draft release of the press release and it looks good.

I believe it could be improved with a statement to the effect that it is fully
backward compatible with version 1.1.

It seems to me that we should present IBIS as a specification which fully
maintains backward compatibility.  We may scare some potential IBIS users
away if they believe they are chasing a moving "standard".

Also the full version with the roster attached came out as garbage ASCII characters.
Is it encoded or something?  I have never had trouble receiving mail before, so I
am wondering if anyone else got garbage.

				Kellee Crisafulli
				HyperLynx

From Will_Hobbs@ccm2.jf.intel.com  Sat Jan  7 17:18:31 1995
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Date: Sat, 7 Jan 95 17:13:46 PST
From: Will Hobbs <Will_Hobbs@ccm2.jf.intel.com>
Message-Id: <950107171346_1@ccm.jf.intel.com>
To: 71436.1314@compuserve.com, ibis@vhdl.org
Subject: Re: Re Press Release Draft, From Kellee Crisafulli


Text item: 

Kellee,

Derrick posted the full roster version, and I didn't look at it, so I don't know
what happened.  It might be word for windows.  I appreciate your suggestion re: 
V1.1 backward compatibility and will make that change.

Will

I have just read the draft release of the press release and it looks good.

I believe it could be improved with a statement to the effect that it is fully 
backward compatible with version 1.1.

It seems to me that we should present IBIS as a specification which fully 
maintains backward compatibility.  We may scare some potential IBIS users 
away if they believe they are chasing a moving "standard".

Also the full version with the roster attached came out as garbage 
ASCII characters.
Is it encoded or something?  I have never had trouble receiving mail 
before, so I
am wondering if anyone else got garbage.

				Kellee Crisafulli
				HyperLynx

Text item: External Message Header

The following mail header is for administrative use
and may be ignored unless there are problems.

***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.

Message-Id: <950107061826_71436.1314_HHB34-1@CompuServe.COM>
Subject: Re Press Release Draft, From Kellee Crisafulli
To: IBIS ALL <ibis@vhdl.org>
From: Kellee Crisafulli <71436.1314@compuserve.com>
Date: 07 Jan 95 01:18:27 EST
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From ventham@quantic.mb.ca  Mon Jan  9 06:31:50 1995
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From: ventham@quantic.mb.ca (Mike Ventham)
Message-Id: <9501091425.AA20349@quantic.mb.ca>
Subject: Re: Re Press Release Draft, From Kellee Crisafulli
To: 71436.1314@compuserve.com (Kellee Crisafulli)
Date: Mon, 9 Jan 95 8:25:45 CST
Cc: ibis@vhdl.org
In-Reply-To: <950107061826_71436.1314_HHB34-1@CompuServe.COM>; from "Kellee Crisafulli" at Jan 7, 95 1:18 am
X-Mailer: ELM [version 2.3 PL11]

> 
> I have just read the draft release of the press release and it looks good.
> 
> I believe it could be improved with a statement to the effect that it is fully
> backward compatible with version 1.1.
> 
> It seems to me that we should present IBIS as a specification which fully
> maintains backward compatibility.  We may scare some potential IBIS users
> away if they believe they are chasing a moving "standard".
> 
I agree.

> Also the full version with the roster attached came out as garbage ASCII characters.
> Is it encoded or something?  I have never had trouble receiving mail before, so I
> am wondering if anyone else got garbage.

Derrick used uuencode to encode this message. This is a UNIX utility that
take files with characters that screw up the mail system - usually
binary files or compressed text files and makes them mailable.
The limits are denoted by the 'begin nnn <filename>' and 'end' lines.
Normally to decode this sort of message you pipe it to a program
called uudecode.
I believe that there are PC versions of this available but I am uncertain
where.

To save you time I have enclosed the decoded list below. Actually in this
case it was unnecessary to encode it as the file was text only and the
encoded size was bigger.

> 
> 				Kellee Crisafulli
> 				HyperLynx
> 
Regards

Mike Ventham

P.S. 
Will and Derrick,
You included my suggested changes except for the first one. I thought
that integrity models should be proceeded by signal - indicated by
the #signal# below.

M.V.
-- 
+======================================================================+
| Mike Ventham - Vice President Engineering, Quantic Laboratories Inc, |
| 12th Floor, 191 Lombard Ave, Winnipeg, Manitoba, Canada R3B 0X1      |
| Tel: (204) 942 4000 Fax: (204) 957 1158 Email: ventham@quantic.mb.ca |
+======================================================================+
i-----------------CUT HERE ---------------------------------------------

For more information contact:                           For Immediate Release 
IBIS Open Forum
Will Hobbs, (503) 696-4369 (number not to be published)
Jon Powell, (805) 988-8250
 
                            IBIS Press Release
                              DRAFT 1/6/95
 
Rev 2.1 of IBIS Signal Integrity Model Specification Announced IBIS Standard 
that Supports Early, Accurate Models for Signal Integrity Simulations of 
High-speed Digital Systems Now Supports More Functions
 
HILLSBORO, Ore.  _ December 9, 1994 _ A group of Electronic Design Automation 
(EDA) and semiconductor companies today announced the ratification and 
acceptance of Revision 2.1 of the I/O Buffer Information Specification (IBIS) 
standard for #signal# integrity models.  This release is an upgrade to the rev 1.1 
specification released last year (Press Release dated Oct.  12, 1993).  This 
improved and refined standard adds support for ECL, dual-supply buffers, 
ground bounce due to shared power rails, differential I/O, termination 
components, controlled rise-time buffers, much more complete package 
descriptions, improved open-side device modeling (open drain, etc.) and 
reference waveforms.  These enhancements are a result of more EDA companies 
supporting the IBIS specification and feedback of those using rev 1.1 models.
 
The IBIS Open Forum has created a version 2.1 of the "golden parser" that checks
model syntax for comformance to the specification.  It is currently being Beta 
tested.  When completed, the parser will be made freely available in object code
format
 
IBIS is a consistent software parsable format that semiconductor vendors can 
use to specify the analog characteristics of input and output buffers.  This 
essential information is readily transformed into accurate models by end users 
and simulation tool vendors.  The resulting behavioral models enable users to 
perform high-speed, accurate signal-integrity simulations of their digital 
system interconnects.
 
The IBIS Version 2.1 specification was developed through the cooperative efforts
of simulator vendors and semiconductor companies who together comprise the IBIS 
Open Forum (see the attached roster).
 
For More Information
 
For more information about the IBIS Open Forum, send an e-mail request to 
ibis-info@vhdl.org.  All of the documents and publicly available models are 
currently accessible via the public repository of VHDL International's 
Internet based machine (vhdl.org, 198.31.14.3, http://vhdl.org/).  WWW, 
Gopher, FTP and Telnet "Anonymous", and "guest" dial-in access, (415) 
335-0110, are all available.
 
 
IBIS Open Forum
Contact List (roster below)

============================================================================
                   IBIS Open Forum Participation Roster
                    As of 1/5/95 (updated periodically)

                 33 total company/organizations listed
                      Submit changes/updates to:
                   Derrick_Duehren@ccm.jf.intel.com
                  (503) 696-4299, Fax (503) 696-4904
============================================================================
NOTE: This roster lists companies and organizations that have participated 
in defining the IBIS specification.  Other than the specific statements of 
support under each organizationFs name, no support nor endorsement of the 
specification is implied.
============================================================================

Anacad
  Contact:  Steffen Rochel
  Email:    sr@anacad.de
  Phone:    +49 (731) 9545414, FAX: +49 (731) 9545450
  Address:  Helmholtzstr.20 
            89081 Ulm 
            Germany
  Support:  Anacad can translate IBIS descriptions into models using their
            analog behavioral modeling language HDL-A.  Together with Eldo
            and a VHDL simulator, highly accurate investigations of mixed
            signal designs are then possible.
  Tag-line: 

Ansoft Corporation
  Contact:  Henri Maramis
  Email:    maramis@ansoft.com
  Phone:    (412) 261-3200, Fax: (412) 471-9427
  Address:  4 Station Square, Suite 660 
            Pittsburgh, PA. 15219
  Support:  The Ansoft Maxwell SI product will support IBIS models/library 
            in native format.
  Tag-line: Ansoft is a dedicated provider of electromagnetic field 
            simulation software and integrated solutions for signal 
            integrity and EMC/EMI.

Atmel Corporation
  Contact:  Dan Terry
  Email:    No internet address -- Pls Fax notices
  Phone:    (408) 436-4346, Fax: (408) 436-4200
  Address:  
            
  Support:  
  Tag-line: 
  
Cadence Design Systems, Inc.
  Contact:  C. Kumar
  Email:    cpk@cadence.com
  Phone:    (508) 262-6488, Fax: 508-262-6600 
  Address:  270 Billerica Rd,
            Chelmsford,  MA 01824
  Support:  Cadence fully supports IBIS models.  Cadence's DF/SigNoise
            product family offers a vendor-specific, IBIS compatible signal 
            integrity library of over 7000 components.  Cadence also 
            provides a translator program enabling the conversion of IBIS 
            1.1 and 2.1 files to Cadence library format.
  Tag-line: Cadence, the worldwide leader in electronic design automation,
            combines leading-edge technology and a complementary set of
            services to accelerate and advance the overall performance 
            engineering of high-speed electronic systems.

Contec Microelectronics USA, Inc.
  Contact:  Dileep Divekar, Clark Cochran
  Email:    dileep@contec.com
  Phone:    (408) 434-6767, Fax: (408) 434-6884 
  Address:  2188 Bering Drive
            San Jose, CA 95131
  Support:  A Contec product will support IBIS models in native mode.  
  Tag-line: 

Digital Equipment Corp.
  Contact:  Barry Katz
  Email:    wkatz@ingr.com
  Phone:    (508) 493-5083, Fax: (508) 493-4461 
  Address:  129 Parker Street, PK03-1/R11
            Maynard, MA 01754
  Support:  Digital will generate IBIS models for its own chip products, 
            including the line of ALPHA AXP microprocessors, as needed, and 
            support IBIS models in in-house simulation tools.
  Tag-line: Digital, maker of the world's fastest microprocessor, is also a 
            leading developer of computer systems, and networking and 
            communication products, including PCI.

Hewlett-Packard/HP EEsof Division
  Contact:  Karl Kachigan
  Email:    karlk@sr.hp.com
  Phone:    (707) 577-3949,  Fax: (707) 577-5260 
  Address:  1400 Fountaingrove Parkway
            Santa Rosa, CA 94503
  Support:  None at this time
  Tag-line: HP EEsof is a leading supplier of high frequency analog
            (RF/Microwave) design and modeling tools.

High Design Technology
  Contact:  Michael Smith
  Email:    
  Phone:    011-39-11-33-84-34, Fax:  011-39-11-385-99-67
  Address:  
            
  Support:  
  Tag-line: 
  
HyperLynx
  Contact:  Kellee Crisafulli
  Email:    71436.1314@compuserve.com
  Phone:    (206) 869-2320, Fax: (206) 881-1008
  Address:  P.O. Box 3578
            Redmond, WA 98073-3578
  Support:  Several signal integrity analysis tools are available:
            LineSim:  A simulator using schematic data input, reads
                      IBIS files as part of its native library support. 
                      Ships with a set of IBIS libraries.

            BoardSim: A simulator using PCB geometry data input from
                      numerous PCB layout packages, also natively supports 
                      IBIS files.  Ships with a set of IBIS libraries.

                      Additional model libraries are available free of 
                      charge to customers on HyperLynx's BBS.
  Tag line: HyperLynx, Inc. is the industry's leading supplier of 
            affordable, accurate, PC-based signal-integrity software.

IBM Corporation (PowerPC)
  Contact:  Lynn Warriner
  Email:    bert@ibmoto.com
  Phone:    512-795-7234
  Address:  Somerset Design Center
            9737 Great Hills Trail
            Austin, Texas 78759
  Support:  IBM will provide IBIS models for the PowerPC product family. 
            Initially these models will be based upon design data.  As 
            hardware data is obtained these models will be upgraded.  
            Verification of these models will be accomplished in-house using 
            industry standard tools.
  Tag-line:

INCASES
  Contact:  Werner Rissiek, Olaf Rethmeier
  Email:    wr@cadlab.cadlab.de, olaf@cadlab.cadlab.de
  Phone:    ++49-5251-284-155, ++49-5251-284-222, Fax: ++49-5251-284-105 
  Address:  INCASES Engineering GmbH
            Vattmannstrasse 3
            D-33100 Paderborn, Germany
  Support:  INCASES uses the simulation program FREACS (Fast REflection And
            Crosstalk Simulator) for signal integrity analysis within the 
            EMC-Workbench.  INCASES can read IBIS Version 1.1 files and 
            translate the IBIS models into FREACS models.  INCASES uses an 
            IBIS parser and an automatic process for the parametrization of 
            the FREACS macromodels.

            Additionally, so called 'reference lists' are set-up that are 
            used by the interface (XLIN) between the EMC-Workbench and the 
            FREACS macromodel library.  These reference lists consist of 
            circuit informations in a special language named HINAC 
            (Hierachical Naming Convention), where macromodel data is 
            assigned to pins of a component using IBIS-informations, as 
            well.

            In this way a controlled set-up of a library is possible using 
            IBIS-files as basis.

            Detailed information is available on request.

  Tag-line: INCASES Engineering, GmbH, Germany, founded on November 1, 1994,
            is a supplier of design automation software and consulting 
            services to the electronic design automation (EDA) market, 
            focusing on EMC and 'Design for  Manufacturability'.  INCASES 
            develops, sells, and supports two major product lines: THEDA, 
            acquired from Computervision Corporation and EMC-Workbench, 
            acquired from Siemens Nixdorf Informationssysteme AG.

Integrity Engineering, Inc.
  Contact:  Greg Doyle
  Email:    gdoyle@intgrty.mn.org
  Phone:    (612) 636-6913, Fax: (612) 631-2241
  Address:  1306 W. Country Rd. F, Suite 100
            St. Paul, MN 55112
  Support:  The Integrity Simulators and Parasitic Extractor tools, SImnet, 
            SImnet X, and Autospice are shipped with an IBIS2IEI translation 
            program that enables any IBIS file to be directly converted for 
            use with the simulator or SPICE extractor.

            The next revisions of IEI programs, slated for delivery 2Q '94, 
            will support IBIS models in native mode.  A utility will be 
            provided to read, edit, and view IBIS files directly.
  Tag-line: 

Intel Corporation
  Contact:  Will Hobbs
  Email:    Will_Hobbs@ccm2.jf.intel.com
  Phone:    (503) 696-4369, Fax: (503) 696-4210
  Address:  5200 NE Elam Young Pkwy, JF1-57
            Hillsboro, OR 97124
  Support:  Intel provides IBIS models for some of its components.  For a 
            list of supported components, send the following message to 
            archive@vhdl.org:
            path <your return email path>
            send pub/ibis/models/intel readme   index /pub/ibis/models/intel
  Tag-line: Intel, the world's largest chip maker, is also a leading 
            manufacturer of personal computer networking and communications
            products.

Interconnectix, Inc.
  Contact:  Bob Ross
  Email:    bob@icx.com
  Phone:    (503) 684-6641, Fax: (503) 639-3469
  Address:  10220 S.W. Nimbus Ave., K4
            Portland, Oregon 97223
  Support:  The Interconnect Synthesis (IS) product supports the major 
            extensions of IBIS Version 2.1.  Interface extensions for 
            component and model selection and termination generation
            allow IBIS formatted data to be used in "what if" 
            investigations and automatic synthesis operations.
  Tag-line: The leading Interconnect Synthesis Company

Intergraph Corp.
  Contact:  Rob Kelley
  Email:    rkelley@ingr.com
  Phone:    (205) 730-8978
  Address:  One Madison Industrial Park
            Huntsville, AL  35894-0001
  Support:  Intergraph Electronics fully supports the activities of the IBIS 
            open forum and as such, is ensuring that all signal integrity 
            development is aligned so that our customers will be able to 
            take advantage of IBIS as the standard stabilizes. 
  Tag-line: Intergraph Corporation, a Fortune 500 company, is the world's 
            largest independent NT development site and the world's largest 
            company dedicated to supplying interactive computer graphics 
            systems.

Integrated Silicon Systems, Inc.
  Contact:  Eric Bracken
  Email:    bracken@isscad.com
  Phone:    (412) 832-9627
  Address:  One Northgate Square
            Greensburg, PA 15601-1341
  Support:  PSIBoards accepts IBIS model files directly.  The IBIS files can
            contain any number of models or components.  Instances of these 
            models can be declared in the program's input deck, along with 
            interconnections, to describe a complete design.
  Tag-line: Integrated Silicon Systems, Inc. is a leading supplier of
            hierarchical layout verification products.

IntuSoft
  Contact:  Charles Hymowitz
  Email:    
  Phone:    (303) 833-0710
  Address:  
            
  Support:  IntuSoft takes a customer's netlist or model and translates it 
            into a Spice model, free of charge.  IntuSoft has the Golden 
            Parser source but hasn't, as of yet, automated the process.  
            IntuSoft is waiting until there are more IBIS models available.
  Tag-line: 

Mentor Graphics Corp.
  Contact:  Greg Seltzer
  Email:    Greg_Seltzer@mentororg.com
  Phone:    (503) 685-1198, Fax: (503) 685-7991
  Address:  8005 SW Boeckman Rd.
            Wilsonville, OR 97070-7777
  Support:  Mentor supports IBIS by using Quad Design and Intel IBIS models.
  Tag-line: 

Meta-Software
  Contact:  John Sliney,      Mei Wong
  Email:    johns@metasw.com, mei@metasw.com
  Phone:    (408) 369-5446, Fax: (408) 371-5100
  Address:  1300 White Oaks Rd.
            Campbell, CA 95008
  Support:  
  Tag-line: 

MicroSim Corp.
  Contact:  Arthur Wong
  Email:    
  Phone:    (714) 770-3022, FAX: (714) 455-0554
  Address:  20 Fairbanks
            Irvine, CA 92718
  Support:  MicroSim can automatically generate PSpice models for vendors 
            who provide data in a file format conforming to the IBIS Ver 1.1
            specification.  The models can then be simulated with PSpice.
            MicroSim has made IBIS models for Intel's Pentium processor 
            82430 PCIset available to customers.
  Tag-line: MicroSim Corp. - The Desktop EDA Company - provides technically 
            sophisticated software for schematic entry, simulation, 
            programmable logic synthesis, and signal integrity analysis.

National Semiconductor Corp.
  Contact:  Syed B.Huq
  Email:    huq@rockie.nsc.com
  Phone:    (408) 721-4874, Fax:(408)721-4785 
  Address:  2900 Semiconductor Drive, M/S E-200
            Santa Clara, CA 95052
  Support:  The Advanced Systems & Interface Product Group(ASIP) of National
            Semiconductor is willing to create IBIS model files and provide
            IBIS model support to customers.
  Tag-line: National Semiconductor provides technologies for moving and
            shaping information.  The company focuses on communications, 
            analog, and personal systems markets, and is the fourth largest 
            U.S semiconductor merchant.

NEC Corporation
Contact:  Hiroshi Matsumoto
Email:    mat@lsi.tmg.nec.co.jp
Phone:    +81 -44-435-1501(DIR), Fax: +81 -44-435-1887 
Address:  Design Sys. Dept., System ASIC Div., NEC Corp.
          1753 Shimonumabe, Nakahara-ku
          Kawasaki Japan 211
Support:  NEC is willing to write some IBIS models and a model generator
          for some of its LSI components.
Tag-line:

North Carolina State University
  Contact:  Michael Steer, Paul Franzon,   Steve Lipa
  Email:    mbs@ncsu.edu   paulf@ncsu.edu  slipa@eos.ncsu.edu 
  Phone:    919-515-5191   919-515-7351    919-515-3947  
            FAX for all three: 919-515-5523
  Address:  ECE Dept. Box 7911 
            NC State Univ. 
            Raleigh, NC  27695-7911 
  Support:  (as of 2/94) A Spice to IBIS converter is being developed.  A 
            measurement based procedure is being developed for extracting 
            IBIS models.  A yacc/lex parser for IBIS models is being 
            develped.  All software and techniques will be put in the public 
            domain.
  Tag-line: 

Quad Design Technology, Inc.
  Contact:  Jon Powell
  Email:    jonp@qdt.com
  Phone:    (805) 988-8250, Fax: (805) 988-8259
  Address:  1385 Del Norte Rd.
            Camarillo, CA 93010
  Support:  Quad Design has a translation program that translates from IBIS
            format to Quad Design .mod format.  This translator uses the 
            Golden Parser code with enhancements to warn of malformed (yet 
            legal) models.  The translator supports user input to be able to 
            select from the min-typ-max range of IBIS data.  This program 
            (IBIS2XTK) is available now and is distributed with XTK 
            Crosstalk and transmission line simulation tool kit.
  Tag-line: Quad Desgin is a leading supplier of Signal Integrity and Timing 
            tools for high speed digital designs.

Quantic Laboratories, Inc.
  Contact:  Mike Ventham
  Email:    ventham@quantic.mb.ca
  Phone:    (204) 942-4000, Fax: (204) 957-1158 
  Address:  12th Floor, 191 Lombard Ave
            Winnipeg, Manitoba, R3B 0X1
            Canada
  Support:  Quantic provides an IBIS reader (based on the Golden
            Parser) that will read IBIS models and automatically generate 
            data files for Phidias (our graphical VI curve device modellor) 
            and database files that associate the component definitions with 
            the pin models.

            From Phidias, both SPICE models for PCB Greenfield (our pre
            and post layout transmission line simulator) and models for
            BoardScan, (our PC board screener for signal integrity and 
            crosstalk problems) can be created.

            This is available now for Quantic customers.
  Tag-line: Quantic Laboratories Ltd has been the leading supplier of
            field solvers and signal integrity tools since 1983. This 
            expertise has now been extended to Electromagnetic Compatibility 
            (EMC) tools.

Symmetry Design Systems, Inc.
  Contact:  Andy Hughes
  Email:    andy@symmetry.com
  Phone:    (415) 949-9600, Fax: (415)-949-0831
  Address:  477 S. San Antonio Rd. #200
            Los Altos, Ca. 94022

  Support:  Symmetry provides IBIS modeling tools and services. Symmetry's 
            modeling tool MODPEX can create IBIS models based on measured 
            device characteristics or data sheet information. MODPEX can 
            translate IBIS models to SPICE descriptions for testing and 
            documentation or translate SPICE models to IBIS.

  Tag-line: Symmetry is a dedicated supplier of tools and services for 
            creating, testing, and documenting SPICE and IBIS component 
            models for electronic system design.

Synopsys Inc. (Logic Modeling Group)
  Contact:  Bill Lattin
  Email:    billl@lmc.synopsys.com
  Phone:    (503) 690-6900, Fax (503) 690-6906
  Address:  19500 NW Gibbs Dr.
            Beaverton, OR 97075
  Support:  None at this time
  Tag-line: 

Texas Instruments
  Contact:  Bob Ward
  Email:    bward@neosoft.com
  Phone:    (713) 274-4146, Fax (713) 274-3911
  Address:  P.O. Box 1443, M/S 631
            Houston, TX 77251
  Support:  TI has a three-pronged attack on IBIS support.  TI is working on 
            a scheme to automatically generate IBIS models from TI Spice 
            simulations (TI's proprietary Spice dialect), on an automatic 
            means to generate C code to be linked in to TI Spice as a User 
            Defined Element from an IBIS model, and an automatic means to 
            create the Spice equivalent of the IBIS model from the IBIS 
            model specification.

            The latter method differs from the second in that it uses 
            skeletonized Spice primitive elements in the form of a 
            subcircuit, while the second actually generates C code and 
            compiles it for dynamic linking.
  Tag-line: 

Thomson-CSF/SCTF
  Contact:  Jean Lebrun
  Email:    
  Phone:    
  Address:  
            
  Support:  
  Tag-line: 

UniCAD Canada Ltd.
  Contact:  Stephen Lum
  Email:    lum@unicad.com
  Phone:    (613) 596-9091 Ext. 321
  Address:  2745 Iris Street
            Pinecrest Office Park
            Ottawa, Ontario K2C 3V5
  Support:  UniSolve, a concurrent engineering workbench currently
            supports IBIS v1.1 model files in native mode for signal 
            integrity analysis.  Support for IBIS v2.1 is planned for early 
            1995.
  Tag-line: UniCAD, INC. provides software used in the layout and
            analysis of printed circuits and multichip modules.  It provides 
            the only available concurrent Computer Aided Analysis (CAA) 
            environment used to simultaneously monitor Emissions, Digital 
            Signal Integrity, Analog Signal Integrity, Thermal, and 
            Reliability throughout the design layout process.

Zeelan Technology, Inc.
  Contact:  Hiro Moriyasu, George Opsahl
  Email:    zeelan@netcom.com
  Phone:    (503) 520-1000
  Address:  10550 SW Allen Blvd.
            Beaverton, OR 97005
  Support:  Zeelan Tech. provides a modeling service that characterize and 
            creates models conforming to the IBIS format.  Zeelan Tech. 
            MasterModel(TM) models are created from measurements of physical 
            devices using a tightly controlled high-frequency fixture and 
            modeling system.  These models closely represent actual device 
            behaviour when used in simulation.
  Tag-line: 

Zuken-Redac
  Contact:  John Berrie
  Email:    johnb@redact.co.uk
  Phone:    +44 684 294161, Fax: +44 684 299754
  Address:  Tewkesbury
            Gloucestershire GL20 8QL,
            England
  Support:  Work is in progress to enable use of IBIS models in native 
            format for Redac High-Performance Engineering and EMC Adviser 
            products.  In addition, integration with Quad Design and Quantic 
            products provides the stated level of support provided by these 
            companies.
  Tag-line: Racal-Redac is a world leader in design automation, providing 
            open, leading technology, standards-based CADCAM solutions.


 

From mbs@eos.ncsu.edu  Mon Jan  9 07:23:06 1995
Return-Path: <mbs@eos.ncsu.edu>
Received: from mbs.ece.ncsu.edu (c11058-335dan.ece.ncsu.edu) by vhdl.vhdl.org (4.1/SMI-4.1/BARRNet)
	id AA10422; Mon, 9 Jan 95 07:23:06 PST
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	id AA04813; Mon, 9 Jan 1995 10:18:21 -0500
From: mbs@eos.ncsu.edu
Message-Id: <9501091518.AA04813@mbs.ece.ncsu.edu>
To: ibis@vhdl.org
Subject: whereabouts of uudecode/uuencode for DOS
Date: Mon, 09 Jan 95 10:18:20 EST

Mike Ventham writes,

> ... uuencode is a UNIX utility  ...
>I believe that there are PC versions of this available but I am uncertain
>where.
    You can obtain suitable programs for DOS (zip, compress, uudecode,
    uudecode) as follows:

          ftp oak.oakland.edu
          login as anonymous
          binary                              // to put in binary transfer mode
          cd /pub/msdos/zip
          get pkz204g.exe                     // the zip archive create/extract
                                                 program.  Run this program to
                                                 generate the required utilities
          cd /pub/msdos/compress
          get comp430d.zip                    // Unix-compatible 16bit
                                                 compress/uncompress utility
          cd /pub/msdos/decode
          get qux01_91.zip                    // UUencode/UUdecode

          quit                                // finish up


Michael Steer


From mbs@eos.ncsu.edu  Mon Jan  9 07:25:20 1995
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Received: from mbs.ece.ncsu.edu (c11058-335dan.ece.ncsu.edu) by vhdl.vhdl.org (4.1/SMI-4.1/BARRNet)
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	id AA04847; Mon, 9 Jan 1995 10:20:37 -0500
From: mbs@eos.ncsu.edu
Message-Id: <9501091520.AA04847@mbs.ece.ncsu.edu>
To: ibis@vhdl.org
Subject: IBIS model submission procedure (revised)
Date: Mon, 09 Jan 95 10:20:35 EST

                    PROCEDURE FOR SUBMITTING A MODEL TO
                        THE IBIS MODEL LIBRARY

                               January 6, 1994

                                Michael Steer
                            IBIS Model Librarian
             Department of Electrical and Computer Engineering
                    North Carolina State University
                    Raleigh, NC 27695-7911
                    phone: +1-919-515-5191
                    fax:   +1-919-515-3027
                    email: mbs@ncsu.edu   (preferred means of communication)

Vendors and others are encouraged to submit IBIS models to the IBIS model
library.  The IBIS librarian maintains the IBIS models stored on vhdl.org
in the directory /pub/ibis/models .

  1.  Before submission models must be readable by the Golden
      Parser with out errors or warning messages being generated.

  2.  A submission should consist of the following:

      a.  A readme file ( named README.TXT ) including the following
 
          Name of Person Submitting:   XXXXXXXXXXXX
          Address:     XXXXXXXXXXXXXXXXXXXXXXXXXXXX
          Affiliation: XXXXXXXXXXXXXXXXXXXXXXXXXXXX
          E-Mail:      XXXXXXXXXXXXXXX
          Telephone Number: XXXXXXXXXXXXXXXXXXXXXXX
          Fax Number:       XXXXXXXXXXXXXXXXXXXXXXX
          Suggested Directory Structure XXXXXXXXXXX
            Structure for models

      b.  A Model Transfer Agreement Use the sample below) must be signed
          and mailed to the IBIS librarian < mbs@ncsu.edu >.  The model
          transfer agreement must be MAILED to 
                    Dr. Michael Steer
                    Attn: IBIS
                    Department of Electrical and Computer Engineering
                    North Carolina State University
                    Raleigh, NC 27696-7911
          The above address is good for the post-office, Federal Express,
          Airborne, UPS etc. even though there is no street address.

          The model check-in procedure will not be finalized until
          this agreement has been received by the IBIS librarian.

      c.  All files should be in a single file before emailing to the IBIS
          librarian. Use one of the following four methods:

          1. [ gnu tar AND ( uuencode OR mmencode ) ]
          2. [ tar AND compressed AND ( uuencode OR mmencode ) ]
          3. [ zip AND ( uuencoded OR mmencode'd ) ]
          4. [ zip ] 
             Note that zip'ing alone may result in problems due to non-ascii 
             characters.  You can obtain suitable programs for DOS as follows:

          ftp oak.oakland.edu
          login as anonymous
          binary                              // to put in binary transfer mode
          cd /pub/msdos/zip
          get pkz204g.exe                     // the zip archive create/extract 
                                                 program.  Run this program to
                                                 generate the required utilities
          cd /pub/msdos/compress
	  get comp430d.zip                    // Unix-compatible 16bit 
                                                 compress/uncompress utility
          cd /pub/msdos/decode
	  get qux01_91.zip                    // UUencode/UUdecode
   
          quit                                // finish up
 
      Expect an acknowledgement within two days.



  3.  When models are received:
         a. The following will be added to each IBIS file if not already
            present:

         [Disclaimer] IBIS Open Forum disclaims all warranties. See
         DISCLAIM.TXT in vhdl.org:/pub/IBIS/models for the full disclaimer.


         b. The IBIS models will be checked with the Golden Parser and if
            they parse successfully they will be accepted.


  4.   The IBIS models will be treated as confidential until they are
       publically released.  When new models are added an announcement will
       be made.
       


==============================================================================
   
                 IBIS Model Transfer Agreement


The under-signed submitter has submitted the following models to
the IBIS library (list model filenames)

------------------------------------------------------------------------------

------------------------------------------------------------------------------

------------------------------------------------------------------------------


The submitter authorizes inclusion of the submitted models in the model
library.

The model files will be provided as is except for the addition of the
following statement to each file:

        [Disclaimer] IBIS Open Forum disclaims all warranties. See
        DISCLAIM.TXT in vhdl.org:/pub/IBIS/models for the full disclaimer.

If the models were written as a work made for hire in the course of
employment, the Work is owned by the company/employer which must sign this
agreement in the space provided below.


Submitter's Signature and Date  _______________________________

Typed or Printed Name and Title _______________________________

Institution or Company          _____________________________________________



Authorization (if required)     _______________________________

Typed or Printed Name and Title _______________________________



Please Check
___________

                         ___
  Submitter's Own Work   |  |
                         |__|
                         ___
  Work done for Hire     |  |
                         |__|






From Derrick_Duehren@ccm2.jf.intel.com  Mon Jan  9 09:24:38 1995
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Received: from ormail.intel.com by vhdl.vhdl.org (4.1/SMI-4.1/BARRNet)
	id AA11186; Mon, 9 Jan 95 09:24:38 PST
Received: from relay.jf.intel.com by ormail.intel.com with smtp
	(Smail3.1.28.1 #7) id m0rRNl1-000UkUC; Mon, 9 Jan 95 09:19 PST
Received: from ccm.jf.intel.com by relay.jf.intel.com
	(Smail3.1.28.1 #2) id m0rRNl0-000twsC; Mon, 9 Jan 95 09:19 PST
Received: by ccm.jf.intel.com (ccmgate 3.0) Mon, 9 Jan 95 09:19:50 PST
Date: Mon, 9 Jan 95 09:19:50 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950109091950_5@ccm.jf.intel.com>
To: ibis@vhdl.org
Subject: Re[2]: Re Press Release Draft, From Kellee Crisafulli


Text item: 

 
 I attached a plain text file.  Here it is again.  I would have put it in the 
 regular message text, but it's too big to fit in cc:Mail's text buffer, hence 
 the attachment 
 
 I have also placed the file in pub\ibis\pressrel.dir\pr010995.txt on vhdl.org.
 
 - Derrick

______________________________ Reply Separator _________________________________
Subject: Re: Re Press Release Draft, From Kellee Crisafulli
Author:  Will Hobbs at JFCCM3
Date:    1/7/95 5:39 PM


Kellee,
 
Derrick posted the full roster version, and I didn't look at it, so I don't know
what happened.  It might be word for windows.  I appreciate your suggestion re: 
V1.1 backward compatibility and will make that change.
 
Will
 
I have just read the draft release of the press release and it looks good.
 
I believe it could be improved with a statement to the effect that it is fully 
backward compatible with version 1.1.
 
It seems to me that we should present IBIS as a specification which fully 
maintains backward compatibility.  We may scare some potential IBIS users 
away if they believe they are chasing a moving "standard".
 
Also the full version with the roster attached came out as garbage 
ASCII characters.
Is it encoded or something?  I have never had trouble receiving mail 
before, so I
am wondering if anyone else got garbage.
 
				Kellee Crisafulli
				HyperLynx

begin 644 pressr2.txt
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end


From Derrick_Duehren@ccm2.jf.intel.com  Mon Jan  9 09:37:48 1995
Return-Path: <Derrick_Duehren@ccm2.jf.intel.com>
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Date: Mon, 9 Jan 95 09:33:06 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950109093306_1@ccm.jf.intel.com>
To: ibis@vhdl.org
Subject: Press Release w/V1.1 backwd comp.


Text item: 

 
 An updated press release with Kellee's backward compatibility suggestion is 
 attached and in vhdl.org \pub\ibis\pressrel.dir\pr010995.txt.  
 
 - Derrick

______________________________ Reply Separator _________________________________
Subject: Re: Re Press Release Draft, From Kellee Crisafulli
Author:  Will Hobbs at JFCCM3
Date:    1/7/95 5:39 PM


Kellee,
 
Derrick posted the full roster version, and I didn't look at it, so I don't know
what happened.  It might be word for windows.  I appreciate your suggestion re: 
V1.1 backward compatibility and will make that change.
 
Will
 
I have just read the draft release of the press release and it looks good.
 
I believe it could be improved with a statement to the effect that it is fully 
backward compatible with version 1.1.
 
It seems to me that we should present IBIS as a specification which fully 
maintains backward compatibility.  We may scare some potential IBIS users 
away if they believe they are chasing a moving "standard".
 
Also the full version with the roster attached came out as garbage 
ASCII characters.
Is it encoded or something?  I have never had trouble receiving mail 
before, so I
am wondering if anyone else got garbage.
 
				Kellee Crisafulli
				HyperLynx

begin 644 pr010995.txt
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M('!R;V1U8W1S+B`@26X@861D:71I;VXL(&EN=&5G<F%T:6]N('=I=&@@475A
M9"!$97-I9VX@86YD(%%U86YT:6,@#0H@("`@("`@("`@("!P<F]D=6-T<R!P
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M.B!286-A;"U2961A8R!I<R!A('=O<FQD(&QE861E<B!I;B!D97-I9VX@875T
M;VUA=&EO;BP@<')O=FED:6YG(`T*("`@("`@("`@("`@;W!E;BP@;&5A9&EN
M9R!T96-H;F]L;V=Y+"!S=&%N9&%R9',M8F%S960@0T%$0T%-('-O;'5T:6]N
+<RX-"@T*#0H@#0IY
`
end


From Derrick_Duehren@ccm2.jf.intel.com  Mon Jan  9 10:48:57 1995
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Date: Mon, 9 Jan 95 10:44:08 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950109104408_3@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: Re[2]: 2.1 changes [Done]

Paul,
 
Regarding your points,
 
1. I agree with what you have done.
 
3. This should be done as part of an extension to your project.
 
4. We rejected this change to avoid at this time impacting many, if not 
all of your modules.  We would really not have time to adequately test 
your changes.  So do nothing on 4.
 
5. I don't know what the solution would be or impact.  For me, I don't care 
since I can always do the dos2unix or unix2dos conversion.  Kelly C. has 
opinions on this issue.  If it is a trivial solution or flag, then we 
should consider it.  Otherwise, I think this should be dropped since there 
is no BIRD or formal agreement to proceed.
 
6. The scale issue was raised again at the last meeting and the point is 
valid to the extent that the parser not only tests rigorous compliance to 
Version 2.1, but also gives in a few cases (monotonicity test) warnings for 
reasonableness of data.  We currently allow any character or string to 
follow any numerical entry, and the first case sensitive letter which would 
be interpreted as a unit is explicitly defined.  It is difficult to 
generalize a warning test without making this a very big project.  So, I 
would like to see the impact before proceeding since we have not agreed
to what type of test be reasonable.
 
One possible limited test would be just to issue a WARNING message on any 
L and C sub-parameters equal or greater than 1m.  This will warn someone 
who inadvertently entered .5 instead of .5nH or .5pF since some systems
use nH and pF as default units, and would also warn of certain typo's such as 
entering .5PF of .5NH or 5mH.  There may be about 10 or 15 such subparameters, 
and also the coupled package L and C tables.
 
7. Thank you for finding the mistake regarding L_dut, C_dut, R_dut.  I think 
Derrick should make the correction and repost the standard since this looks 
like an omited line.
 
> Will/Derrick/Bob/Ron,
 
>    The following is my accessment of what has been documented (2.1 spec) or 
> talked about for changes to the golden parser.  Please let me know your
> thoughts/comments on what I've mentioned here, plus indicate if I've forgotten
> anything.  Once this is decided then work can proceed.
 
 
> >From comparing the ver2_0.ibs file against the ver2_1.ibs file, I find the 
> following changes for the parser:
 
> 1) Corrected non-monotonic checking (already done).  The actual error message 
>    used differs from that suggested in the spec, although contains the same
>    information (except the "Most simulators ..." text).  Instead of "Note:" 
>    the parser uses "Warning".  Also, the parser message doesn't specify the 
>    model name since the specific curve and line number are provided; this is 
>    consistent with how we wanted to structure error and warning messages.
 
> 2) Addition of V_fixture_min and V_fixture_max as waveform sub-parameters 
>    (already done).
 
> 3) Each waveform table must contain at least two entries.
 
 
> Other changes that have been talked about in email, BIRDS or IBIS 
meetings are:
 
> 4) Removing the case sensitivity on sub-parameters.  I expected the spec 
>    to mention this, but it did not.  Is it still desired?
 
> 5) Handle DOS files on UNIX systems and vice-versa.  This is basically the 
>    issue of the <CR> character being the last character in the record and 
>    proving itself irratating on the UNIX side.
 
> 6) If scale is not known, then issue a warning.  One problem is that 'V' is
>    not a known scale but, at least in the spec, is used frequently as a scale.
 
> Notes:
 
> 7) The Sub-Params list in the [Rising Waveform] comments added V_fixture_min 
>    and V_fixture_max, but DROPPED R_dut, L_dut, and C_dut.
 
 
>   I will provide the latest parser and sources to Arpad at the beginning 
of this
> next
> week (January 9).  Ron and I consider it complete for what was originally bid.
> It
> should only lack the issues mentioned above (#3, #4, #5, and #6), 
each of which
> was brought up afterwards.  Ron and I understand that you want the 
rest of this
> work wrapped up quickly, but I would like to make sure that #4, #5, and #6 are
> definitly things that are desired to be accomplished since none of them are
> mentioned in the new 2.1 spec.
 
> Paul Munsey

From Derrick_Duehren@ccm2.jf.intel.com  Mon Jan  9 11:37:43 1995
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Date: Mon, 9 Jan 95 11:33:01 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950109113301_1@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS >> Does Integrity Eng. still exist?


Text item: Text_1

 
 Does anyone know if Integrity Engineering still exists?  I've had no answer 
 from Greg Doyle.
 
 - Derrick

______________________________ Forward Header __________________________________
Subject: IBIS >> Does Integrity Eng. still exist?
Author:  Derrick Duehren at JFCCM2
Date:    12/8/94 9:52 AM

 
 An IBIS Open Forum member suggested that Integrity Engineering, Inc. no longer 
 exists.  Not having heard from you in a while, can you please confirm or deny 
 this rumor?  Below is Integrity Engineering's entry in the IBIS Participant's 
 Roster.  Let me know if you want any changes.
 
 
 Integrity Engineering, Inc.
   Contact:  Greg Doyle
   Email:    gdoyle@intgrty.mn.org
   Phone:    (612) 636-6913, Fax: (612) 631-2241 
   Address:  1306 W. Country Rd. F, Suite 100
             St. Paul, MN 55112
   Support:  The Integrity Simulators and Parasitic Extractor tools, SImnet, 
             SImnet X, and Autospice are shipped with an IBIS2IEI translation 
             program that enables any IBIS file to be directly converted for 
             use with the simulator or SPICE extractor.
 
             The next revisions of IEI programs, slated for delivery 2Q '94, 
             will support IBIS models in native mode.  A utility will be 
             provided to read, edit, and view IBIS files directly.
   Tag-line: 
 
 
 Derrick Duehren
 ------------------------------------------------------------------------------ 
 XTG TPV Programs Manager, Intel Corp. |  
 Phone (503) 696-4299                  |  "Experience is not what happens to 
 Fax   (503) 696-4904                  |   you; it's what you do with what 
 Derrick_Duehren@ccm.jf.intel.com      |   happens to you."
 5200 NE Elam Young Pkwy. JF1-97       |                     - Aldous Huxley 
 Hillsboro, OR 97224                   | 
 ------------------------------------------------------------------------------
 

From 71436.1314@compuserve.com  Mon Jan  9 11:55:34 1995
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Date: 09 Jan 95 14:47:49 EST
From: Kellee Crisafulli <71436.1314@compuserve.com>
To: IBIS ALL <ibis@vhdl.org>
Subject: UUENCODE/DECODE
Message-Id: <950109194749_71436.1314_HHB137-1@CompuServe.COM>

From: Kellee Crisafulli

Thankyou for all the responses and copies of the decoded message.

I actually have UUENCODE/DECODE, but I have never needed to use it before
and I did not recognize the file as needing to be decoded.  I tried the
decode utility on Derricks message and it worked fine.

Have a great day...    Kellee...


From 71436.1314@compuserve.com  Mon Jan  9 12:03:26 1995
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Date: 09 Jan 95 14:54:45 EST
From: Kellee Crisafulli <71436.1314@compuserve.com>
To: IBIS ALL <ibis@vhdl.org>
Subject: Press release v2.1, from Kellee Crisafulli
Message-Id: <950109195444_71436.1314_HHB137-2@CompuServe.COM>

From: Kellee Crisafulli

Will, your changes to add the sentence about backward compatibility look great.

Kellee...


From Derrick_Duehren@ccm2.jf.intel.com  Mon Jan  9 12:43:48 1995
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Date: Mon, 9 Jan 95 12:39:02 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950109123902_3@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: Does Integrity Eng. Still Exist? [Answer]

 
 Integrity Engineering was acquired by Mentor Graphics.  I spoke with Greg 
 Doyle, who is now at Mentor, and his preference was to add his name and email 
 address to the Mentor Graphics entry in the IBIS roster (see below).
 
 - Derrick
 
 Mentor Graphics Corp.
   Contact:  Greg Seltzer, Greg Doyle
   Email:    Greg_Seltzer@mentororg.com, Greg_Doyle@mentororg.com
   Phone:    (503) 685-1198, Fax: (503) 685-7991
   Address:  8005 SW Boeckman Rd.
             Wilsonville, OR 97070-7777
   Support:  Mentor supports IBIS by using Quad Design and Intel IBIS models.
   Tag-line: 
 

______________________________ Reply Separator _________________________________
Subject: Re: IBIS >> Does Integrity E
Author:  Greg_Seltzer@pdxml1.mentorg.com at SMTPGATE
Date:    1/9/95 12:15 PM

        Reply to:   RE>IBIS >> Does Integrity Eng. still
        
Mentor Graphics has acquired technology from Integrity Engineering.  Greg 
Doyle and key engineers work at Mentor Graphics in San Jose.  Integrity 
Engineering customers are still being supported and on maintenance.  You 
can contact Greg Doyle at 1-408-436-1500
 

From Will_Hobbs@ccm2.jf.intel.com  Mon Jan  9 13:33:33 1995
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From: Will Hobbs <Will_Hobbs@ccm2.jf.intel.com>
Message-Id: <950109132848_4@ccm.jf.intel.com>
To: 71436.1314@compuserve.com, ibis@vhdl.org
Subject: Re: Press release v2.1, from Kellee Crisafulli


Text item: 

Thanks, Kellee.  Derrick actually made the change, but since I accept praise 
from anyone at any time, ... :-)

Will

From: Kellee Crisafulli

Will, your changes to add the sentence about backward compatibility look great.

Kellee...

Text item: External Message Header

The following mail header is for administrative use
and may be ignored unless there are problems.

***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.

Message-Id: <950109195444_71436.1314_HHB137-2@CompuServe.COM>
Subject: Press release v2.1, from Kellee Crisafulli
To: IBIS ALL <ibis@vhdl.org>
From: Kellee Crisafulli <71436.1314@compuserve.com>
Date: 09 Jan 95 14:54:45 EST
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From Derrick_Duehren@ccm2.jf.intel.com  Mon Jan  9 14:30:17 1995
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Date: Mon, 9 Jan 95 14:25:28 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950109142528_2@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS Press Release, tweaked again!


Text item: Text_1

 
 Attached is the full, revised press release with the "signal" integrity model, 
  backward compatibility, and dateline fixes is attached.  It is plain ASCII, 
 but our mail system may uuencode it anyway.  The text w/o roster is below.
 - Derrick
 
 ------------------------------------------------------------------------------
 
For more information contact:                           For Immediate Release 
IBIS Open Forum
Will Hobbs, (503) 696-4369 (number not to be published)
Jon Powell, (805) 988-8250
 
                            IBIS Press Release
                          
Rev 2.1 of IBIS Signal Integrity Model Specification Announced IBIS Standard 
that Supports Early, Accurate Models for Signal Integrity Simulations of 
High-speed Digital Systems Now Supports More Functions

HILLSBORO, Ore.  _ January 9, 1995 _ A group of Electronic Design Automation 
(EDA) and semiconductor companies today announced the ratification and 
acceptance of Revision 2.1 of the I/O Buffer Information Specification (IBIS) 
standard for signal integrity models.  This release is a fully backward 
compatible upgrade to the rev 1.1 specification released last year (Press 
Release dated Oct. 12, 1993).  This improved and refined standard adds support 
for ECL, dual-supply buffers, ground bounce due to shared power rails, 
differential I/O, termination components, controlled rise-time buffers, much 
more complete package descriptions, improved open-side device modeling (open 
drain, etc.) and reference waveforms.  These enhancements are a result of more 
EDA companies supporting the IBIS specification and feedback of those using 
rev 1.1 models.
 
The IBIS Open Forum has created a version 2.1 of the "golden parser" that checks
model syntax for comformance to the specification.  It is currently being Beta 
tested.  When completed, the parser will be made freely available in object code
format
 
IBIS is a consistent software parsable format that semiconductor vendors can 
use to specify the analog characteristics of input and output buffers.  This 
essential information is readily transformed into accurate models by end users 
and simulation tool vendors.  The resulting behavioral models enable users to 
perform high-speed, accurate signal-integrity simulations of their digital 
system interconnects.
 
The IBIS Version 2.1 specification was developed through the cooperative efforts
of simulator vendors and semiconductor companies who together comprise the IBIS 
Open Forum (see the attached roster).
 
For More Information
 
For more information about the IBIS Open Forum, send an e-mail request to 
ibis-info@vhdl.org.  All of the documents and publicly available models are 
currently accessible via the public repository of VHDL International's 
Internet based machine (vhdl.org, 198.31.14.3, http://vhdl.org/).  WWW, 
Gopher, FTP and Telnet "Anonymous", and "guest" dial-in access, (415) 
335-0110, are all available.
 
 
IBIS Open Forum
Contact List (roster below)

 

begin 644 pr010995.txt
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M=&AR;W5G:&]U="!T:&4@9&5S:6=N(&QA>6]U="!P<F]C97-S+@T*#0I:965L
M86X@5&5C:&YO;&]G>2P@26YC+@T*("!#;VYT86-T.B`@2&ER;R!-;W)I>6%S
M=2P@1V5O<F=E($]P<V%H;`T*("!%;6%I;#H@("`@>F5E;&%N0&YE=&-O;2YC
M;VT-"B`@4&AO;F4Z("`@("@U,#,I(#4R,"TQ,#`P#0H@($%D9')E<W,Z("`Q
M,#4U,"!35R!!;&QE;B!";'9D+@T*("`@("`@("`@("`@0F5A=F5R=&]N+"!/
M4B`Y-S`P-0T*("!3=7!P;W)T.B`@6F5E;&%N(%1E8V@N('!R;W9I9&5S(&$@
M;6]D96QI;F<@<V5R=FEC92!T:&%T(&-H87)A8W1E<FEZ92!A;F0@#0H@("`@
M("`@("`@("!C<F5A=&5S(&UO9&5L<R!C;VYF;W)M:6YG('1O('1H92!)0DE3
M(&9O<FUA="X@(%IE96QA;B!496-H+B`-"B`@("`@("`@("`@($UA<W1E<DUO
M9&5L*%1-*2!M;V1E;',@87)E(&-R96%T960@9G)O;2!M96%S=7)E;65N=',@
M;V8@<&AY<VEC86P@#0H@("`@("`@("`@("!D979I8V5S('5S:6YG(&$@=&EG
M:'1L>2!C;VYT<F]L;&5D(&AI9V@M9G)E<75E;F-Y(&9I>'1U<F4@86YD(`T*
M("`@("`@("`@("`@;6]D96QI;F<@<WES=&5M+B`@5&AE<V4@;6]D96QS(&-L
M;W-E;'D@<F5P<F5S96YT(&%C='5A;"!D979I8V4@#0H@("`@("`@("`@("!B
M96AA=FEO=7(@=VAE;B!U<V5D(&EN('-I;75L871I;VXN#0H@(%1A9RUL:6YE
M.B`-"@T*6G5K96XM4F5D86,-"B`@0V]N=&%C=#H@($IO:&X@0F5R<FEE#0H@
M($5M86EL.B`@("!J;VAN8D!R961A8W0N8V\N=6L-"B`@4&AO;F4Z("`@("LT
M-"`V.#0@,CDT,38Q+"!&87@Z("LT-"`V.#0@,CDY-S4T#0H@($%D9')E<W,Z
M("!497=K97-B=7)Y#0H@("`@("`@("`@("!';&]U8V5S=&5R<VAI<F4@1TPR
M,"`X44PL#0H@("`@("`@("`@("!%;F=L86YD#0H@(%-U<'!O<G0Z("!7;W)K
M(&ES(&EN('!R;V=R97-S('1O(&5N86)L92!U<V4@;V8@24))4R!M;V1E;',@
M:6X@;F%T:79E(`T*("`@("`@("`@("`@9F]R;6%T(&9O<B!2961A8R!(:6=H
M+5!E<F9O<FUA;F-E($5N9VEN965R:6YG(&%N9"!%34,@061V:7-E<B`-"B`@
M("`@("`@("`@('!R;V1U8W1S+B`@26X@861D:71I;VXL(&EN=&5G<F%T:6]N
M('=I=&@@475A9"!$97-I9VX@86YD(%%U86YT:6,@#0H@("`@("`@("`@("!P
M<F]D=6-T<R!P<F]V:61E<R!T:&4@<W1A=&5D(&QE=F5L(&]F('-U<'!O<G0@
M<')O=FED960@8GD@=&AE<V4@#0H@("`@("`@("`@("!C;VUP86YI97,N#0H@
M(%1A9RUL:6YE.B!286-A;"U2961A8R!I<R!A('=O<FQD(&QE861E<B!I;B!D
M97-I9VX@875T;VUA=&EO;BP@<')O=FED:6YG(`T*("`@("`@("`@("`@;W!E
M;BP@;&5A9&EN9R!T96-H;F]L;V=Y+"!S=&%N9&%R9',M8F%S960@0T%$0T%-
4('-O;'5T:6]N<RX-"@T*#0H@#0IY
`
end


From bob@icx.com  Mon Jan  9 14:53:17 1995
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Date: Mon, 9 Jan 95 14:49 PST
From: bob@icx.com ( Bob Ross)
To: ibis@vhdl.org, mbs@eos.ncsu.edu
Subject: IBIS model submission process

Michael:

Regarding #1. of the submission procedure, I believe certain warning messages
are acceptable if they are understood.  Certain tables may contain
non-monotonic data, for example.  Therefore, the existance of a Warning
message should not disqualify a model from being posted.

Bob Ross,
Interconnectix, Inc.

From huq@rockie.nsc.com  Mon Jan  9 15:29:01 1995
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Date: Mon, 9 Jan 95 15:27:29 PST
From: huq@rockie.nsc.com (Syed Huq)
Message-Id: <9501092327.AA13722@rockie.nsc.com>
To: ibis@vhdl.org, mbs@eos.ncsu.edu
Subject: Re: IBIS model submission procedure (revised)

Mike,

Got a question on 'c' below. 


  c.  All files should be in a single file before emailing to the IBIS
          librarian. Use one of the following four methods:


All files should be in a single file....Can you clarify this. Does this
mean the 'README.TXT' and the 'modelfile.ibs' in one file.


Regards,
Syed.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Syed B. Huq 
Applications Engineer/Data Transmission Products
National Semiconductor 
Tel:(408)721-4874; Fax:(408)721-4785
Internet:huq@rockie.nsc.com
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

From Will_Hobbs@ccm2.jf.intel.com  Wed Jan 11 17:24:25 1995
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From: Will Hobbs <Will_Hobbs@ccm2.jf.intel.com>
Message-Id: <950111171940_5@ccm.jf.intel.com>
To: ibis@vhdl.org
Subject: Next Meeting details


Text item: Text_1

The next IBIS Open Forum teleconference will be on Friday, 1/27.

Date:   1/27/95
Time:   8:00 to 10:00 Pacific Standard Time (1600 - 1800 UTC, I believe)
Phone number:  (916) 356-9999
Res#:   440080

We will send out the minutes of last Friday's meeting and the agenda of the 
next meeting shortly.

Will



From lfs@Synopsys.COM  Thu Jan 12 11:40:57 1995
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To: huangchi@idtinc.com, westbrook@mms.com, blakkan@mms.com, marnow@mms.com,
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        graham@cfi.org, Will_Hobbs@ccm2.jf.intel.com, subbu@india.ti.com,
        mano@india.ti.com, vijay@india.ti.com, geoff@cadence.com,
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        marc@ichips.intel.com, pkukkal@ichips.intel.com,
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        julianm@lmc.com, christop@vnet.ibm.com, dave@icx.com, peter@icx.com,
        wasco@icx.com, bob@icx.com, mick@hpfcla.fc.hp.com,
        marc.laurent@matramhs.fr, apte@omnivw.com, kahn@cs.man.ac.uk,
        mick@neptune.fc.hp.com, rstrong@lmc.com,
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        PULKA@boss.iele.polsl.gliwice.pl, Adam.Morawiec@imag.fr
From: lfs@Synopsys.COM (Larry Saunders)
Subject: DIET Format: Changing of the guard
Cc: bekroot@Synopsys.COM, billl@Synopsys.COM, plippe@Synopsys.COM
X-Mailer: <Windows Eudora Version 2.0.2>

My contract with Synopsys to define the DIET Format has come to an end. Bryn
Ekroot (bekroot@synopsys.com) will be taking responsibility for the work. If
you have any comments or questions about the future of the DIET Format you
may contact him.

Although I can't make any additional changes to the DIET Format, I will
still attempt to answer any questions regarding technical content. Please
contact me at lfs@mcimail.com or lfs@seva.com as my Synopsys email address
will shortly be history. 

If you haven't already done so, don't forget to get your copy of the latest
version of the DIET Format. It is available from the VHDL.ORG Internet
machine in the /pub/diet/latest directory. Check the announcement I sent out
on December 23rd for instructions on how to access the machine.

I have enjoyed creating the DIET Format and hope you find it useful.  


Larry Saunders
lfs@synopsys.com     or    lfs@mcimail.com     or   lfs@seva.com
415-694-1837               408-263-0790             510-249-9085
415-694-4009 (fax)         408-263-0790 (fax)       510-249-9082 (fax)
Synopsys, LMG    Bldg B                             SEVA Technologies
700 East Middlefield Rd    1775 Milmont Dr, #C106   200 Brown Rd, #103
Mountain View, CA  94043   Milpitas, CA  95035      Fremont, CA  94539
                                        


From Derrick_Duehren@ccm2.jf.intel.com  Thu Jan 12 15:42:49 1995
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Date: Thu, 12 Jan 95 15:38:03 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950112153803_1@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS article to appear in EDN 3/16/95


Text item: Text_1

 
 IBISians,
 
 The IBIS Overview article is scheduled to appear in the 3/16/95 issue of EDN 
 magazine.  I am in contact with the editor to ensure he has the 2.1 press 
 release as well.  :-)
 
 Derrick Duehren
 ------------------------------------------------------------------------------
 XTG TPV Programs Manager, Intel Corp. |  
 Phone (503) 696-4299                  |  "Experience is not what happens to 
 Fax   (503) 696-4904                  |   you; it's what you do with what
 Derrick_Duehren@ccm.jf.intel.com      |   happens to you."
 5200 NE Elam Young Pkwy. JF1-97       |                     - Aldous Huxley
 Hillsboro, OR 97224                   |
 ------------------------------------------------------------------------------


From Derrick_Duehren@ccm2.jf.intel.com  Fri Jan 13 10:40:26 1995
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Date: Fri, 13 Jan 95 10:35:07 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950113103507_2@ccm.hf.intel.com>
To: Randy_L_Wilhelm@ccm.fm.intel.com, Jerry_Budelman@ccm2.jf.intel.com,
        bWard@neosoft.com, IBIS@vhdl.org
Subject: IBIS Open Forum 1/6/95 Meeting Minutes


Text item: Text_1


Date:    Jan 13, 1995

From:    Will Hobbs (503) 696-4369, fax (503) 696-4210
         Will_Hobbs@ccm2.jf.intel.com
         XTG Modeling Manager, Intel Corp., Chairperson, IBIS Open Forum
         Intel Corporation
         5200 NE Elam Young Pkwy, Hillsboro, Oregon 97124 USA
         and
         Derrick Duehren (503) 696-4299, fax (503) 696-4904
         Derrick_Duehren@ccm.jf.intel.com
         Intel Program Manager

Subject: Minutes from IBIS Open Forum Meeting 1/6/95

To:
ARPA                          Randy Harr*
AT&T Global Info Systems      Dave Moxley
Anacad                        Steffen Rochel
Ansoft                        Henri Maramis
Atmel Corporation             Dan Terry
Cadence Design                Sandeep Khanna, C. Kumar*
Cadlab                        Ralf Bruning
Contec                        Dileep Divkar
Digital Equipment Corp.       Barry Katz
EIA                           Patty Rusher
High Design Technology        Michael Smith, Dr. Ing. Cosso
HP Palo Alto                  Tom Langdorf* 
HyperLynx                     Kellee Crisafulli*
IBM                           Jay Diepenbrock, Joseph Flanigan
IBM-Motorola alliance         Lynn Warriner*, John Burnett
INCASES                       Werner Rissiek, Olaf Rethmeier*
Integrated Silicon Systems    Eric Bracken
Intel Corporation             Stephen Peters*, Don Telian, Will Hobbs*
                              Arpad Muranyi*, Derrick Duehren*
Interconnectix, Inc.          Bob Ross*
Intergraph                    Ian Dodd, David Wiens, Walter Katz
IntuSoft                      Charles Hymowitz
Mentor Graphics               Ravender Goyal, Greg Doyle
Meta-Software                 Mei Wong, You-Pang Wei, John Sliney
MicroSim                      Arthur Wong
National Semiconductor        Syed Huq*
NEC                           Hiroshi Matsumoto
North Carolina State U.       Steve Lipa, Michael Steer
OptEM Engineering, Inc.       Benny Leveille, Ken Ehn
PC Ware                       Paul Munsey, Ron Neville*
Quad Design                   Jon Powell*
Quantic Labs                  Mike Ventham*
Racal-Redac                   John Berrie
Stree Co.                     Mon Seng(sp?)
Symmetry                      Martin Walker
Synopsys, Logic Modeling G.   Bill Lattin
Texas Instruments             Bob Ward*
Thomson-CSF/SCTF              Jean Lebrun
UniCAD Canada Ltd.            Stephen Lum
Zeelan Technology             George Opsahl, Hiro Moriyasu

CC:
Intel Corporation             Randy Wilhelm, Jerry Budelman,
                              Intel IBIS team

In the list above, attendees at the meeting are indicated by *.

Upcoming Meetings: The room and bridge numbers for future IBIS teleconferences 
are listed below:
     Date       Bridge Number    Reservation #
     TBD        (916) 356-9999   TBD 

All meetings are 8:00 AM to 10:00 AM PDT (16:00 to 18:00 UTC).  We try to have 
agendas out 7 days before each open forum and meeting minutes out within 7 days 
after.  When you call into the meeting, ask for the IBIS Open Forum hosted by 
Will Hobbs and give the reservation number.

NOTE: "AR" = Action Required.

------------------------------------------------------------------------------


Check-in, Intros, Announcements
New participant: Tom langdorf at Hewlett Packard at Palo Alto memory 
procurement.  He is converting the IBIS spec to an HP internal format.

The following correction was made to the 12/9/94 meeting minutes: 
Bob Ross pointed out that Paul Munsey attended the 12/9/94 meeting.

Will commented that IBIS is now being used as a means for system design groups 
to communicate buffer design needs to I/O buffer design engineers, establishing 
a 2-way conduit of information flow to converge on workable designs at both 
ends.

Will reported that there are now 10 paid subscribers to the 2.1 Golden Parser.

New Agenda Items: 
Status of new updates to the Golden Parser.

Press Updates: 
Derrick started the draft press release before the Christmas holidays and has 
updated the roster document for attachment.  Will submitted Derrick's draft to 
Intel's MarCom with no response.  Kellee volunteered to release the Press 
Release, but suggested that someone with a stronger relationship with some 
industry editors do it.  Kumar will check with Cadence's marketing group and 
respond to Will.  [update: Intel MarCom is involved, Cadence MarCom has offered 
to help]

AR Will/Derrick: Post press release to the reflector. [DONE]

AR Derrick: Check on EDN IBIS article status.  [DONE, It is scheduled to appear 
in the 3/16/95 issue of EDN magazine.  Derrick is also in contact with the 
editor to ensure he has the 2.1 press release as well.]


Progress toward enlisting new IC vendors
Derrick reported that Zeelan is planning to post a text message to vhdl.org 
advertising their IBIS model library.  Lynn Warriner reported that he is ready 
to post PowerPC IBIS models and asked about non-ftp methods of posting them.  
Derrick referred him to Mike Steer's instructions posted yesterday.  Mike 
Venthum asked if VLSI Technology is participating - No.  He will contact them to
see if they will get involved, and post their ASIC IBIS models.


Golden Parser 2.1 progress and release date
Ron reported that the original 2.0 work is done and he will distribute a disk on
Monday.  There are 4 minor changes to be done.  Ron and Paul will provide an 
estimate to Will, approval of the work will be done via the reflector. {Update: 
The disk has been distributed.]

AR Ron/Paul:  Post an estimate of the work to be done to the reflector.


Who are the simulator vendors that can support v2.1 and when will this support 
be available? - S. Huq
Kellee thinks support will gradually trickle out in the coming months.  Several 
EDA vendors shared their roll-out plans off record.

Two models from Intel (under NDA) are the only two test models available.  
Simulator vendors can contact Syed Huq (huq@rockie.nsc.com) for National's 2.1 
models that are being verified now.


Compliance
Will pointed out that the V/T table can be used to as a type of compliance 
test/sanity check.  Kumar would like to see a DC check as well.

AR Kumar: Post an EGG for DC checking.


Status of EIA affiliation
Will reported that he attempted to get Patty Rusher of the EIG (Electronic 
Information Group of the EIA) to join us today.  Randy Harr said from his 
experience, we need to send the spec, a description of our balloting method, 
list of who voted on the final spec, and a transfer of copyright to the EIA.  
They mail the ballot document and the document out, for 60 day ballot time.

Once affiliated, we can make the spec available on-line as well as printed.  
There can be a fee for the printed copy to cover production and  EIA to 
distribution costs.  As an example, EIA 567 will be freely available on-line.

The balloting process costs about $1,000 per ballot.  If changes are needed 
after the first ballot, it'll cost anther $1,000.

Kellee suggests allowing open, free participation, but limiting votes to paid 
members.  Paid members can have the parser code as a benefit.  1 vote per 
company (EIA rule).  Kellee would like to distribute the spec with the models 
they distribute.

AR Derrick/Will: Post draft operating procedure, copyright ownership, membership
costs, benefits, and structure.

FYI, Ron Werner of Motorola heads the Design Automation Division of EIA.


Rev 2.1 Fallout
The following items need to be updated to support/reflect the updated spec.  
Will has no bandwidth to work on these.  Kellee suggested that if any of the EDA
vendors are writing manuals that include an appendix on how to create IBIS 
models, they could offer it to the forum (silence).  
  o Overview.  Will suggests that someone could write an article on 2.1, retain 
the copyright, and provide chunks for updating the Overview.
  o Cookbook
  o S2IBIS 2.1.  Kumar reported that Cadence is working with and funding NCSU to
update the utility.  The updated conversion utility should be available in about
three months.  Kumar said anyone can work with them on it.  Cadence is providing
some funding because it serves their interests.


IBIS General Session/Summit (face-to-face)
Derrick had 14.5 responses, he rated the responses for dates and places, and 
found 2/6 and Santa Clara were best. 

  Location: Santa Clara (Intel Robert Noyce Building, 
                        5-story building at 2200 Mission College Blvd.
                        Visitor parking is to the right of the main entrance.)

            Intel-recommended hotels:
              The Westin Hotel
              Santa Clara Marriott
              Biltmore Hotel & Suites
              Residence Inn by Marriott
              Sunnyvale Hilton

  Date:     2/6/95

  Time:     9:30 am - 5:00 pm  (If you come early, you can tour the Intel 
                               museum on your own.  Allow about 30 min.
                               Enter the museum from the main lobby.)

  Focus:    What people are doing with IBIS, technically as well as 
            politically, brainstorming, future direction (3.0 possibilities), 
            and relationship building.

            Kumar suggested discussing series termination.
            Stephen wants to discuss alternative packaging representations.
            Will and Jon suggested diode storage effects.

AR All -- Send agenda items and requests for time to Derrick and Will 
          by 1/27/95.

AR All -- Send a request to Derrick with your fax number if you want a map.


Wrap-up, Next Meeting Plans
Our next meeting is 1/27/95.  

AR Will -- Ask Patty Rusher to attend the meeting.  Also ask Intel's 
Architecture Design Lab personnel to discuss their interest in diode storage 
effects.


==============================================================================
                                      NOTES
If you know of someone new who wants to join the e-mail reflector 
(ibis@vhdl.org), send e-mail to ibis-request@vhdl.org.

Check the pub/ibis directory on vhdl.org for more information on previous 
discussions and results.  You can get on via ftp anonymous, "guest" login from 
telnet or dial-in (415-335-0110), or send an email request to the automatic 
archive server, archive@vhdl.org.
==============================================================================




From Derrick_Duehren@ccm2.jf.intel.com  Fri Jan 13 12:50:52 1995
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From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950113124606_3@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS 1/27/95 Meeting Agenda (1 hour only)


Text item: Text_1

 
                       IBIS Open Forum Meeting Agenda 
                                for 1/27/95
 
                           Bridge:          Res:
                           (916) 356-9999   440080
 
 All meetings are 8:00 AM to 10:00 AM PST (16:00 to 18:00 UTC).  When you call 
 into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give 
 the reservation number.
 
 ****************************************************************************
 NOTE: This meeting is only one hour (8:00 AM - 9:00 AM).  Most discussions
       will be deferred to the 2/6/95 summit meeting in Santa Clara, CA.
 ****************************************************************************
 
  8:00 Check-in, Intros, Announcements                         Hobbs
       - Intros of new IBIS participants              
       - Review of previous meeting's minutes (and ARs)
       - Miscellany/announcements/treasurer's report  
       - Opens for new issues                         
 
  8:10 Golden Parser 2.1 status                                Munsey
 
  8:15 EIA affiliation                                         Hobbs
       Patty Rusher to join us.
 
  8:45 2/6/95 IBIS General Session/Summit (face-to-face)       Hobbs
       Finalize the agenda
 
  8:55 Wrap-up, next meeting plans                             Hobbs
 
 

From Arpad_Muranyi@ccm.fm.intel.com  Mon Jan 16 08:37:05 1995
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To: ibis@vhdl.org
Subject: Re: IBIS Open Forum 1/6/95 Meeting Minutes


Text item: Text_1

Hello IBIS gurus,

In the last minutes Kumar suggested DC checking (see quote below).  I am not 
sure what he means, but just as we can use V-T tables for AC checking, couldn't 
the I-V curves be used for DC checking?

Arpad
Intel Corporation


> Compliance
> Will pointed out that the V/T table can be used to as a type of compliance
> test/sanity check.  Kumar would like to see a DC check as well.

> AR Kumar: Post an EGG for DC checking.


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To: Arpad_Muranyi@ccm.fm.intel.com, ibis@vhdl.org
Subject: Re[2]: IBIS Open Forum 1/6/95 Meeting Minutes


Text item: Text_1

Arpad,

This was suggested at the meeting.  Since we felt Kumar may have meant something
else that we didn't grasp when he said it, we asked him to generate an EGG to 
clarify it and generate discussion.

Will
Intel Corp.

Hello IBIS gurus,

In the last minutes Kumar suggested DC checking (see quote below).  I am not 
sure what he means, but just as we can use V-T tables for AC checking, couldn't 
the I-V curves be used for DC checking?

Arpad
Intel Corporation


> Compliance
> Will pointed out that the V/T table can be used to as a type of compliance 
> test/sanity check.  Kumar would like to see a DC check as well.

> AR Kumar: Post an EGG for DC checking.

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From cpk@Cadence.COM  Tue Jan 17 06:42:32 1995
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From: cpk@cadence.com (C. Kumar)
Message-Id: <9501171437.AA14707@hot>
To: ibis@vhdl.org, si-list@silab.Eng.Sun.COM
Subject: Re: open source and open drain


This is reply to a question I asked of Stephen Peters of Intel. Like
Stephen suggested it may
be of general interest.

Hello Kumar:

     Good question.  Open drain/collector buss do have some advantages:

     1.  In the old days before 1ns edge rates they allowed one to
         do logic functions (wire-or or wire-and) without the 
         delay of an actual logic gate.

     2.  They allow multi-party operation and bus contention on signals.

     2.  In a dense ASIC they save I/O buffer size because now there
         is no pullup device.  This also saves on suppling VCC power to
         the I/0 ring.

     3.  If the pullup resister is selected to match the network impedence
         you can terminate the net quite nicly (This is why designing with
         ECL is so nice -- you have to work NOT to have a terminated net).
         Adjusting VTT allows for 
         reduced signal swing (with a pullup device you go from gnd to VCC).
         Of course, the shape of the rising edge is now controlled by
         by the network characteristics and not an active pullup xsistor
         on the output.


There are probably other advantages as well.  This might be a good question
for the IBIS reflector (or the SI reflector -- I assume you are on that?)

                Stephen



Stephen:

I have a general question for you regarding open drain or any open devices.

Under what circumstances you use such devices and what are their advantages?



----- End Included Message -----


From cpk@Cadence.COM  Tue Jan 17 07:00:29 1995
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From: cpk@cadence.com (C. Kumar)
Message-Id: <9501171455.AA14781@hot>
To: ibis@vhdl.org, Arpad_Muranyi@ccm.fm.intel.com
Subject: Re: IBIS Open Forum 1/6/95 Meeting Minutes

The problem with I-V checking is that there is no  "standard" load as 
with V-T curves. We already went through this i-v standard load  discussion 
and dropped it because
of controvorsey. The reason I raised it because that I think that in 
signal integrity situations the dc I-V characteristic has more has a dominant 
effect on the resulting waveforms and we have no reference to check against.

> 
> 
> Text item: Text_1
> 
> Hello IBIS gurus,
> 
> In the last minutes Kumar suggested DC checking (see quote below).  I am not 
> sure what he means, but just as we can use V-T tables for AC checking, couldn't 
> the I-V curves be used for DC checking?
> 
> Arpad
> Intel Corporation
> 
> 
> > Compliance
> > Will pointed out that the V/T table can be used to as a type of compliance
> > test/sanity check.  Kumar would like to see a DC check as well.
> 
> > AR Kumar: Post an EGG for DC checking.
> 
> 
> Text item: External Message Header
> 
> The following mail header is for administrative use
> and may be ignored unless there are problems.
> 
> ***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.
> 
> Subject: IBIS Open Forum 1/6/95 Meeting Minutes
> To: Randy_L_Wilhelm@ccm.fm.intel.com, Jerry_Budelman@ccm2.jf.intel.com,
>         bWard@neosoft.com, IBIS@vhdl.org
> Message-Id: <950113103507_2@ccm.hf.intel.com>
> From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
> Date: Fri, 13 Jan 95 10:35:07 PST
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From cer@Cadence.COM  Tue Jan 17 08:40:33 1995
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From: cer@cadence.com (Chrisopher E. Reid)
Message-Id: <9501171635.AA02016@oahu>
To: ibis@vhdl.org
Subject: Temperature interpolation for T-V curves?

Fellow Ibisians,

It is not clear from the Ibis 2.1 spec whether or not the
T-V curves (Rising Waveform and Falling Waveform) are supposed
to be temperature interpolated in the same manner as the V-I
curves or not.

I am assuming temperature-interpolation for T-V curves is
intended. If so the Ibis 2.1 comments should be appended
to this effect.

Chris

From Arpad_Muranyi@ccm.fm.intel.com  Tue Jan 17 10:48:02 1995
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To: ibis@vhdl.org, cpk@Cadence.COM
Subject: Re[2]: IBIS Open Forum 1/6/95 Meeting Minutes


Text item: 

Kumar,

I am still not sure what you mean by "standard load".  When you do a voltage 
sweep on a device, you are forcing the voltage while you are measuring the 
current.  When yo do this sweep, you are actually "loading" the device with the 
voltage source.  You can look at that voltage source as an ideal, 0 Ohm source 
or as a Thevenin combination of an ideal source with a series resistor.  Either 
way, you are sweeping between a certain voltage range at the output of the 
device to get an I-V curve, regardless of what R is in your Thevenin circuit.  
Your I-V curve will be the same whether R in the Thevenin circuit is small or 
large.  You will just have to increase the sweep range of the voltage source 
inside the Thevenin circuit for larger R values to get the same sweep range at 
the pin of the device.

What is the probelem?  Am I missing something obvious?

Arpad

------------------------------------------------------------------------------

The problem with I-V checking is that there is no  "standard" load as
with V-T curves. We already went through this i-v standard load  discussion
and dropped it because
of controvorsey. The reason I raised it because that I think that in
signal integrity situations the dc I-V characteristic has more has a dominant
effect on the resulting waveforms and we have no reference to check against.

>
> Hello IBIS gurus,
>
> In the last minutes Kumar suggested DC checking (see quote below).  I am not
> sure what he means, but just as we can use V-T tables for AC checking,
couldn't
> the I-V curves be used for DC checking?
>
> Arpad
> Intel Corporation
>
>
> > Compliance
> > Will pointed out that the V/T table can be used to as a type of compliance
> > test/sanity check.  Kumar would like to see a DC check as well.
>
> > AR Kumar: Post an EGG for DC checking.
>
>
> Text item: External Message Header
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>
> ***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.
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>         bWard@neosoft.com, IBIS@vhdl.org
> Message-Id: <950113103507_2@ccm.hf.intel.com>
> From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
> Date: Fri, 13 Jan 95 10:35:07 PST
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From cpk@Cadence.COM  Tue Jan 17 11:09:12 1995
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From: cpk@cadence.com (C. Kumar)
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To: ibis@vhdl.org, Arpad_Muranyi@ccm.fm.intel.com
Subject: Re: Re[2]: IBIS Open Forum 1/6/95 Meeting Minutes


By standard load, I waa trying to indicate the following.

The ac v-t specifications include loads under whcih the measurements were taken.
So if the siumulations reproduce the v-t behavior at those load conditions then
they are self verifying and are pracically meaningful.

For a practically meaningful v-i verification, we have to drive a reference load with the
device and then compare the resulting v-t with some reference waveform. What is a useful refernce load. Is it daisy chain transmission line with ten loads? Or is it a simple capacitor? In the past we have been unable to come to agreement on identifying both the reference load and waveforms.  

This is what I meant by refernce loads for v-i verification. 
> 
> Kumar,
> 
> I am still not sure what you mean by "standard load".  When you do a voltage 
> sweep on a device, you are forcing the voltage while you are measuring the 
> current.  When yo do this sweep, you are actually "loading" the device with the 
> voltage source.  You can look at that voltage source as an ideal, 0 Ohm source 
> or as a Thevenin combination of an ideal source with a series resistor.  Either 
> way, you are sweeping between a certain voltage range at the output of the 
> device to get an I-V curve, regardless of what R is in your Thevenin circuit.  
> Your I-V curve will be the same whether R in the Thevenin circuit is small or 
> large.  You will just have to increase the sweep range of the voltage source 
> inside the Thevenin circuit for larger R values to get the same sweep range at 
> the pin of the device.
> 
> What is the probelem?  Am I missing something obvious?
> 
> Arpad
> 
> ------------------------------------------------------------------------------
> 
> The problem with I-V checking is that there is no  "standard" load as
> with V-T curves. We already went through this i-v standard load  discussion
> and dropped it because
> of controvorsey. The reason I raised it because that I think that in
> signal integrity situations the dc I-V characteristic has more has a dominant
> effect on the resulting waveforms and we have no reference to check against.
> 
> >
> > Hello IBIS gurus,
> >
> > In the last minutes Kumar suggested DC checking (see quote below).  I am not
> > sure what he means, but just as we can use V-T tables for AC checking,
> couldn't
> > the I-V curves be used for DC checking?
> >
> > Arpad
> > Intel Corporation
> >
> >
> > > Compliance
> > > Will pointed out that the V/T table can be used to as a type of compliance
> > > test/sanity check.  Kumar would like to see a DC check as well.
> >
> > > AR Kumar: Post an EGG for DC checking.
> >
> >
> > Text item: External Message Header
> >
> > The following mail header is for administrative use
> > and may be ignored unless there are problems.
> >
> > ***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.
> >
> > Subject: IBIS Open Forum 1/6/95 Meeting Minutes
> > To: Randy_L_Wilhelm@ccm.fm.intel.com, Jerry_Budelman@ccm2.jf.intel.com,
> >         bWard@neosoft.com, IBIS@vhdl.org
> > Message-Id: <950113103507_2@ccm.hf.intel.com>
> > From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
> > Date: Fri, 13 Jan 95 10:35:07 PST
> > Received: by ccm.hf.intel.com (ccmgate 3.0) Fri, 13 Jan 95 10:35:07 PST
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> >
> 
> Text item: External Message Header
> 
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> and may be ignored unless there are problems.
> 
> ***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.
> 
> Subject: Re: IBIS Open Forum 1/6/95 Meeting Minutes
> To: ibis@vhdl.org, Arpad_Muranyi@ccm.fm.intel.com
> Message-Id: <9501171455.AA14781@hot>
> From: cpk@cadence.com (C. Kumar)
> Date: Tue, 17 Jan 95 09:55:15 -0500
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> 

From mjohnson@netcom.com  Tue Jan 17 13:38:22 1995
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Date: Tue, 17 Jan 1995 13:32:46 -0800
From: mjohnson@netcom.com (Mark Johnson)
Message-Id: <199501172132.NAA23646@netcom8.netcom.com>
To: ibis@vhdl.org, si-list@silab.Eng.Sun.COM
Subject:  open source and open drain

 cpk@cadence.com (C. Kumar) writes:

   >I have a general question for you regarding open drain or
   >any open devices.  Under what circumstances you use such
   >devices and what are their advantages?


Not an explanation, but a datapoint:
    There's a way of connecting DRAMs together called "RAMBUS"
    that runs at 500 megabytes per second (500MHz , 8 wires)
    I/O bandwidth in garden variety, DRAM-grade CMOS.  They're
    showing off working systems at trade shows and so forth.
    *Part* of their "secret sauce" is the fact that they use
    open-drain pad drivers.  More can be learned by looking
    at the most recent 2 years' digests of the International
    Solid State Circuits Conference (ISSCC).  Reading through
    the material, one gets the impression they give more or
    less equal emphasis to (1) driving the bus; (2) receiving
    the bus; (3) distributing and regenerating the clock.

--mj

From bob@icx.com  Tue Jan 17 14:24:10 1995
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Date: Tue, 17 Jan 95 13:15 PST
From: bob@icx.com ( Bob Ross)
To: cer@cadence.com, ibis@vhdl.org
Subject: Re:  Temperature interpolation for T-V curves?

Chris and IBIS Committee:

You are right, I can find no reference describing under what conditions
the T-V data is taken.  However, a reasonable assumption is that it should
be taken under exactly the same conditions as the [Ramp] data (which also
are the same conditions for the V-I tables).  This allows total consistency
of V-I data, T-V data and [Ramp] data for the min and max columns.  This
is the most reasonable assumption for processing IBIS data and for automatically
generating IBIS models.

This relates also to an issue I discussed with Stephen Peters regarding whether
C_comp min and max values also should be aligned to the Voltage/Temperature
conditions.  This issue has additional complications if the data is not
available from Spice models or measurement.  

I think it is reasonable to make such a correction to IBIS.  Perhaps a Version 2.2
release for minor typos and some completeness-clarification remarks is in order.

Bob Ross
Interconnectix, Inc.

> Fellow Ibisians,

> It is not clear from the Ibis 2.1 spec whether or not the
> T-V curves (Rising Waveform and Falling Waveform) are supposed
> to be temperature interpolated in the same manner as the V-I
> curves or not.

> I am assuming temperature-interpolation for T-V curves is
> intended. If so the Ibis 2.1 comments should be appended
> to this effect.

> Chris



From jonp@qdt.com  Tue Jan 17 14:49:55 1995
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To: ibis@vhdl.org
Subject: [uunet!cadence.com!cpk: Re: Re[2]: IBIS Open Forum 1/6/95 Meeting Minutes]


The VI curves are a DC measurement and so only a DC load would be a usefull
comparison point. That means a Thevinin Equivalent R and V. Capacitor charge time
or Transmission line behavior are extractable from this data but are not part of the
IV curve. Of course, given an IV curve and DC load conditions, the correct answer is 
calculable by hand and not very interesting.

a better question is "is calculable a word?"

jonp





Return-Path: <uunet!Cadence.COM!cpk>
Date: Tue, 17 Jan 95 14:04:03 -0500
From: uunet!cadence.com!cpk (C. Kumar)
To: uunet!vhdl.org!ibis, uunet!ccm.fm.intel.com!Arpad_Muranyi
Subject: Re: Re[2]: IBIS Open Forum 1/6/95 Meeting Minutes


By standard load, I waa trying to indicate the following.

The ac v-t specifications include loads under whcih the measurements were taken.
So if the siumulations reproduce the v-t behavior at those load conditions then
they are self verifying and are pracically meaningful.

For a practically meaningful v-i verification, we have to drive a reference load with the
device and then compare the resulting v-t with some reference waveform. What is a useful refernce load. Is it daisy chain transmission line with ten loads? Or is it a simple capacitor? In the past we have been unable to come to agreement on identifying both the reference load and waveforms.  

This is what I meant by refernce loads for v-i verification. 
> 
> Kumar,
> 
> I am still not sure what you mean by "standard load".  When you do a voltage 
> sweep on a device, you are forcing the voltage while you are measuring the 
> current.  When yo do this sweep, you are actually "loading" the device with the 
> voltage source.  You can look at that voltage source as an ideal, 0 Ohm source 
> or as a Thevenin combination of an ideal source with a series resistor.  Either 
> way, you are sweeping between a certain voltage range at the output of the 
> device to get an I-V curve, regardless of what R is in your Thevenin circuit.  
> Your I-V curve will be the same whether R in the Thevenin circuit is small or 
> large.  You will just have to increase the sweep range of the voltage source 
> inside the Thevenin circuit for larger R values to get the same sweep range at 
> the pin of the device.
> 
> What is the probelem?  Am I missing something obvious?
> 
> Arpad
> 
> ------------------------------------------------------------------------------
> 
> The problem with I-V checking is that there is no  "standard" load as
> with V-T curves. We already went through this i-v standard load  discussion
> and dropped it because
> of controvorsey. The reason I raised it because that I think that in
> signal integrity situations the dc I-V characteristic has more has a dominant
> effect on the resulting waveforms and we have no reference to check against.
> 
> >
> > Hello IBIS gurus,
> >
> > In the last minutes Kumar suggested DC checking (see quote below).  I am not
> > sure what he means, but just as we can use V-T tables for AC checking,
> couldn't
> > the I-V curves be used for DC checking?
> >
> > Arpad
> > Intel Corporation
> >
> >
> > > Compliance
> > > Will pointed out that the V/T table can be used to as a type of compliance
> > > test/sanity check.  Kumar would like to see a DC check as well.
> >
> > > AR Kumar: Post an EGG for DC checking.
> >
> >
> > Text item: External Message Header
> >
> > The following mail header is for administrative use
> > and may be ignored unless there are problems.
> >
> > ***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.
> >
> > Subject: IBIS Open Forum 1/6/95 Meeting Minutes
> > To: Randy_L_Wilhelm@ccm.fm.intel.com, Jerry_Budelman@ccm2.jf.intel.com,
> >         bWard@neosoft.com, IBIS@vhdl.org
> > Message-Id: <950113103507_2@ccm.hf.intel.com>
> > From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
> > Date: Fri, 13 Jan 95 10:35:07 PST
> > Received: by ccm.hf.intel.com (ccmgate 3.0) Fri, 13 Jan 95 10:35:07 PST
> > Received: from ccm.hf.intel.com by relay.jf.intel.com
> > 	(Smail3.1.28.1 #2) id m0rSqq5-000twhC; Fri, 13 Jan 95 10:35 PST
> > Received: from relay.jf.intel.com by ormail.intel.com with smtp
> > 	(Smail3.1.28.1 #7) id m0rSqq7-000Ug3C; Fri, 13 Jan 95 10:35 PST
> > Received: from ormail.intel.com by vhdl.vhdl.org (4.1/SMI-4.1/BARRNet)
> > 	id AA09335; Fri, 13 Jan 95 10:40:26 PST
> > Received: from vhdl.vhdl.org by hermes.intel.com (5.65/10.0i); Fri,
> 13 Jan 95 10
> > Received: from hermes.intel.com by relay.jf.intel.com with smtp
> > 	(Smail3.1.28.1 #2) id m0rSrDN-000twfC; Fri, 13 Jan 95 10:59 PST
> >
> 
> Text item: External Message Header
> 
> The following mail header is for administrative use
> and may be ignored unless there are problems.
> 
> ***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.
> 
> Subject: Re: IBIS Open Forum 1/6/95 Meeting Minutes
> To: ibis@vhdl.org, Arpad_Muranyi@ccm.fm.intel.com
> Message-Id: <9501171455.AA14781@hot>
> From: cpk@cadence.com (C. Kumar)
> Date: Tue, 17 Jan 95 09:55:15 -0500
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> 


From schumach@flare.convex.com  Tue Jan 17 15:26:31 1995
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Date: Tue, 17 Jan 1995 17:21:44 -0600
From: schumach@flare.convex.com (Richard A. Schumacher)
Message-Id: <199501172321.RAA10279@flare.convex.com>
To: ibis@vhdl.org
Subject: A suggestion on style

Could people perhaps not quote entire threads when replying?
A little context is often useful, but that should usually not
require copying everything that went before. 

Regards,
Richard Schumacher

From jonp@qdt.com  Tue Jan 17 16:20:47 1995
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Subject: [uunet!flare.convex.com!schumach: A suggestion on style]

I couldn't agree more.

jonp

***********************************************************

Return-Path: <uunet!flare.convex.com!schumach>
Date: Tue, 17 Jan 1995 17:21:44 -0600
From: uunet!flare.convex.com!schumach (Richard A. Schumacher)
To: uunet!vhdl.org!ibis
Subject: A suggestion on style

Could people perhaps not quote entire threads when replying?
A little context is often useful, but that should usually not
require copying everything that went before. 

Regards,
Richard Schumacher


From Will_Hobbs@ccm2.jf.intel.com  Tue Jan 17 16:29:40 1995
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From: Will Hobbs <Will_Hobbs@ccm2.jf.intel.com>
Message-Id: <950117162420_1@ccm.jf.intel.com>
To: bob@icx.com, cer@cadence.com, ibis@vhdl.org
Subject: Re[2]: Temperature interpolation for T-V curves?


Text item: 

Bob, Kumar,

It's Bird time.  Would someone like to generate it?

Will

Chris and IBIS Committee:

You are right, I can find no reference describing under what conditions 
the T-V data is taken.  However, a reasonable assumption is that it should 
be taken under exactly the same conditions as the [Ramp] data (which also
are the same conditions for the V-I tables).  This allows total consistency 
of V-I data, T-V data and [Ramp] data for the min and max columns.  This
is the most reasonable assumption for processing IBIS data and for automatically
generating IBIS models.

This relates also to an issue I discussed with Stephen Peters regarding whether 
C_comp min and max values also should be aligned to the Voltage/Temperature 
conditions.  This issue has additional complications if the data is not 
available from Spice models or measurement.

I think it is reasonable to make such a correction to IBIS.  Perhaps 
a Version 2.2
release for minor typos and some completeness-clarification remarks is in order.

Bob Ross
Interconnectix, Inc.

> Fellow Ibisians,

> It is not clear from the Ibis 2.1 spec whether or not the
> T-V curves (Rising Waveform and Falling Waveform) are supposed 
> to be temperature interpolated in the same manner as the V-I
> curves or not.

> I am assuming temperature-interpolation for T-V curves is 
> intended. If so the Ibis 2.1 comments should be appended 
> to this effect.

> Chris

Text item: External Message Header

The following mail header is for administrative use
and may be ignored unless there are problems.

***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.

Subject: Re:  Temperature interpolation for T-V curves?
To: cer@cadence.com, ibis@vhdl.org
From: bob@icx.com ( Bob Ross)
Date: Tue, 17 Jan 95 13:15 PST
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From Arpad_Muranyi@ccm.fm.intel.com  Tue Jan 17 16:32:00 1995
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From: Arpad Muranyi <Arpad_Muranyi@ccm.fm.intel.com>
Message-Id: <950117162601_6@ccm.fm.intel.com>
To: cpk@Cadence.COM, ibis@vhdl.org
Subject: Re[4]: IBIS Open Forum 1/6/95 Meeting Minutes


Text item: 

Kumar,

Now I am starting to understand your thought process.  However, I don't agree 
with your suggestion, quote: "For a practically meaningful v-i verification... 
...compare the resulting v-t with some reference waveform".

If you are trying to verify the I-V curve, don't use waveforms, because the 
waveforms are not directly effected by the I-V curve.  Waveforms are dependent 
on rise/fall times, transmission line models (lossy or lossless), T-line length,
load capacitances, etc...  None of which have much to do with DC.  The only 
thing you can do to verify an I-V curve is to look at the ledge voltage (if you 
have a distinct one) of a waveform.  However, you can get the same ledge voltage
with a pure resistor as the load (if its value represents your loading 
impedance).  Once you are at this point, you might as well just match the I-V 
curve to a known Referece I-V curve, and be done.

Arpad

------------------------------------------------------------------------------

By standard load, I waa trying to indicate the following.

The ac v-t specifications include loads under whcih the measurements
were taken.
So if the siumulations reproduce the v-t behavior at those load conditions
then
they are self verifying and are pracically meaningful.

For a practically meaningful v-i verification, we have to drive a
reference load with the
device and then compare the resulting v-t with some reference waveform.
What is a useful refernce load. Is it daisy chain transmission line
with ten loads? Or is it a simple capacitor? In the past we have been
unable to come to agreement on identifying both the reference load
and waveforms.

This is what I meant by refernce loads for v-i verification.
>
> Kumar,
>
> I am still not sure what you mean by "standard load".  When you
do a voltage
> sweep on a device, you are forcing the voltage while you are measuring the
> current.  When yo do this sweep, you are actually "loading" the
device with the
> voltage source.  You can look at that voltage source as an ideal,
0 Ohm source
> or as a Thevenin combination of an ideal source with a series resistor.
 Either
> way, you are sweeping between a certain voltage range at the output of the
> device to get an I-V curve, regardless of what R is in your Thevenin
circuit.
> Your I-V curve will be the same whether R in the Thevenin circuit
is small or
> large.  You will just have to increase the sweep range of the voltage
source
> inside the Thevenin circuit for larger R values to get the same
sweep range at
> the pin of the device.
>
> What is the probelem?  Am I missing something obvious?
>
> Arpad
>
> -----------------------------------------------------------------------------
-
>
> The problem with I-V checking is that there is no  "standard" load as
> with V-T curves. We already went through this i-v standard load  discussion
> and dropped it because
> of controvorsey. The reason I raised it because that I think that in
> signal integrity situations the dc I-V characteristic has more has
a dominant
> effect on the resulting waveforms and we have no reference to check against.
>
> >
> > Hello IBIS gurus,
> >
> > In the last minutes Kumar suggested DC checking (see quote below).
 I am not
> > sure what he means, but just as we can use V-T tables for AC checking,
> couldn't
> > the I-V curves be used for DC checking?
> >
> > Arpad
> > Intel Corporation
> >
> >
> > > Compliance
> > > Will pointed out that the V/T table can be used to as a type
of compliance
> > > test/sanity check.  Kumar would like to see a DC check as well.
> >
> > > AR Kumar: Post an EGG for DC checking.
> >
> >
> > Text item: External Message Header
> >
> > The following mail header is for administrative use
> > and may be ignored unless there are problems.
> >
> > ***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.
> >
> > Subject: IBIS Open Forum 1/6/95 Meeting Minutes
> > To: Randy_L_Wilhelm@ccm.fm.intel.com, Jerry_Budelman@ccm2.jf.intel.com,
> >         bWard@neosoft.com, IBIS@vhdl.org
> > Message-Id: <950113103507_2@ccm.hf.intel.com>
> > From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
> > Date: Fri, 13 Jan 95 10:35:07 PST
> > Received: by ccm.hf.intel.com (ccmgate 3.0) Fri, 13 Jan 95 10:35:07 PST
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> Subject: Re: IBIS Open Forum 1/6/95 Meeting Minutes
> To: ibis@vhdl.org, Arpad_Muranyi@ccm.fm.intel.com
> Message-Id: <9501171455.AA14781@hot>
> From: cpk@cadence.com (C. Kumar)
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and may be ignored unless there are problems.

***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.

Subject: Re: Re[2]: IBIS Open Forum 1/6/95 Meeting Minutes
To: ibis@vhdl.org, Arpad_Muranyi@ccm.fm.intel.com
Message-Id: <9501171904.AA14945@hot>
From: cpk@cadence.com (C. Kumar)
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From bob@icx.com  Tue Jan 17 19:25:56 1995
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Date: Tue, 17 Jan 95 17:31 PST
From: bob@icx.com ( Bob Ross)
To: Will_Hobbs@ccm2.jf.intel.com, ibis@vhdl.org
Subject: Re:  Re[2]: Temperature interpolation for T-V curves?

Will

I was trying to duck the issue.  I may be able to generate something next week.

Bob Ross
Interconnectix, Inc.

>
> Bob, Kumar,

> It's Bird time.  Would someone like to generate it?

> Will



From Arpad_Muranyi@ccm.fm.intel.com  Wed Jan 18 08:46:14 1995
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From: Arpad Muranyi <Arpad_Muranyi@ccm.fm.intel.com>
Message-Id: <950118084127_2@ccm.hf.intel.com>
To: ibis@vhdl.org
Subject: Too many "Undeliverable Mail" lately


Text item: Text_1

I am starting to get too many "Undeliverable mail", "Too many hops", "User 
unknown", etc. returned mail when I send something to ibis@vhdl.org.  Could 
someone please update the mailing list at the reflector so that we don't bog 
down the network with unnecessary (and annoying) mail?

Arpad

From 71436.1314@compuserve.com  Wed Jan 18 13:44:01 1995
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Date: 18 Jan 95 16:29:42 EST
From: Kellee Crisafulli <71436.1314@compuserve.com>
To: IBIS ALL <ibis@vhdl.org>
Cc: Paul Munsey <73053.721@compuserve.com>
Subject: bug in latest version of IBIS parser
Message-Id: <950118212941_71436.1314_HHB63-1@CompuServe.COM>

From: Kellee Crisafulli, HyperLynx Inc.

I ran the latest version of the IBISCHK2.exe and got the following
error message:

  Checking abt.ibs for IBIS 2.0 Compatibility...(BETA)

  ERROR - First Minimum Value Cannot Be 'NA' for Pulldown Beginning at Line 240
  ERROR - First Maximum Value Cannot Be 'NA' for Pulldown Beginning at Line 240
  ERROR - Last Minimum Value Cannot Be 'NA' for Pulldown Beginning at Line 240
  ERROR - Last Maximum Value Cannot Be 'NA' for Pulldown Beginning at Line 240

.... etc..  many more lines of errors

  File Failed

Almost every file I tested has NA values in it, and failed to pass this
version of the parser.  I don't recall that we changed this in V2, am I forgetting
something?

Have a great day
Kellee ..



From bob@icx.com  Wed Jan 18 15:08:57 1995
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Message-Id: <m0rUjRi-000Gi0C@icx.com>
Date: Wed, 18 Jan 95 15:05 PST
From: bob@icx.com ( Bob Ross)
To: 71436.1314@compuserve.com, 73053.721@compuserve.com, ibis@vhdl.org
Subject: Re:  bug in latest version of IBIS parser

Kellee and Paul Munsey:

What was intended was to put this constraint on the [Rising Waveform] and
[Falling Waveform] tables only.  The old IBIS_CHK parser for Version 1.1 and
the previous verions of IBISCHK2 worked correctly and did not have the 
error that Kellee is reporting.

I just got the parser today and will start checking it in a few days.

Bob Ross
Interconnectix, Inc.

> From: Kellee Crisafulli, HyperLynx Inc.

> I ran the latest version of the IBISCHK2.exe and got the following
> error message:

>   Checking abt.ibs for IBIS 2.0 Compatibility...(BETA)

>   ERROR - First Minimum Value Cannot Be 'NA' for Pulldown Beginning at Line 240
>   ERROR - First Maximum Value Cannot Be 'NA' for Pulldown Beginning at Line 240
>   ERROR - Last Minimum Value Cannot Be 'NA' for Pulldown Beginning at Line 240
>   ERROR - Last Maximum Value Cannot Be 'NA' for Pulldown Beginning at Line 240

> .... etc..  many more lines of errors

>   File Failed

> Almost every file I tested has NA values in it, and failed to pass this
> version of the parser.  I don't recall that we changed this in V2, am I forgetting
> something?

> Have a great day
> Kellee ..





From speters@ichips.intel.com  Wed Jan 18 15:18:30 1995
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To: 71436.1314@compuserve.com
Cc: ibis@vhdl.org, 73053.721@compuserve.com
Subject: bug in latest version of IBIS parser
Date: Wed, 18 Jan 1995 15:12:15 -0800
From: Stephen Peters <speters@ichips.intel.com>


Hello Kellee and Paul:

     Is the whole column (min or max column) filled in with NA, or just the
first and/or last values?  If the former, then the parser has a problem (or,
rather, the spec needs to be clarified).  It is OK for a column to start/end with NA
*if* the whole column is NA.  Otherwise, the first and last points of a
column need to be valid numeric values.  I have tested the parser with a file
that has NAs in the middle of the data and the parser works just fine.


               Regards,
               Stephen Peters
               Intel Corp.



From: Kellee Crisafulli, HyperLynx Inc.

I ran the latest version of the IBISCHK2.exe and got the following
error message:

  Checking abt.ibs for IBIS 2.0 Compatibility...(BETA)

  ERROR - First Minimum Value Cannot Be 'NA' for Pulldown Beginning at Line 240
  ERROR - First Maximum Value Cannot Be 'NA' for Pulldown Beginning at Line 240
  ERROR - Last Minimum Value Cannot Be 'NA' for Pulldown Beginning at Line 240
  ERROR - Last Maximum Value Cannot Be 'NA' for Pulldown Beginning at Line 240

.... etc..  many more lines of errors

  File Failed

Almost every file I tested has NA values in it, and failed to pass this
version of the parser.  I don't recall that we changed this in V2, am I forgetting
something?

Have a great day
Kellee ..



From 71436.1314@compuserve.com  Wed Jan 18 18:37:31 1995
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Date: 18 Jan 95 21:30:08 EST
From: Kellee Crisafulli <71436.1314@compuserve.com>
To: IBIS ALL <ibis@vhdl.org>
Subject: bug in latest version of IBIS parser
Message-Id: <950119023008_71436.1314_HHB26-1@CompuServe.COM>

From Kellee

To Stephen Peters:

You asked is the whole column NA, Answer is YES the whole columns are NA.

I believe this is valid, and Bob's reply is correct.  This was not meant to
apply to V/I tables.

I believe the parser needs to be fixed!

Have a good one
Kellee...

From 71436.1314@compuserve.com  Wed Jan 18 18:46:21 1995
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Date: 18 Jan 95 21:36:37 EST
From: Kellee Crisafulli <71436.1314@compuserve.com>
To: IBIS ALL <ibis@vhdl.org>
Subject: Re parser bug, and is whole column NA
Message-Id: <950119023637_71436.1314_HHB22-1@CompuServe.COM>

From: Kellee Crisafulli

To: Stephen Peters and IBIS general

Follow on information I examined several of the older Intel IBIS models,
and they do have entire columns filled with NA as I described.

I believe Bob has summarized the intended test in his email.

Have a good one..
Kellee

From speters@ichips.intel.com  Thu Jan 19 11:51:37 1995
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To: 71436.1314@compuserve.com
Cc: ibis@vhdl.org
Subject: bug in latest version of IBIS parser
Date: Thu, 19 Jan 1995 11:46:38 -0800
From: Stephen Peters <speters@ichips.intel.com>


Hello All:  

  My comments are preceded by >>>

>From Kellee

To Stephen Peters:

You asked is the whole column NA, Answer is YES the whole columns are NA.

I believe this is valid, and Bob's reply is correct.  This was not meant to
apply to V/I tables.

 >>>  In my reading of the spec the 'can't start/end a column with NA' rule
 >>>  applies to BOTH the V/I tables and the waveform tables.  Bob, is that
 >>>  what you meant?

I believe the parser needs to be fixed!

 >>>  Yes, the parser needs to be fixed, but the fix involves allowing NA
 >>>  to start or end a column if the whole column is NA.  The fix is NOT 
 >>>  to stop checking the V/I tables.

            Stephen Peters
            Intel Corp.


Have a good one
Kellee...

From bob@icx.com  Thu Jan 19 14:11:31 1995
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Date: Thu, 19 Jan 95 14:07 PST
From: bob@icx.com ( Bob Ross)
To: 71436.1314@compuserve.com, 73053.721@compuserve.com,
        speters@ichips.intel.com
Subject: Re:  bug in latest version of IBIS parser
Cc: ibis@vhdl.org

To Everyone:

I agree with Stephen's reading of the Spec that no column (typ, min, max) of
any table (V/I tables or Waveform tables) can begin or end with NA's unless
all entries of that column are permitted to contain all NA entries (this 
excludes the typ column) and actually contain all NA entries.

This was NOT what I meant because such a rule is in violation of the 
existing IBIS_CHK parser operation for Version 1.1.  It did not check for this
rule for the min and max columns of V/I Tables.

However, reasons for the rule apply equally well for V/I min and max columns.  I
do not know of any IBIS models that currently violate the rule.  Therefore I
recommend that the IBISCHK2 parser retain the check for IBIS compliance, but be
corrected so that the min and max columns can contain all NA entries. 

Bob Ross
Interconnectix, Inc.   


> Hello All:  

>   My comments are preceded by >>>

> >From Kellee

> To Stephen Peters:

> You asked is the whole column NA, Answer is YES the whole columns are NA.

> I believe this is valid, and Bob's reply is correct.  This was not meant to
> apply to V/I tables.

>  >>>  In my reading of the spec the 'can't start/end a column with NA' rule
>  >>>  applies to BOTH the V/I tables and the waveform tables.  Bob, is that
>  >>>  what you meant?

> I believe the parser needs to be fixed!

>  >>>  Yes, the parser needs to be fixed, but the fix involves allowing NA
>  >>>  to start or end a column if the whole column is NA.  The fix is NOT 
>  >>>  to stop checking the V/I tables.

>             Stephen Peters
>             Intel Corp.


> Have a good one
> Kellee...



From Derrick_Duehren@ccm2.jf.intel.com  Fri Jan 20 12:26:55 1995
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Date: Fri, 20 Jan 95 12:22:05 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950120122205_2@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS (Patti Rusher's address, EIA Affiliation)

---------------------------- Forwarded with Changes ---------------------------
From: 0005446089@mcimail.com at SMTPGATE
Date: 1/20/95 10:49AM
To: Derrick Duehren at JFCCM2
Subject: Re: IBIS (EIA Affiliation)
-------------------------------------------------------------------------------

Derrick,
 
EIA has now finally consolidated at its new building.  Here is
my new phone etc. 
 
Patti Rusher
EIA/Electronic Information Group
2500 Wilson Blvd.
Arlington, VA 22201
TEL: 703/907-7545
FAX: 703/907-7501
EMAIL: 0005446089@mcimail.com
       Will change to  prusher@eia.org  by mid Feb. '95
 
 
I am putting together this AM a quick sequence of events
(with options) on the standards process.  I will send it to
you, Will and Randy before COB.  This should help you a lot.  I
will be available for the 1/27/95 conference call.  

Patti


From Derrick_Duehren@ccm2.jf.intel.com  Fri Jan 20 12:33:56 1995
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Date: Fri, 20 Jan 95 12:29:08 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950120122908_3@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS Summit Agenda Items so far


Text item: Text_1

 
 IBISians, 
 
 So far, I have the following topics for our summit meeting.  We will finalize 
 the agenda in our 1/27/95 teleconference.  For those leading 
 discussions/presenting, please respond with your estimate of time required.
 
 Thanks,
 
 Derrick
 ==============================================================================
 
                                    DRAFT
 
                      IBIS Open Forum Summit Meeting Agenda 
                                    2/6/95
                              9:30 am - 5:00 pm
                          Intel Robert Noyce Building
                     2200 Mission College Blvd., Santa Clara
 
 
  9:30 Check-in, Intros, Announcements                         Hobbs
       - Introductions
       - Miscellany/announcements/door prize
 
 
 (((( random order ))))
 
 
       Series termination discussion                           Kumar
 
       Alternative packaging representations discussion        Phillips 
 
       Diode storage effects                                   Hobbs/Powell
 
       Handling multiple personality drivers discussion        Ward
 
       Future direction (3.0 possibilities)                    Hobbs
 
       IBIS data interpretation                                Ross
 
 

From Will_Hobbs@ccm2.jf.intel.com  Wed Jan 25 08:32:20 1995
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Date: Wed, 25 Jan 95 08:27:29 PST
From: Will Hobbs <Will_Hobbs@ccm2.jf.intel.com>
Message-Id: <950125082729_1@ccm.jf.intel.com>
To: ibis@vhdl.org
Subject: Press Release


Text item: Text_1

FYI, folks.  I received the following from our Marcomm person.

Will

Will:
We have identified several additional editors for the IBIS release.  We will 
be sending the package to them tomorrow and Friday.  That way the weekly 
reporters can call you or whomever early next week to do their articles for 
the following Monday (2/6/95).
We are sending to David Lieberman, Richard Goering and Stan Runyon at EE 
Times; Michael Dortch at E. News; and we also will send to tools editors at 
Electronic Design, EDN and Computer Design.
So you may get several calls next week.  I wanted to be sure that you are 
expecting them.
And much luck with IBIS, et al.
Appreciate your help with the project.
 Sara

From Derrick_Duehren@ccm2.jf.intel.com  Wed Jan 25 09:04:52 1995
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From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950125090001_1@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS 1/27/95 Meeting Agenda


Text item: Text_1

 
 
                       IBIS Open Forum Meeting Agenda 
                                for 1/27/95
 
                           Bridge:          Res:
                           (916) 356-9999   440080
 
 All meetings are 8:00 AM to 10:00 AM PST (16:00 to 18:00 UTC).  When you call 
 into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give 
 the reservation number.
 
 ****************************************************************************
 NOTE: This meeting is only one hour.  Most discussions will be deferred to 
       the 2/6/95 summit meeting.
 ****************************************************************************
 
  8:00 Check-in, Intros, Announcements                         Hobbs
       - Intros of new IBIS participants              
       - Review of previous meeting's minutes (and ARs)
       - Miscellany/announcements/treasurer's report  
       - Opens for new issues                         
 
  8:10 Golden Parser 2.1 status                                Munsey
 
  8:15 EIA affiliation                                         Hobbs
       Patty Rusher to join us.
 
  8:45 2/6/95 IBIS General Session/Summit (face-to-face)       Hobbs
       Finalize the agenda
 
  8:55 Wrap-up, next meeting plans                             Hobbs
 

From Derrick_Duehren@ccm2.jf.intel.com  Wed Jan 25 09:59:35 1995
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Date: Wed, 25 Jan 95 09:54:02 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950125095402_1@ccm.hf.intel.com>
To: 0005446089@mcimail.com, IBIS@vhdl.org
Subject: IBIS EIA Proposals for 1/27 Discussion


Text item: Text_1

IBISians,
Here is fodder for our EIA discussion Friday.
- Derrick
*******************************************************************************

                       IBIS EIA Proposals for Discussion
                                   1/25/95
                               Derrick Duehren

The IBIS Open Forum is seeking to become a committee under the Design 
Automation Division of the Electronic Information Group of EIA.

IBIS Open Forum Scope
---------------------
Develop, support, and promote semiconductor I/O buffer specification standards.


Chairperson Designate
---------------------
Will Hobbs (503) 696-4369, Fax (503) 696-4210
           Will_Hobbs@ccm.jf.intel.com
           XTG Modeling Manager, Intel Corp.
           Intel Corporation
           5200 NE Elam Young Pkwy, Hillsboro, OR 97124 USA


Committee Roster
----------------
See roster.txt document.  The following companies/universities have actively 
participated in the past 6 months:  

AT&T Global Info Systems*          Interconnectix, Inc.*
Cadence Design Systems*            Intergraph
Contec                             Mentor Graphics
Digital Equipment Corp.*           National Semiconductor
Hewlwtt-Packard*                   North Carolina State U.
HyperLynx*                         Quad Design*
IBM-Motorola alliance              Quantic Labs*
INCASES                            Texas Instruments
Integrated Silicon Systems         UniCAD Canada Ltd.
Intel Corp*                        Zeelan Technology.

* Has purchased the 2.1 Golden Parser source code (under Open Forum rules, 
these companies vote on issues when there is not a clear consensus during a 
normal vote)  [[Will, I am missing one.]]


Copyright Ownership
-------------------
Derrick proposes that the voting quorum present at the 2/6/95 summit meeting 
sign the release forms [[Patty Rusher to provide the forms?]].  Potential 
Copyrights to release:
o IBIS 1.1 Spec
o IBIS 2.1 Spec
o Golden Parser 1.1 and 2.1 source code
o s2ibis 2.1 utility
o IBIS Overview document
o IBIS Cookbook document


Operating Policies/Procedures
-----------------------------

MEMBERSHIP
There will be two classes of membership: Regular and Executive.

Regular Membership is free and open to any interested person who wants to 
participate in meetings and internet reflector discussions.  

Executive Membership is open to any company that pays an annual membership fee 
($500, $1,000. $1,500?).

VOTING RIGHTS
Only persons representing Executive Membership companies can vote.  There is 
one vote per company.  [[what about subsidiaries?]]

BENEFITS
Executive Membership companies get a free license to the source code of the 
IBIS Golden Parser.

Any member can participate fully in discussions (save voting), and can submit 
BIRDs.

BIRDs
Buffer Issue Resolution Documents (BIRDs) will be used to propose and discuss 
any changes to the specification and Golden Parser.  BIRDs are accepted on a 
____% vote of the voting membership.  See Appendix A for the specifications of 
a BIRD.

STRUCTURE
Position          Responsibilities
-----------------------------------------------------------------------------
Chairperson       Oversee all forum activities, preside at all general 
                  meetings.  Signature authority.

Vice Chair        Cover for chair in chair's absence, coordinate all public 
                  relations (press releases, media contacts)

Secretary         Coordinate logistics of all meetings, take and publish 
                  meeting minutes within 10 days of meeting, maintain 
                  participation roster.  Work with file server sysop to 
                  maintain the reflector and stored files.

Treasurer         Maintain/manage the group's finances.  Signature authority.

Librarian         Maintain the library of public IBIS models, including 
                  verifying authenticity and compliance before posting.

All officers are selected annually by election of the voting membership.


INTERNET ETIQUETTE
When possible, all correspondence, BIRDs, etc. are transmitted via the 
reflector in plain ASCII text, 80 columns max., and with no tabs.



+++++++++++++++++++++++++++++++ page break ++++++++++++++++++++++++++++++++++


                                APPENDIX A 

                 Buffer Issue Resolution Document (BIRD)
                    (a process for resolving issues)

-----------------------------------------------------------------------------

BIRD filename convention:

  pbirdn_n.txt   new/pending
  abirdn_n.txt   approved
  dbirdn_n.txt   dead

-----------------------------------------------------------------------------

Issues must be well thought out and clearly documented using this template to 
be placed on the agenda of IBIS Open Forum meetings.

Instructions:
Write up your issue and submit it to the Chairperson via the internet.  The 
Chair will do a preliminary check for completeness and (potentially) send your 
BIRD back to you.  If not, the Chair  will post the issue to the IBIS 
reflector.  Typically, each issue must be out for review for two weeks before 
the Open Forum will vote on it.  During that time, you will be expected to 
answer questions related to your BIRD.  In each meeting announcement, the 
agenda will list those BIRDs that will be discussed and possibly voted on at 
that meeting.  BIRDs are accepted on a ____% vote of the voting membership.

NOTE:  All text in French brackets is for explanation only and should be 
       deleted.

-----------------------------   cut here   ----------------------------------
*****************************************************************************
*****************************************************************************

                      Buffer Issue Resolution Document  (BIRD)


BIRD ID#:      {don't fill in, will be filled in by the chairperson}
ISSUE TITLE:   {one line description of your issue}
REQUESTOR:     {your name and company}

DATE SUBMITTED:                       {date you sent to the chair}
DATE REVISED:                         {revision date}
DATE ACCEPTED BY IBIS OPEN FORUM:     {status or date BIRD accepted}

*****************************************************************************
*****************************************************************************

STATEMENT OF THE ISSUE:

{Place a short description of your issue here.  People should be able
tell by reading this if they care about this in less than 1 minute.}

*****************************************************************************

STATEMENT OF THE RESOLVED SPECIFICATIONS:

{For new keywords, write the text EXACTLY AS IT SHOULD APPEAR in a
future IBIS specification.  If this is a change, state the old text
and the new text again EXACTLY AS IT SHOULD APPEAR.  Be sure to give
intended location in the specification.}

*****************************************************************************

ANALYSIS PATH/DATA THAT LED TO SPECIFICATION:

{There are many "experts" reviewing this document.  Your reasons, analysis,
and justifications must be precise and well documented, or your BIRD will
be sent back to you.  Use this section to show that you've done your
homework, and answer all questions that will undoubtedly be asked.  If
your issue is a change instead of an enhancement, document how backward
compatibility is to be addressed.}

*****************************************************************************

ANY OTHER BACKGROUND INFORMATION:

{These documents will be archived, so use this section to carry any detail
that is not essential to the previous section, but should not be lost.}

*****************************************************************************




From bob@icx.com  Wed Jan 25 21:06:39 1995
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Message-Id: <m0rXMMs-000Gi0C@icx.com>
Date: Wed, 25 Jan 95 21:03 PST
From: bob@icx.com ( Bob Ross)
To: ibis@vhdl.org
Subject: BIRD25 DATA DERIVATION EXPANSION

IBIS Members:

In response to recent reflector discussions, BIRD25 is proposed.

BIRD25 is intended for an IBIS Version 2.2 update clarification release or
for Version 3.0.  It makes clearer the data values and under what conditions
data is expected to be provided in the "min" and "max" columns for certain
data.

The major impact of BIRD25 is to add clarity by:

(1) Giving a rational for populating the "min" and "max" columns.

(2) Allowing usage of "slow, weak" process and "fast, strong" process models
    or devices in developing IBIS models.

(3) Giving a rational for inserting C_comp "min" and "max" column entries.
    This differs from most current practice, but is on the table for
    discussion.

(4) Including conditions for [Rising Waveform] and [Falling Waveform] table
    "min" and "max" column entries, to correct an omission. 


Bob Ross,
Interconnectix, Inc.

*****************************************************************************

*****************************************************************************
                 Buffer Issue Resolution Document  (BIRD)

BIRD ID#:                25
ISSUE TITLE:             DATA DERIVATION EXPANSION
REQUESTOR:               Bob Ross, Interconnectix, Inc.
DATE SUBMITTED:          25 January 1995 
DATE REVISED:            
DATE ACCEPTED BY IBIS OPEN FORUM:    Pending

******************************************************************************

******************************************************************************

STATEMENT OF THE ISSUE:

As IBIS has expanded in functionality, some of the derivation rules and
usage has not been fully considered or documented in the standard.


******************************************************************************

STATEMENT OF THE RESOLVED SPECIFICATIONS:

Original first Paragraph of NOTES ON DATA DERIVATION METHOD section:

|==============================================================================
|
|                       NOTES ON DATA DERIVATION METHOD
|
| This section explains how data values are derived.  The intention is to
| avoid over-guardbanding which enables simulation results that are meaningful
| and useful.  This intention is accomplished by having each silicon vendor
| base its data on typical process data, and then derate by voltage and
| temperature, and a proprietary "X%" factor.  This methodology also has the
| nice feature that the data can be derived either from vendor-proprietary
| silicon models, or typical device measurement over temperature/voltage.
|


Replace this with the following text:


|==============================================================================
|
|                       NOTES ON DATA DERIVATION METHOD
|
| This section explains how data values are derived.  It describes certain
| assumed parameter and table extraction conditions if they are not
| explicitly specified.  It also describes the allocation of data into
| the "typ", "min", and "max" columns under variations of Voltage,
| Temperature, and Process.
|
| The required "typ" column for all data represents nominal operating
| conditions.  The "min" column corresponds to slow, weak conditions, and 
| the "max" column corresponds to fast, strong conditions.  It is
| permissible to use weak, slow devices or models to derive the data
| for the "min" column, and to use strong, fast devices or models to 
| derive the data in the "max" columns with the voltage and temperature
| derating conditions described in the "min" or "max" columns.  It is also
| permissible to use typical devices or models under voltage and temperature
| conditions and also optionally apply proprietary "X%" and "Y%" factors
| described later for further derating.  This methodology has the
| nice feature that the data can be derived either from vendor-proprietary
| silicon models, or typical device measurement over temperature/voltage.
|
| All voltage keyword settings will always contain the smallest magnitude
| voltage in the "min" column and the largest magnitude voltage for the
| "max" column to represent simutaneously all supplies set at their
| minimum values and all supplies at their maximum values.
| 
| The optional [Temperature] keyword parameters will have the temperature
| which causes or amplifies the slow, weak conditions in the "min" column
| and the temperature which causes or amplifies the fast, strong
| conditions in the "max" column.  Therefore, the "min" column for 
| [Temperature] will contain the lowest value for bipolar devices (TTL
| and ECL) and the highest value for CMOS devices.  Default values are
| described later are assumed if temperature is not specified.
|
| The [Model] sub-parameter C_comp allows optional "min" and "max" values.
| If extractable, the values under the "min" and "max" columns shall be
| obtained under the same conditions that the other data is extracted.
| Otherwise, if only the range of values is known, the highest value
| should be placed in the "min" column, and the lowest value in the
| "max" column.
|
| Default conditions under which all V/I tables are extracted are given
| below when the temperature is not explicitly specified and a typical
| model or device is used.  The voltage ranges for the tables cover the
| most common, single supply, standard logic situations.  For situations
| where multiple supplies are used, extend the tables in a similar manner
| to voltages for the worst case reflected wave values that would be
| encountered in practice.
|
| Default conditions under which the [Ramp] sub-parameters dV/dt_r and
| dV/dt_f are given for the "typ", "min", and "max" columns.  A 50 Ohm
| load is normally assumed, but this can be overriden with the value given
| by the R_load sub-parameter.  The temperature and voltage conditions
| for the "min" and "max" columns are consistent with and identical to
| those of the V/I columns.
| 
| The measurement setups under which the optional keyword tables for 
| [Rising Waveform] and [Falling Waveform] tables are described as
| required and optional sub-parameter for those keywords.  Therefore,
| there are no alternative default measurement conditions.  The temperature
| and voltage conditions shall also be consistent with the [Ramp]
| sub-parameter conditions.  Note, that even though waveform keywords
| may be supplied, the [Ramp] keyword is still required to the the
| IBIS model can still be used in applications which do not support
| processing of waveform data.  
| 
| The overriding rule for inserting data into "typ", "min", and "max"
| columns for the C_comp, V/I, ramp and waveform keywords and sub-parameters
| is that the data under each column is obtained under the same voltage
| and voltage conditions to preserve correlation and consistency. 
|
| Any keyword or sub-paramater which is not explicitly mentioned in this
| section is expected to have "min" column entry to contain the
| smallest value, and the "max" column entry the largest value.  For example,
| the default package sub-parameter "min" and "max" column entries are
| expected to span the smallest to largest values based on physical 
| locations unrelated to the voltage, temperature, and process considerations
| in this section.
| 
| The following discussion lists details and default conditions when
| explicit, optional temperature settings and test conditions are not
| provided.
|


Existing text follows.


******************************************************************************

ANALYSIS PATH/DATA THAT LED TO SPECIFICATION

As IBIS expands to capture more capability, there needs to be consistent
alignment of certain correlated data.  More restrictive guidelines are
needed in specifying "min" and "max" column entries so that related
groupings for the die model can all exist in the same column.

The rational for "min" and "max" columns needs to be expressed.

Because Spice based I/O models frequently are given as separate
"slow, weak" and "fast, strong" models such as in the TI Advanced Bus
Interface SPICE I/O Models Data Book, provisions to except such models
needed to be stated.  This is consistent with actual usage and needs
to be included in supporting utilities such as "s2ibis" for Version 2.1.

If the [Temperature] keyword is used, the data that goes into the "min"
and "max" columns is restated in context of the reason for providing the
"min" and "max" columns.  Furthermore, while temperature itself may
not necessarily be used in processing an IBIS model, it could be
used to generate it through automated tools.  Therefore, the 
temperature used needs to be aligned with the other data in the 
column.

There exists a potential conflict in IBIS in that the C_comp "min" and
"max" column entries can be derived in certain cases from actual Spice
models or data and is correlated with other "min" column or "max" 
column entries.  The largest value does not necessarily reside in the
"max" column.  Without clarification, the larger value of C_comp would
be positioned in the "max" column, and any correlation would be lost.
Because automated extraction of IBIS data from die models is a reality,
it is important to obtain each column of data under identical conditions.
When correlation of C_comp is not known, then typically the larger value
is used for slower buffer conditions ("min" column entry applications).
Here a change is proposed that in the case where only the range of data
values is known, the larger value be positioned in the "min" column.
While this may require an update revision of existing models, it is 
important to resolve this.  Otherwise, IBIS may be faulted for an 
unnecessary inconsistency, and the processing of IBIS data will remain
ambiguous with respect to C_comp variations.  It should NOT be assumed
that the "min" corner use a "max" C_comp value because such an 
assumption would preclude the knowledge and proper usage of more
reliable, correlated C_comp values.

Conditions for [Rising Waveform] and [Falling Waveform] column entries
are clarified to be consistent with the [Ramp] sub-parameter entries.

The "min" column and "max" column entries apply only to the "process-
based" IBIS data.  Other data follow standard "min" and "max" entries
based on magnitude because they pertain to variations that are unrelated
to process parameter variations or else their application (such as 
terminator resistor values) would be treated (optionally) as an independent
variation for analysis and design.


******************************************************************************

ANY OTHER BACKGROUND INFORMATION







From kellee@nwlink.com  Thu Jan 26 18:40:54 1995
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  (5.67b/IDA-1.5 for <ibis@vhdl.org>); Thu, 26 Jan 1995 18:34:46 -0800
Date: Thu, 26 Jan 1995 18:34:46 -0800
Message-Id: <199501270234.AA02860@washington.nwlink.com>
X-Sender: kellee@nwlink.com
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Mime-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
To: ibis@vhdl.org
From: kellee@nwlink.com
Subject: Re: Xilinx IBIS model development

From: Kellee Crisafulli, HyperLynx

Hello fellow IBISians

  I thought the group might be interested in Xilinx Status so I am forwarding
this message from Kerry at Xilinx.

>From: Kerry Pierce <kerryp@xilinx.com>
>To: kellee@nwlink.com
>Subject: Re: How is the IBIS model development going?
>
>Hi Kellee
>
>I have created ibis models for our 3000A family and
>I am working on our 4000 family.  The 3000A family
>models are being tested by some "beta" customers.
>Our plan is to release a complete model set some
>time in March.
>
>--Kerry
>
Have a great day...


From bob@icx.com  Fri Jan 27 13:49:21 1995
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Date: Fri, 27 Jan 95 13:45 PST
From: bob@icx.com ( Bob Ross)
To: 75053.721@compuserve.com, 75123.3477@compuserve.com, ibis@vhdl.org
Subject: TEST MATRIX UPDATE

Hello Fellow IBISans, Will and Paul and Ron

Here is a minor update on the Test Matrix based on Version 2C of the IBICHK2
parser.  I have done some actual testing and have not discovered any
new problems other than the previously reported "NA" issue.  The test
for [Diff Pin] differences now works fine.  One warning per Monotonocity
table violation appears to work fine.

The only problems on the matrix that remain are in the [Pin Mapping] keyword
where it incorrectly allows "NA", and in the Waveform test related to accepting
less than 2 data points for Waveform tables (which should be fixed with
the "NA" correction).  I have not looked at the Package Model tests, so I do
not know if the concerns there have been addressed.

Overall the parser is functioning very well.

Bob Ross,
Interconnectix, Inc.

                A TEST MATRIX FOR IBIS VERSION 2c

DATE:  10/31/94, 12/2/94, 1/26/95


SPECIFICATION TESTED                   PASS    Comments/who tested
--------------------------------------+-----+-----------------------------+
Test that the parser only             |     |                             |
accepts 1.0, 1.1, 2.0, 2.1 as         |     |                             |
valid arguments to the [IBIS Ver]     | yes | Stephen Peters              |
keyword.                              |     |                             |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Scaling Factors:                      |     |                             |
                                      |     |                             |
Test that the parser recognizes       |     |                             |
"T", "G" and "f" as valid scaling     | yes | No indication either way    |
factors.                              |     | Bob Ross - this is proper   |
                                      |     | operation                   |
Test that the parser does not         |     |                             |
recognize "t", "g" and "F" as         | yes | No indication either way    |
Valid scaling factors.                |     | Bob Ross - proper operation |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Keywords rules:                       |     |                             |
                                      |     |                             |
Test that the parser recognizes       |     |                             |
the [GND clamp] and [PWR clamp]       | yes |  Stephen Peters             |
keywords without the underscore.      |     |                             |
Test Underscore rule for 3-word       | yes |  Bob Ross                   |
Keyoreds - all 4 cases.               |     |                             |
                                      |     |                             |
Test that the parser issues an        |     |                             |
error if a keyword does not begin     | yes |  Stephen Peters             |
in column 1.                          |     |                             |
                                      |     |                             |
Test case insensitivity of all        |     |                             |
keywords, reserved words and          | yes | Pin mapping keyword does not|
sub-parameters                        |     | recognize "power" and "gnd" |
                                      |     | Bob Ross - OK, should be    |
                                      |     | "pulldown_ref", "pullup_ref,|
                                      |     | "gnd_clamp_ref", and        |
                                      |     | "power_clamp_ref"           |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Comments and Notes:                   |     |                             |
                                      |     |                             |
Test that the parser does not         |     |                             |
accept "+" and "-" as valid           | yes |  Stephen Peters             |
comment characters.                   |     |                             |
                                      |     |                             |
Test that the parser recognizes       | yes |  Stephen Peters             |
the [Copyright] keyword.              |     |                             |
                                      |     |                             |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Component keyword related:            |     |                             |
                                      |     |                             |
Test that the parser issues an        |     |                             |
error if the [Component] keyword      | yes |   Stephen Peters            |
has no component name after it.       |     |                             |
                                      |     |                             |
Test that the parser issues a warning |     |                             |
if the component name contains blanks | yes |   Stephen Peters            |
                                      |     |                             |
Test the component name length        |     |                             |
rules:                                |     |                             |
parser accepts name < 40 characters   | yes |   Stephen Peters            |
parser accepts name = 40 characters   | yes |        "                    |
parser fails if name > 40 characters  | yes |        "                    |
                                      |     |                             |
Test that the parser issues an        |     |                             |
error if the [Manufacture] keyword    | yes |   Stephen Peters            |
has no Manufactures name after it.    |     |                             |
                                      |     |                             |
Test the Manufactures name length     |     |                             |
rules:                                |     |                             |
parser accepts name < 40 characters   | yes |    Stephen Peters           |
parser accepts name = 40 characters   | yes |    Stephen Peters           |
parser fails if name > 40 characters  | yes |    Stephen Peters           |
                                      |     |                             |
Test that an .ibs file can contain    | yes |    Bob Ross                 |
more than one [Component] keyword     |     |                             |
and component description.            |     |                             |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Pin keyword related:                  |     |                             |
                                      |     |                             |
Test that the parser recognizes       | yes |   Stephen Peters            |
the [Pin] keyword.                    |     |                             |
                                      |     |                             |
Test that the parser issues a         |     |                             |
error when every model_name does      | yes |   Bob Ross                  |
not have a corresponding model        |     |   (I don't see the problem) | defined.                              |     |                             |
                                      |     |                             |
Test the "3 column or 6 column"       |     |                             |
rule.                                 | yes |   Stephen Peters            |
                                      |     |                             |
Test that the parser issues an error  |     |                             |
when non-numeric data is in the pin   | yes |   Stephen Peters            |
data columns                          |     |                             |
--------------------------------------+-----+-----------------------------+
Package Model related:                |     |                             |
                                      |     |                             |
Test that the parser recognizes       | yes |  Stephen Peters             |
the [Package Model] keyword.          |     |                             |
                                      |     |                             |
Test the package model name length    |     |                             |
rules                                 |     |                             |
parser accepts name < 40 characters   |  no | Name is taken as a DOS file |
parser accepts name = 40 characters   |  no | name and not as argument to |
parser fails if name > 40 characters  |  no | the [Define Package Model]  |
                                      |     | keyword                     |
Verify that the parser issues an      |     |                             |
error if it cannot find:              |     |                             |
                                      |     |                             |
1. A [Define Package Model] keyword   |     |                             |
that has the same argument as the     |     |                             |
[Package Model] keyword or            |     |                             |
                                      |     |                             |
2. An external .pkg file that has     |     |                             |
a [Define Package Model] keyword      |     |                             |
with  has the same argument as the    |     |                             |
[Package Model] keyword.              |     |                             |
                                      |     |                             |
Test that the parser recognizes all   |     |                             |
keywords in the package model         |     |                             |
description:                          |     |                             |
[Define Package Model]                |     |                             |
[Manufacturer]                        |     |                             |
[OEM]                                 |     |                             |
[Description]                         |     |                             |
[Number of Pins]                      |     |                             |
[Pin Numbers]                         |     |                             |
[Model Data]                          |     |                             |
[Resistance Matrix]                   |     |                             |
[Inductance Matrix]                   |     |                             |
[Capacitance Matrix]                  |     |                             |
[Bandwidth]                           |     |                             |
[Row]                                 |     |                             |
[End Model Data]                      |     |                             |
[End Package Data]                    |     |                             |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Pin Mapping keyword related:          |     |                             |
                                      |     |                             |
Test that the parser recognizes       | yes |  Stephen Peters             |
the [Pin Mapping] keyword.            |     |                             |
                                      |     |                             |
Test that the parser issues an        |     |                             |
error if every pin listed in the      | yes |  Bob Ross - fixed           |
[Pin] keyword does not have an        |     |                             |
entry in the [Pin Mapping] table      |     |                             |
                                      |     |                             |
Test the "3 column or 5 column"       | yes |  Stephen Peters             |
rule.                                 |     |                             |
                                      |     |                             |
Test that NC is a valid entry         |     |                             |
in a column.                          | yes |  Stephen Peters             |
                                      |     |                             |
Test that each unique entry label     |     |                             |
must connect to at least one pin      |     |                             |
whose model name is POWER or GND      | yes |  Stephen Peters             |
                                      |     |                             |
Test that NA is NOT a valid           |     |                             |
column entry                          | NO  |  Bob Ross                   |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Diff Pin keyword related:             |     |                             |
                                      |     |                             |
Test that the parser recognizes       | yes |  Bob Ross                   |
the [Diff Pin] keyword.               |     |                             |
                                      |     |                             |
Test that the parser recognizes       | yes |  Bob Ross                   |
the 5 associated sub-parameters       |     |                             |
                                      |     |                             |
Test the "4 column or 6 column"       | yes |  Bob Ross                   |
rule.                                 |     |                             |
                                      |     |                             |
Test that NC is NOT a valid           | yes |  Bob Ross                   |
column entry.                         |     |                             |
                                      |     |                             |
Test that NA is a valid column        | yes |  Bob Ross                   |
entry.                                |     |                             |
                                      |     |                             |
Reports error for duplicate pin       | yes |  Bob Ross                   |
numbers.                              |     |                             |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
[Model] keyword:                      |     |                             |
                                      |     |                             |
Test that the parser recognizes       | yes |  Bob Ross                   |
the [Model] keyword.                  |     |                             |
                                      |     |                             |
Test that the parser recognizes       |     |                             |
each Model_type:                      |     |                             |
Input                                 | yes |   Bob Ross                  |
Output                                | yes |                             |
I/O                                   | yes |                             |
3-state                               | yes |                             |
Open_drain                            | yes |                             |
I/O_open_drain                        | yes |                             |
Open_sink                             | yes |                             |
I/O_open_sink                         | yes |                             |
Open_source                           | yes |                             |
I/O_open_source                       | yes |                             |
Input_ECL                             | yes |                             |
Output_ECL                            | yes |                             |
I/O_ECL                               | yes |                             |
Terminator                            | yes |                             |
                                      |     |                             |
Test that the parser issues           |     |                             |
a warning if an input type model      | yes |  Stephen Peters             |
does not have Vinh or Vinl defined.   |     |                             |
For All I/O_* cases.                  | yes |  Bob Ross                   |
                                      |     |                             |
                                      |     |                             |
Test that the parser issues an        |     |                             |
error if the Model_type or C_comp     | yes |  Stephen Peters             |
sub-parameters are missing.           |     |                             |
                                      |     |                             |
Test that the parser accepts a        |     |                             |
[Model] description with only the     |     |                             |
Model_type and C_comp sub-params      | yes |  Stephen Peters             |
defined.                              |     |                             |
                                      |     |                             |
Test that the parser allows NA in     |     |                             |
the min and max columns only of the   | yes |  Stephen Peters             |
C_Comp sub-parameter.                 |     |                             |
                                      |     |                             |
Test that the parser allows only      |     |                             |
Non-inverting and Inverting as        | yes |  Stephen Peters             |
choices for the Polarity sub-param    |     |                             |
                                      |     |                             |
Test that the parser allows only      |     |                             |
Active-High and Active-Low as         | yes |  Stephen Peters             |
choices for the Enable sub-param      |     |                             |
                                      |     |                             |
Test that the parser recognizes       |     |                             |
the Vmeas, Cref, Rref and Vref        | yes |  Stephen Peters             |
sub-parameters.                       |     |                             |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Temperature keyword related:          |     |                             |
                                      |     |                             |
Test that the parser recognizes       | yes |  Stephen Peters             |
the [Temperature Range] keyword       |     |                             |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Power supply rail related:            |     |                             |
                                      |     |                             |
Test that the parser recognizes       |     |                             |
the supply rail keywords              |     |                             |
[Voltage Range]                       | yes |   Stephen Peters            |
[Pullup Reference]                    |  "  |                             |
[Pulldown Reference]                  |  "  |                             |
[POWER Clamp Reference]               |  "  |                             |
[GND Clamp Reference]                 |  "  |                             |
                                      |     |                             |
Test that the parser issues an        |     |                             |
error if the [Voltage Range]          |     |                             |
keyword is absent and all four of     |     |                             |
the other supply rail keywords are    | yes |  Stephen Peters             |
NOT present.                          |     |                             |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
I/V table related:                    |     |                             |
                                      |     |                             |
Test that the parser recognizes       |     |                             |
the [Pullup], [Pulldown], [GND        | yes |  Stephen Peters             |
Clamp] and [Power Clamp] keywords.    |     |                             |
                                      |     |                             |
Test that the parser issues an        | yes |  Bob Ross                   |
error if all three columns are        |     |                             |
not included                          |     |                             |
                                      |     |                             |
Test that NA is accepted in the       | yes |  Bob Ross                   |
min and max columns.                  |     |                             |
                                      |     |                             |
Test that the parser issues an        | yes |  Bob Ross                   |
error if a column contains over       |     |                             |
100 points.                           |     |                             |
                                      |     |                             |
Test that the parser issues an        |     |                             |
error if a table contains less        | yes |  Stephen Peters             |
than two points.                      |     |                             |
                                      |     |                             |
Test that the parser issues a         | yes |  Bob Ross, but too many     |
warning if non-monotonic data         |     |                             |
is found.                             |     |                             |
Test for One Warning per Column       | yes |  Bob Ross                   |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Terminator related:                   |     |                             |
                                      |     |                             |
Test that the parser recognizes       | yes |  Bob Ross                   |
the [Rgnd], [Rpower], [Rac] and       |     |                             |
[Cac] keywords.                       |     |                             |
                                      |     |                             |
Test if [Rac], then [Cac] req'd.      | yes |  Bob Ross                   |
                                      |     |                             |
Test if [Cac], then [Rac] req'd.      | yes |  Bob Ross                   |
                                      |     |                             |
Test if parser issues an error with   |     |                             |
above keywords AND Model_type is NOT  | yes |  Bob Ross                   |
Terminator.                           |     |                             |
                                      |     |                             |
Test that parser DOES NOT issue an    | yes |  Bob Ross                   |
error if above models are NOT         |     |                             |
defined.  (Clamps or no components    |     |                             |
can also be "Terminators")            |     |                             |
                                      |     |                             |
Test that the parser issues an        | yes |  Bob Ross                   |
error if all three columns are        |     |                             |
not included                          |     |                             |
                                      |     |                             |
Test that NA is accepted in the       | yes |  Bob Ross                   |
min and max columns.                  |     |                             |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Ramp keyword related:                 |     |                             |
                                      |     |                             |
Test that the parser recognizes       |     |                             |
the [Ramp] keyword and the            | yes |  Stephen Peters             |
dv/dt_r and dv/dt_f sub-parameters.   |     |                             |
                                      |     |                             |
Test that the parser recognizes       | yes |  Stephen Peters             |
the R_load sub-parameter.             |     |                             |
                                      |     |                             |
Test that the R_load sub-parameter    | yes |  Stephen Peters             |
is optional.                          |     |                             |
                                      |     |                             |
--------------------------------------+-----+-----------------------------+
Waveform Related:                     |     |                             |
                                      |     |                             |
Test that the parser recognizes       |     |                             |
the [Rising Waveform] and [Falling    | yes |   Bob Ross                  |
Waveform] keywords.                   |     |                             |
                                      |     |                             |
Test that the parser recognizes       |     |                             |
the sub-parameters:                   |     |                             |
R_fixture                             | yes |   Bob Ross                  |
V_fixture                             | yes |                             |
V_fixture_max                         | yes |                             |
V_fixture_min                         | yes |                             |
C_fixture                             | yes |                             |
L_fixture                             | yes |                             |
R_dut                                 | yes |                             |
L_dut                                 | yes |                             |
C_dut                                 | yes |                             |
                                      |     |                             |
Test that the parser issues an        |     |                             |
error if the R_fixture and            | yes |   Bob Ross                  |
V_fixture sub-parameters are not      |     |                             |
present.                              |     |                             |
                                      |     |                             |
Test that the parser issues an        |     |                             |
error if a column contains over       | yes |   Bob Ross                  |
100 points.                           |     |                             |
                                      |     |                             |
Test that the parser issues an        |     |                             |
error if a table contains less        | NO  |   Bob Ross                  |
than two points.                      |     |                             |
--------------------------------------+-----+-----------------------------+






From Derrick_Duehren@ccm2.jf.intel.com  Fri Jan 27 20:06:53 1995
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Date: Fri, 27 Jan 95 20:02:01 PST
From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950127200201_1@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS EIA Proposal, 2nd Draft


Text item: Text_1

*******************************************************************************
NOTE: Open issues will be discussed at 10:00 am at the 2/6/95 summit meeting in 
Santa Clara.  We will have a bridge phone line available to those who cannot 
attend in person.  The revised agenda, which I will post early next week, will 
list the number to call.        - Derrick Duehren
*******************************************************************************

                             IBIS EIA Proposal
                             2nd Draft 1/27/95

The IBIS Open Forum is seeking to become a committee under the Design 
Automation Division of the Electronic Information Group of EIA.

IBIS Open Forum Scope
---------------------
[TBD at 2/6/95 meeting] 
Proposed: "Develop, support, and promote semiconductor behavioral I/O buffer 
model specification standards."


Chairperson Designate
---------------------
Will Hobbs (503) 696-4369, Fax (503) 696-4210
   Will_Hobbs@ccm.jf.intel.com
   XTG Modeling Manager, Intel Corp.
   Intel Corporation
   5200 NE Elam Young Pkwy, Hillsboro, OR 97124 USA


Committee Roster
----------------
See roster.txt document for a complete listing.  The following 
companies/universities have actively participated in the past 6 months:  

AT&T Global Info Solutions        Intergraph
Cadence Design Systems*            Mentor Graphics
Contec                             National Semiconductor
Digital Equipment Corp.*           North Carolina State U.
Hewlwtt-Packard*                   Quad Design*
HyperLynx*                         Quantic Labs*
IBM-Motorola alliance              Synopsys
INCASES*                           Texas Instruments
Integrated Silicon Systems         UniCAD Canada Ltd.
Intel Corp*                        Zeelan Technology.
Interconnectix, Inc.*

* Has purchased the 2.1 Golden Parser source code (under Open Forum rules, 
these companies vote on issues when there is not a clear consensus during a 
normal vote).


Copyright Ownership
-------------------
The voting quorum present at the 2/6/95 summit meeting will sign a release form 
for the 1.1 and 2.1 specs.

The Golden Parser 1.1 and 2.1 source code is currently owned by Paul Munsey and 
Ron Neville.  Will will ask them to release the ownership/rights of both 
versions to the EIA.

The s2ibis 2.1 utility was developed with ARPA funding to be put into the 
public domain.  EIA will not have ownership.

The IBIS Overview and Cookbook documents are owned by Intel.  Derrick will find 
out how to turn them over to EIA ownership.


Operating Policies/Procedures
-----------------------------

MEMBERSHIP
Committee participation is free and open to any interested person who wants to 
participate in meetings and internet reflector discussions, submit BIRDs, and 
submit models to the public-domain billboard.

Membership is limited to representatives of dues-paying companies.  Members 
must participate in 51% of meetings.  If they loose their voting privileges 
(this is required to ensure a voting quorum).

VOTING
Only persons representing Membership companies can vote.  There is one vote per 
company.  A simple majority is required of a quorum of 51% of the vote-eligible 
membership.

DUES
$_TBD_ dues will be collected annually.  [We also need to decide on any 
grandfathering.]

BENEFITS
Membership companies get a free license to the source code of the IBIS Golden 
Parser.  [TBD at 2/6/95 meeting].

BIRDs
Buffer Issue Resolution Documents (BIRDs) will be used to propose and discuss 
any changes to the specification and Golden Parser.  See Appendix A for the 
specifications of a BIRD.

STRUCTURE
Position          Responsibilities
-----------------------------------------------------------------------------
Chairperson       Oversee all forum activities, preside at all general 
                  meetings.  Finance authority.

Vice Chair        Cover for chair in chair's absence, coordinate all public 
                  relations (press releases, media contacts)

Secretary         Coordinate logistics of all meetings, take and publish 
                  meeting minutes within 10 days of meeting.  Work with 
                  file server sysop to maintain the reflector and on-line 
                  files.

Librarian         Maintain the library of public IBIS models, including 
                  verifying authenticity and compliance before posting.  This 
position does not need to be a voting member.

All officers are selected annually by election of the voting membership.  First 
election 2/6/95, effective [TBD 2/6/95].

INTERNET ETIQUETTE
When possible, all correspondence, BIRDs, etc. are transmitted via the 
reflector in plain ASCII text, 80 columns max., and with no tabs.

+++++++++++++++++++++++++++++++ page break ++++++++++++++++++++++++++++++++++


                                APPENDIX A 

                 Buffer Issue Resolution Document (BIRD)
                    (a process for resolving issues)

-----------------------------------------------------------------------------

BIRD filename convention:

  pbirdn_n.txt   new/pending
  abirdn_n.txt   approved
  dbirdn_n.txt   dead

-----------------------------------------------------------------------------

Issues must be well thought out and clearly documented using this template to 
be placed on the agenda of IBIS Open Forum meetings.

Instructions:
Write up your issue and submit it to the Chairperson via the internet.  The 
Chair will do a preliminary check for completeness and (potentially) send your 
BIRD back to you.  If not, the Chair  will post the issue to the IBIS 
reflector.  Typically, each issue must be out for review for two weeks before 
the Open Forum will vote on it.  During that time, you will be expected to 
answer questions related to your BIRD.  In each meeting announcement, the 
agenda will list those BIRDs that will be discussed and possibly voted on at 
that meeting.  BIRDs are accepted on a ____% vote of the voting membership.

NOTE:  All text in French brackets is for explanation only and should be 
       deleted.

-----------------------------   cut here   ----------------------------------
*****************************************************************************
*****************************************************************************

                      Buffer Issue Resolution Document  (BIRD)


BIRD ID#:      {don't fill in, will be filled in by the chairperson}
ISSUE TITLE:   {one line description of your issue}
REQUESTOR:     {your name and company}

DATE SUBMITTED:                       {date you sent to the chair}
DATE REVISED:                         {revision date}
DATE ACCEPTED BY IBIS OPEN FORUM:     {status or date BIRD accepted}

*****************************************************************************
*****************************************************************************

STATEMENT OF THE ISSUE:

{Place a short description of your issue here.  People should be able
tell by reading this if they care about this in less than 1 minute.}

*****************************************************************************

STATEMENT OF THE RESOLVED SPECIFICATIONS:

{For new keywords, write the text EXACTLY AS IT SHOULD APPEAR in a
future IBIS specification.  If this is a change, state the old text
and the new text again EXACTLY AS IT SHOULD APPEAR.  Be sure to give
intended location in the specification.}

*****************************************************************************

ANALYSIS PATH/DATA THAT LED TO SPECIFICATION:

{There are many "experts" reviewing this document.  Your reasons, analysis,
and justifications must be precise and well documented, or your BIRD will
be sent back to you.  Use this section to show that you've done your
homework, and answer all questions that will undoubtedly be asked.  If
your issue is a change instead of an enhancement, document how backward
compatibility is to be addressed.}

*****************************************************************************

ANY OTHER BACKGROUND INFORMATION:

{These documents will be archived, so use this section to carry any detail
that is not essential to the previous section, but should not be lost.}

*****************************************************************************



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From: Derrick Duehren <Derrick_Duehren@ccm2.jf.intel.com>
Message-Id: <950127200701_1@ccm.hf.intel.com>
To: IBIS@vhdl.org
Subject: IBIS Summit Presentations/Discussions


Text item: Text_1

 
 If you are giving a presentation or leading a discussion at the 2/6/95 summit, 
 I NEED A TITLE AND AMOUNT OF TIME NEEDED.
 
 Thank you.  Please respond by Tuesday, 1/31/95, so I can complete the agenda.
 
 Derrick Duehren
 ------------------------------------------------------------------------------
 XTG TPV Programs Manager, Intel Corp. |  
 Phone (503) 696-4299                  |  "Experience is not what happens to 
 Fax   (503) 696-4904                  |   you; it's what you do with what
 Derrick_Duehren@ccm.jf.intel.com      |   happens to you."
 5200 NE Elam Young Pkwy. JF1-97       |                     - Aldous Huxley
 Hillsboro, OR 97224                   |
 ------------------------------------------------------------------------------


From Will_Hobbs@ccm2.jf.intel.com  Sun Jan 29 00:24:31 1995
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From: Will Hobbs <Will_Hobbs@ccm2.jf.intel.com>
Message-Id: <950129001931_3@ccm.jf.intel.com>
To: Derrick_Duehren@ccm2.jf.intel.com, IBIS@vhdl.org
Subject: IBIS EIA Proposal, 2nd Draft


Text item: Text_1


          Derrick,

          A minor correction is needed in the Membership paragraph:

Membership is limited to representatives of dues-paying companies.

          > Members must participate in 51% of meetings in order to
          preserve their voting privileges. (This is required to
          ensure a voting quorum).


          Otherwise, well done, and thanks for going above and beyond
          the call of duty!

          Will

Text item: External Message Header

The following mail header is for administrative use
and may be ignored unless there are problems.

***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.

Subject: IBIS EIA Proposal, 2nd Draft
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