From owner-ibis Tue Apr 1 09:19:19 1997 Received: from bastion.tanner.com (bastion.tanner.com [204.240.46.10]) by vhdl.vhdl.org (8.8.5/8.8.3) with SMTP id JAA28414 for ; Tue, 1 Apr 1997 09:19:08 -0800 (PST) Received: from suntan1.tanner.com (unverified [192.100.143.1]) by bastion.tanner.com (EMWAC SMTPRS 0.83) with SMTP id ; Tue, 01 Apr 1997 09:19:10 -0800 Received: from peterpclt.tanner.com by suntan1.tanner.com (8.8.5/GPM/970211) with SMTP id JAA13868; Tue, 1 Apr 1997 09:16:38 -0800 (PST) Received: by peterpclt.tanner.com with Microsoft Mail id <01BC3E7D.69420620@peterpclt.tanner.com>; Tue, 1 Apr 1997 09:16:41 -0800 Message-ID: <01BC3E7D.69420620@peterpclt.tanner.com> From: Peter Parrish To: "'ibis@vhdl.org'" Cc: "'petertor@aol.com'" Subject: unsubscribe Date: Tue, 1 Apr 1997 09:16:40 -0800 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit unsubscribe From owner-ibis Tue Apr 1 10:59:18 1997 Received: from icx.com (root@fw.icx.com [205.238.6.33]) by vhdl.vhdl.org (8.8.5/8.8.3) with SMTP id KAA00150 for ; Tue, 1 Apr 1997 10:59:14 -0800 (PST) Received: by icx.com (/\oo/\ Smail3.1.29.1 #29.2) id ; Tue, 1 Apr 97 10:57 PST Received: by icx.com (/\==/\ Smail3.1.28.1 #28.14) id ; Tue, 1 Apr 97 10:57 PST Received: by icx.com (/\==/\ Smail3.1.28.1 #28.14) id ; Tue, 1 Apr 97 10:58 PST Message-Id: Date: Tue, 1 Apr 97 10:58 PST From: bob@icx.com ( Bob Ross) To: ibis@vhdl.org Subject: IBIS Minutes 3/28/97 DATE: April 1, 1997 SUBJECT: 3/28/97 EIA IBIS Open Forum Minutes VOTING MEMBERS AND 1997 PARTICIPANTS LIST: AMP Jeff Walden Applied Simulation Technology Dileep Divekar*, Norio Matsui Cadence Design C. Kumar, Don Telian Cypress Bruce Wenniger Digital Equipment Corp. Jeff Chu* Hewlett Packard, EEsof Karl Kachigan, Henry Wu HyperLynx Kellee Crisafulli INCASES Olaf Rethmeier Intel Corporation Stephen Peters*, Arpad Muranyi* Interconnectix Bob Ross* Mitsubushi Tam Cao Motorola Ahmed Omer National Semiconductor Syed Huq*, Cheng-Yang Kao, Mike Bristol, Peter Laflamme, Kevin Smith, NCR Dave Moxley*, Richard Mellitz NEC (Hiroshi Matsumoto) Quad Design/Viewlogic Jon Powell*, Chris Rokusek Quantic Laboratories (Mike Ventham) Texas Instruments Thomas Fisher Thomson-CSF/SCTF (Jean LeBrun) UniCAD Canada Ltd. (Celso Faia) Veribest Ian Dodd*, William Bell* VLSI Technology Harish Patel, D.C. Sessions, Zuken-Redac (John Berrie) OTHER PARTICIPANTS IN 1997: 3M Fran Hart Actel Scott Schlachter Acuson & Free Model Foundation Richard Munden Alcatel John Fitzpatrick Ansoft Eric Bogatin Apteq Design Systems Dan FitzPatrick Compaq Weston Beal EIA Patti Rusher* EMC Fabrizio Zanella Micron Technology Brian Johnson Molex Gus Panella North Carolina State U. (Michael Steer) S3, Inc. Porsh Shih, Sarathy Sribhashyam Ultratest International Charles Im Zeelan Technology George Opsahl In the list above, attendees at the meeting are indicated by *. Principal members or other active members who have not attended are in parentheses. Participants who no longer are in the organization are in square brackets. Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as follows: Date Bridge Number Reservation # Passcode 4/18/97 (916) 356-9200 1-137660 6974289 5/9/97 (916) 356-9200 1-137661 81111263 5/30/97 (916) 356-9200 1-137662 1259125 All meetings are 8:00 AM to 9:55 AM Pacific Time. We try to have agendas out 7 days before each open forum and meeting minutes out within 7 days after. When you call into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the reservation number and passcode. NOTE: "AR" = Action Required. -------------------------------- MINUTES ------------------------------------- INTRODUCTIONS AND MEETING QUORUM No new members. MEMBERSHIP UPDATE AND TREASURER'S REPORT Patti Rusher reported $10,129 in the EIA/IBIS account. Patti will work with Bob Ross concerning those members still owing payment. REVIEW OF MINUTES AND AR'S Bob Ross corrected Mike Bristol's name (from Brisbol) from National Semi- conductor in all of the 1997 minutes. MISCELLANY/ANNOUNCEMENTS Patti Rusher reported much discussion at the PCB West Design Conference EDA Face-to-Face Roundtable session concerning IBIS models and the need for more models. PRESS AND WEB PAGE UPDATES Bob Ross reported that IBIS was mentioned in "Digital-System Designers Meet EMI Challenges", Computer Design, March 1997, pp. 53-56. Bob also reported an article in EDN, March 14, 1997 by Tim Minnick and Hank Herrmann of AMP titled "Using Multiline Models in Dual- and Single- Point Grounding Configurations", pp. 93-100. NEW MODELS AVAILABLE, LIBRARY UPDATE Jon Powell updated the EIA/IBIS Model page with a new Quality Semiconductor link and new links to Texas Instruments and Cypress Semiconductor, both with many new models. Jon cautioned that the TI models have incomplete pinouts. Bob Ross reported that this is expected to be fixed. The new links for TI, Cypress, and Quality are: http://www.ti.com/sc/docs/asl/models/ibis.htm http://www.cypress.com/cypress/tech_sup/web_tech/ibis_top.html http://www.qualitysemi.com/main/device.html Syed Huq reports that National Semiconductor has released two Interface two IBIS models: 261v31tm.ibs (3.3V RS-422 Quad Differential Driver) and 261v32tm.ibs (3.3V RS-422 Quad Differential Receiver). These are available on the National model site. OPENS FOR NEW ISSUES None. DESIGN AUTOMATION CONFERENCE 1997 IBIS MEETING PLANNING Patti Rusher is scheduling a meeting room for the EIA/IBIS Summit meeting on Thursday, June 12, 1997. Jon Powell reported delivering the IBIS poster information. Patti stated that Jon was the only one who followed the instructions. INTERNATIONAL PROGRESS Patti Rusher stated that IBIS Version 2.1 ratification paperwork is going forward. EIA JAPAN I/O INTERFACE MODEL PROPOSAL Bob Ross gave a report on the joint EIA/IBIS and EIAJ working group meeting held Wednesday, March 19, 1997 in Santa Clara during the PCB West Design Conference. The purpose was for Electronic Industries Association of Japan (EIAJ) Project Group Chair Hideki Fukuda from Hitachi to present "Standard for I/O Interface Model", Draft Version 0.0. Bob reported that he also met privately Monday and Tuesday and supplied much IBIS information. The Wednesday meeting was attended by: Hideki Fukuda, Hitachi Bob Ross, Interconnectix Syed Huq, National Semiconductor Patti Rusher, EIA Dileep Divekar, Applied Simulation Technology (USA) Norio Matsui, Applied Simulation Technology C. Kumar, Cadence Deepak Mehta, Cadence Shinichi Maeda, KAW/USA Ian Dodd, Veribest David Wiens, Veribest Mike Venthan, Quantic Laboratories (Also briefly, Hilary Kahn, University of Manchester) Fukuda-san stated the purpose of the proposal was to provide a more detailed format for better accuracy and to leverage off the possibility of a unified Spice-compatible format so that IC suppliers would need to provide only one model. The proposal covered IC details with buffers and interconnections, package details, and module details. The buffers consisted of behavioral tables of one, two, or three dimensions. All interconnections were based on nodal descriptions with Spice-like formats. Model levels for Signal Integrity, Power Integrity, and EMI were proposed (no work has been done yet concerning shape definitions needed for EMI package and device descriptions). The proposal was positioned to do detailed analysis for validation beyond the initial design using IBIS models. At the meeting, it was suggested that the detailed models could also be used beforehand to validate the component operation and assumptions. The proposal showed that IBIS models could be created using the data in the I/O Interface Model. Fukuda-san had meetings with Avant! (Meta-Software) and Epic, and he reported encouragement privately to Bob. Stephen Peters asked about the schedule, and Bob Reported that Fukuda-san personally would like to see: Version 1.0 June 1997 Version 2.0 September 1997 Ratification by EIAJ December 1997 The action items were for EIA/IBIS to review again the nodal description (an agenda item below) and for the EIAJ Project Group to find out what IC vendors are committed to supplying models of the I/O Interface Model format. Patti Rusher suggested that EIAJ get in touch with Britt Brooks of the EIA Compact Model Council because they are also investigating behavioral models. Bob will follow up on this with Patti. Jon Powell asked if the model has been prototyped and tested. Bob reported no. Stephen was interested in more details concerning Avant!'s support. Ian Dodd introduced William Bell to discuss tabular data models for MOS devices in Spice. Bill stated that a VeriBest's internal version of Spice handles tabular data models well. The standard versions including BSIM levels 1, 2, and 3 from Berkeley are equation based. Level 3 is the simplest with about 20 parameters. It could be an accepted basis for a non-proprietary model that Jon felt that equation based models were best for interpreting the parasitics. He felt the tables were difficult to scale (even though scaling information was provided.) He was also concerned with what the models omitted and with how available the models would be. So a non-proprietary format such as BSIM 3 could be advantageous. Jon stated that there may be nothing gained by reinventing Spice. Ian stated that most transmission line simulators support IBIS. The standard Spice model syntax is supported in some simulators. Syed Huq pointed out that I/O Interface Model format was intended to handle problems (power integrity and EMI) that cannot be handled well using IBIS formatted models. AR - Patti Rusher forward information to contact Britt Brooks to Bob Ross and also forward the next meeting agenda [Done]. IBIS COOKBOOK PROGRESS Stephen Peters reported no further progress on an Intel internal version. He still is waiting for some waveform data. Bob Ross felt it might be useful to have some information on how to qualify good models since some public IBIS models need more work. Someone asked if it the cookbook should support Version 3.0 of IBIS, but Bob felt that limiting it to Version 2.1 was OK at this time to deal with some current interpretation issues. Syed Huq asked if the cook- book would be out by DAC97. Stephen said he would try to get it out by that time. ACCOUNTS ON EIA FOR SOURCE CODE DISTRIBUTION Bob Ross raised a question originally asked by Chris Rokusek whether an account could be set up on EIA for the member companies so that source code for parsers (such as ibischk2+) could more easily be distributed. Syed Huq commented on the logistics inconvenience of managing more accounts. After some discussion it was felt that e-mail distribution was preferred. FAQ UPDATE Syed Huq reported that some information needs to be updated in the FAQ section of the IBIS Home page. He will make some obvious corrections. He also requested people to look at the FAQs and propose changes and new questions. AR - Everyone review the FAQ's and provide suggestions to Syed Huq. S2IBIS2 ISSUES AND NT There have been reflector discussions regarding s2ibis2 aborting on certain example IV data spice deck runs using HSPICE. This problem was also appearing in the NT version being worked on by Veribest. Bob Ross felt this problem could be associated with the current version of HSPICE (h96) and heard that a small resistance in series with some nodes may fix the problem. PACKAGE COMMITTEE REPORT Stephen Peters reported that the committee discussed the EIAJ proposal. He also stated that committee activities were on hold waiting Jon Powell's connector model information. Jon had finally received all of the connector Spice model and matrix information, but his window-of-available-time to work on this had passed. He will pass along the information and his initial proposal to Stephen with the expectation that the connector model issue will be moved back to the IBIS Open Forum. BIRD36.2 ELECTRICAL DESCRIPTIONS OF BOARDS Stephen Peters has just updated BIRD36.2 and will issue BIRD36.3 with some editorial corrections (lower case for model files), Power and Gnd word case insensitivity clarifications, and Series element constraint that it be in the same net. He also stated that the L and R elements themselves can be used for series elements. Stephen mentioned that the electrical board description will not handle typ, min, and max cases per a comment by Dave Fogel. Separate board files would have to be created to analyze these corners. Dileep Divekar raised the issue concerning whether cross-talk analysis was necessary. Stephen responded that the full EDIF 4 0 0 would handle this. The electrical board description does not handle this. Responses on the reflector indicated that people really needed the electrical board description, even with out coupling information, since the alternative is to use lumped package models in IBIS to specify SIMMs and boards. The BIRD36.3 vote was deferred until the next meeting so that the changes can be reviewed. NODAL DESCRIPTION DISCUSSION Bob Ross introduced the Nodal description discussion as a follow-on to the EIAJ I/O Interface Model proposal discussion. Stephen Peters thought it would be appropriate for complex packages with mesh power and ground planes. An alternative is to use the mechanical data bases for analysis. Detailed transistor level IC's with Spice-like nodal based interconnections are quite useful to handle the ground and power noise interactions. Stephen questioned what problems are EIAJ trying to solve. Jon Powell stated that just defining new formats may not contribute to the problems we are currently solving. One suggestion was to have a standardized Spice interface regarding Spice formats (such as input, output, enable, and four power rails). Jon raised the issue concerning many nodes and their interactions if one "Vcc" supply is used for all buffers. He envisioned an extension to IBIS with a behavioral wrapper for Spice models. Jon felt that the Spice algorithms themselves were not mathematically stable, whereas the behavioral ones were guaranteed to be stable. Some vendors have Spice hooks within their products to do Spice simulation already. Bob mentioned that he will provide comments on syntax and on the node mapping structure (which seems to bypass the already existing subcircuit calling conventions. Jon wanted more detail concerning what algorithms are used to determine the time transition characteristics. He felt that the capacitance and other parasitics were important factors. Bob mentioned that simulators drive the transitions, whereas it appears that the stimuli are embedded in the I/O Interface Model. (However, they could be controlled externally in some manner.) Bob plans to communicate support of EIAJ continuing their approach since it can lead to future extensions of IBIS and also provide some solutions to problems which cannot be handled well using the current format. BIRD41.1 - MODELING SERIES SWITCHABLE DEVICES Bob Ross reported no progress on BIRD41.1 since he has not contacted John Fitzpatrick, the author. Arpad Muranyi questioned whether there were responses to Bob's comment concerning defining logical states in the IBIS format. Bob reported no comments. Bob will contact John to move forward on BIRD41.1. MODELING EARLY CLAMPS IN IBIS Arpad Muranyi reported no further work. Bob Ross indicated that he would like to have all of the BIRDs for Version 3.0 approved by the DAC meeting in June. We have only 3 meetings to go. Bob may assist on this proposal. NEXT MEETING: The next meeting is on Friday, April 18, 1997, 8:00 A.M. to 9:55 A.M. BIRD36.3 is scheduled for a vote. ============================================================================== NOTES IBIS CHAIR: Bob Ross (503) 603-2523, Fax (503) 639-3469 bob@icx.com Modeling Engineer, Interconnectix 10220 SW Nimbus Ave, K4, Portland, OR 97223 VICE CHAIR: Syed Huq (408) 721-4874, Fax: (408) 721-4785 huq@rockie.nsc.com Staff Applications Engineer, National Semiconductor, M/S A-2595 2900 Semiconductor Drive, Santa Clara, CA 95052 LIBRARIAN: Jon Powell (805) 988-8250, Fax: (805) 988-8259 jonp@qdt.com Transmission-Line Products Manager, Quad Design/Viewlogic 1385 Del Norte Rd., Camarillo, CA 93010 SECRETARY: Vacant This meeting was conducted in accordance with the EIA Legal Guides and EIA Manual of Organization and Procedure. The following e-mail addresses are used: ibis-request@vhdl.org To join, change, or drop from either the IBIS Open Forum Reflector (ibis@vhdl.org), the IBIS Users' Group Reflector (ibis-users@vhdl.org) or both. State your request. ibis-info@vhdl.org To obtain general information about IBIS, to ask specific questions for individual response, and to inquire about joining the EIA-IBIS Open Forum as a full Member. ibis@vhdl.org To send a message to the general IBIS Open Forum Reflector. This is used mostly for IBIS Standardization business and future IBIS technical enhancements. ibis-users@vhdl.org To send a message to the IBIS Users' Group Reflector. This is used mostly for IBIS clarification, current modeling issues, and general user concerns. ibischk-bug@vhdl.org To report ibischk2 parser bugs. The Bug Report Form Resides on vhdl.org in /pub/ibis/bugs/bugform.txt along with reported bugs. Information on IBIS technical contents, IBIS participants, and actual IBIS models are available on the IBIS Home page found by selecting the Electronic Information Group under: http://www.eia.org Check the pub/ibis directory on vhdl.org for more information on previous discussions and results. You can get on via ftp anonymous, or send an e-mail request to the automatic archive server, archive@vhdl.org. "IBIS Spoken Here" placards are available from Jon Powell (jonp@qdt.com) for use at trade shows. ============================================================================== From owner-ibis Mon Apr 7 09:09:41 1997 Received: from alcatel.fr (ns.alcatel.fr [194.133.58.131]) by vhdl.vhdl.org (8.8.5/8.8.3) with ESMTP id JAA21040 for ; Mon, 7 Apr 1997 09:09:35 -0700 (PDT) Received: from alcatel.fr (gatekeeper-ssn.alcatel.fr [155.132.180.244]) by mailgate.alcatel.fr (8.8.5/8.8.5) with ESMTP id TAA30012; Mon, 7 Apr 1997 19:12:23 +0200 Received: from ln.cit.alcatel.fr (las40304.ln.cit.alcatel.fr [155.132.225.2]) by nsfhh5.alcatel.fr (8.7.3/8.7.3) with SMTP id SAA04390; Mon, 7 Apr 1997 18:07:17 +0200 (METDST) Received: from las41247.ln.cit.alcatel.fr by ln.cit.alcatel.fr (4.1/SMI-4.1) id AA18932; Mon, 7 Apr 97 18:06:19 +0200 Received: from las41247 (localhost) by las41247.ln.cit.alcatel.fr (4.1/SMI-4.1) id AA00403; Mon, 7 Apr 97 18:05:47 +0200 Sender: fitzpat1@ln.cit.alcatel.fr Message-Id: <33491B5B.59E2B600@ln.cit.alcatel.fr> Date: Mon, 07 Apr 1997 18:05:47 +0200 From: John V Fitzpatrick Organization: Alcatel Telecom, Lannion, France X-Mailer: Mozilla 3.01Gold (X11; I; SunOS 4.1.3_U1 sun4m) Mime-Version: 1.0 To: ibis@vhdl.org Cc: bob@icx.com Subject: Re: BIRD41.1 Comments Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit To Bob Ross and IBIS Forum: Thanks to everyone (especially Bob) who contributed to the 41.1 debate in my absence. Below are my views on the different comments received. But first, a question: Will this Bird allow sufficient information be included in IBIS to build a good behavioural model for a FET switch? I've tried to build a model using PSpice, but have not fully succeeded (yet). In my opinion, no vote should be taken on 41.1 until at least one company (preferably a simulator company) confirms that it can build a model, and then publishes some simulation results on the reflector. I'll submit an up-to-date version of Bird 41 later in the week taking into account the comments received so far. Regards, John My comments on comments: > Keyword: [Series Pin Table] I like Bob's proposal (except for the trailing slashes - could they not be made optional?). Although I agree with Arpad that we risk putting too much "logic" into IBIS, might that not be a necessary risk? If buffers can be programmed by external pins, then why not say so in the IBIS model? example: [Buffer Modes] |Fnl_Group Mode control_pins 1 On 1 2 | by default, is Off for other combinations 2 On 1# 2 3 On 1 2# 4 On 1# 2# Hey, this looks like a truth table! But its scope is very limited - only buffers whose mode can be set by external pins. This would be a more compact solution than Bob's, and might be extendable to improve Bird 30.2. > 1. Is non-symmetrical operation really needed? It will lead to > problems in other areas. No, but what problems? It's important to define which side of the buffer is used to make the measurements. I'll drop the reference to non-symmetric devices. > 1. Just [Rseries], [Lseries], and [Cseries] are needed. The > proposed [R_c_series], [L_c_series] and [R_l_series] additions > are unnecessary. > All series elements should be allowed to be connected in > series, This is not sufficient. For example, there may be a parasitic capacitance in parallel with Rseries. (An alternative solution would be to adopt a Bird36-like notation). > 2. The [Series Impedance] table can also be connected in series. I disagree. The only element that could be put in series with [Series Impedance] is [Lseries]. With [Cseries], no DC measurements can be made. With [Rseries], there would be a risk of double counting. And what about a parallel parasitic capacitance? > 3. The [Series Impedance] table could be defined with a voltage > range of -Vcc to Vcc for closed switch operation or low > impedance, it could > also have a range from -2Vcc to 2Vcc for open operation. > So its range needs to be defined. I agree that the ranges need to be defined. -2Vcc to 2Vcc seems OK to me for the OFF state. However -Vcc to Vcc might be too much for the ON state. This is the same debate as for clamping diodes. Could we not limit the "measurements" to reasonable current values? > 4. R_load is not needed. I disagree. R_load is needed to properly characterize a FET switch. An interesting feature of these switches is that the series impedance increases as the "input" signal approaches the gate voltage level. I suggest that you need a Rload of at least 10 X "on-resistance" to be able to measure this. I'm open to alternative suggestions. But this is the only way I can see to reproduce the nice Vin. vs. Vout curves given in the bus-switch databooks. Perhaps we should explicitely define a series model called FET_switch? > 5. Also the Mode subparameter could be dropped. This could be > handled another way for actual switches. OK, I'll change the Bird to include the new suggestion. > 1. What does C_comp mean in a series model? > 3. Should the Series Pins be used for Differential terminations? The definitions of all existing passive elements remain unchanged. In the case of C_comp, it is a capacitance to ground, seen at the pin through which the measurements are made. Perhaps we should redine these passive (and parallel) elements, (except for R_pkg, C_pkg, L_pkg), to say that they are split 50-50 on each side of the series element. This would be better for differential terminations. > 2. Should a Series Pin be used to connect to a supply or > ground, as proposed above? I don't understand the question. > 4. Can several different series pin models be connected to the > same pin? Yes, if the series element is a switch. > Arpad Muranyi raised the issue whether BIRD41.1 should capture > the dynamic turn-on and turn-off characteristics of a switch. > Bob suggested that there > was sufficient complication already without this addition. It should be possible to reuse the rising and falling waveforms. But I agree there is no need for such an addition. -- John Fitzpatrick Alcatel Telecom, 4 rue de Broglie, 22304 Lannion, France Tel: +33(0)2.96.04.79.33 Fax: +33(0)2.96.04.85.09 From owner-ibis Tue Apr 8 18:55:08 1997 Received: from icx.com (root@fw.icx.com [205.238.6.33]) by vhdl.vhdl.org (8.8.5/8.8.3) with SMTP id SAA25368 for ; Tue, 8 Apr 1997 18:55:05 -0700 (PDT) Received: by icx.com (/\oo/\ Smail3.1.29.1 #29.2) id ; Tue, 8 Apr 97 18:53 PDT Received: by icx.com (/\==/\ Smail3.1.28.1 #28.14) id ; Tue, 8 Apr 97 18:53 PDT Received: by icx.com (/\==/\ Smail3.1.28.1 #28.14) id ; Tue, 8 Apr 97 18:54 PDT Message-Id: Date: Tue, 8 Apr 97 18:54 PDT From: bob@icx.com ( Bob Ross) To: John.Fitzpatrick@ln.cit.alcatel.fr, ibis@vhdl.org Subject: Re: BIRD41.1 Comments John and IBIS Committee: John, thanks for going over the commments in detail. You raise some questions which I do not have a answers for yet, and I am still thinking about some various alternatives - and learning more about the switch operation. I also think that a good, tested FET switch model is necessary for accurate simulation. I would accept a less than "perfect" model that would be suitable at a "reasonable" level of accuracy in a transmission line simulation enviroment. I will put my specific comments or questions in your comments. As you will see, I feel many issues are still open. Best Regards, Bob Ross Interconnectix > Date: Mon, 07 Apr 1997 18:05:47 +0200 > From: John V Fitzpatrick > To: ibis@vhdl.org > Cc: bob@icx.com > Subject: Re: BIRD41.1 Comments > To Bob Ross and IBIS Forum: > Thanks to everyone (especially Bob) who contributed to the > 41.1 debate in my absence. > Below are my views on the different comments received. > But first, a question: > Will this Bird allow sufficient information be > included in IBIS to build a good behavioural > model for a FET switch? > I've tried to build a model using PSpice, but have not > fully succeeded (yet). > In my opinion, no vote should be taken on 41.1 until at > least one company (preferably a simulator company) > confirms that it can build a model, and then publishes some > simulation results on the reflector. > I'll submit an up-to-date version of Bird 41 later in the week > taking into account the comments received so far. > Regards, > John > My comments on comments: > > > Keyword: [Series Pin Table] > I like Bob's proposal (except for the trailing slashes - could > they not be made optional?). I also do not like the trailing slashes, but the reason for them was to allow multiple lines, if necessary, to conform with the 80 characters/column limit. > Although I agree with Arpad that we risk putting too much "logic" > into IBIS, might that not be a necessary risk? If buffers can > be programmed by external pins, then why not say so in the > IBIS model? > example: > [Buffer Modes] > |Fnl_Group Mode control_pins > 1 On 1 2 | by default, is Off for other combinations > 2 On 1# 2 > 3 On 1 2# > 4 On 1# 2# > Hey, this looks like a truth table! > But its scope is very limited - only buffers whose mode > can be set by external pins. > This would be a more compact solution than Bob's, and > might be extendable to improve Bird 30.2. I have to think about your alternative "truth table" IBIS does not explicitly identify the control pins for any buffer, so the information could be any text string. One test is to try the syntax on a variety of switch parts. The objective of the table is to give one of several choices for switch settings of the complete part so that the choice can be selected via a simulator interface. The idea of letting all other settings by default be Off (or On if Off is defined) is good and makes the notation clearer. > > > 1. Is non-symmetrical operation really needed? It will lead to > > problems in other areas. > No, but what problems? The problems I was thinking of was with respect to decide which model direction you are going. Does a falling signal require a different model than a rising signal? I do not think this complication is necessary - especially if there is ringing at the switch. I think this all can be worked out with one model with bi-directional operation. > It's important to define which side of the buffer is used to > make the measurements. I'll drop the reference to > non-symmetric devices. > > > > 1. Just [Rseries], [Lseries], and [Cseries] are needed. The > > proposed [R_c_series], [L_c_series] and [R_l_series] additions > > are unnecessary. > > All series elements should be allowed to be connected in > > series, > This is not sufficient. For example, there may be a parasitic > capacitance in parallel with Rseries. I was thinking of a simpler approach without the generalized set of parallel/series constructs available with your proposal. Your more generalized set of elements actually looks attractive. However, I do not know if that is too much of a complication for many simulators. The [L_c_series]-requires-an-[L_series] rule initially looked like an unnecessary complication to me, but I now see the logic of what you did and your intentions. > (An alternative solution would be to adopt a Bird36-like notation). Probably not as good a solution. > > > 2. The [Series Impedance] table can also be connected in series. > I disagree. > The only element that could be put in series with [Series Impedance] > is [Lseries]. With [Cseries], no DC measurements can be made. > With [Rseries], there would be a risk of double counting. > And what about a parallel parasitic capacitance? There are two ways to view the [Series Impedance] table. The proposed way is a VI curve. If both the I and V are defined as ACROSS the device (such as with a series diode) then most anything could be put in series - even a capacitor. (The DC bias conditions would be handled on each side of the capacitor.) For a series FET, the "resistance" (or the VI table) is a function of the minimum of the input or output voltage with respect to the control Gate. So a new "[Series FET Impedance]" could be a resistance as a function of a calculate minimum voltage (calculation may be done by iteration). One complication with this approach is that if [Rseries] is defined, it is important which side of the switch the [Rseries] is put. The same would theoretically apply for an [Lseries]. So perhaps, no other Series element should be allowed for a "[Series FET Impedance]", as you suggested. > > > 3. The [Series Impedance] table could be defined with a voltage > > range of -Vcc to Vcc for closed switch operation or low > > impedance, it could > > also have a range from -2Vcc to 2Vcc for open operation. > > So its range needs to be defined. > I agree that the ranges need to be defined. -2Vcc to 2Vcc seems > OK to me for the OFF state. However -Vcc to Vcc might be > too much for the ON state. This is the same debate as for > clamping diodes. > Could we not limit the "measurements" to reasonable current values? > Here I am thinking of voltage across the switch. I do not know if this is the correct way to look at the switch. The extremes of the range could be satisfied by linear extrapolation. I still do not know the best answer. > > > 4. R_load is not needed. > I disagree. > R_load is needed to properly characterize a FET switch. > An interesting feature of these switches is that the > series impedance increases as the "input" signal > approaches the gate voltage level. I suggest that you > need a Rload of at least 10 X "on-resistance" to be > able to measure this. > I'm open to alternative suggestions. But this is the > only way I can see to reproduce the nice Vin. vs. Vout > curves given in the bus-switch databooks. > Perhaps we should explicitely define a series model > called FET_switch? The R_load issue relate to the previously mentioned problem that the switch characteristics from input to output relate to the Gate-to-minimum-(Drain or Source)-voltage. The R_load may be one way of parameterizing this relationship, but I do not know how to use it for actual simulation. I think there are better ways to describe this. I was thinking of just R as a function of input voltage as one way for the purposes of providing an adequate model. Maybe a set of IV tables is necessary where V is the voltage across the device (both directions), and the set is a function of minimum fixed Source or Drain voltage. > > > 5. Also the Mode subparameter could be dropped. This could be > > handled another way for actual switches. > OK, I'll change the Bird to include the new suggestion. > > > > 1. What does C_comp mean in a series model? > > 3. Should the Series Pins be used for Differential terminations? > The definitions of all existing passive elements remain unchanged. > In the case of C_comp, it is a capacitance to ground, seen at the > pin through which the measurements are made. > Perhaps we should redine these passive (and parallel) elements, > (except for R_pkg, C_pkg, L_pkg), > to say that they are split 50-50 on each side of the series > element. > This would be better for differential terminations. Since the package elements would apply fully to each pin of a two-pin device, they should not be split, in my opinion. > > 2. Should a Series Pin be used to connect to a supply or > > ground, as proposed above? > I don't understand the question. This is only a possibility (and possible complication). There is no reason why either the input or output pin of a series element cannot be attached to a supply. This voltage could be identified. An R-pack consisting of, say, a set of 50 ohm resistors could have any resistor attached in series to a net or as part of a pullup or pulldown termination. So I just raised the question. One sample (the CBT6800Precharge) model used the switch capability of a switch attacted to a bias voltage pin 13, as an example of an extension for a minor precharge path that switches in when the signal switch path switches out. Another configuration of a series switch would be to connect pins of different networks for differental operation. This is another practical possibility. > > > 4. Can several different series pin models be connected to the > > same pin? > Yes, if the series element is a switch. This is what I assumed in Cross-over and precharge cases. > > > Arpad Muranyi raised the issue whether BIRD41.1 should capture > > the dynamic turn-on and turn-off characteristics of a switch. > > Bob suggested that there > > was sufficient complication already without this addition. > It should be possible to reuse the rising and falling waveforms. > But I agree there is no need for such an addition. > I have not ruled this out, especially if there is a simple practical application for a dynamic adjustment. However, there are some more fundamental questions to address. > -- > John Fitzpatrick > Alcatel Telecom, 4 rue de Broglie, 22304 Lannion, France > Tel: +33(0)2.96.04.79.33 Fax: +33(0)2.96.04.85.09 From owner-ibis Fri Apr 11 15:32:38 1997 Received: from icx.com (root@fw.icx.com [205.238.6.33]) by vhdl.vhdl.org (8.8.5/8.8.3) with SMTP id PAA05378 for ; Fri, 11 Apr 1997 15:32:36 -0700 (PDT) Received: by icx.com (/\oo/\ Smail3.1.29.1 #29.2) id ; Fri, 11 Apr 97 15:30 PDT Received: by icx.com (/\==/\ Smail3.1.28.1 #28.14) id ; Fri, 11 Apr 97 15:30 PDT Received: by icx.com (/\==/\ Smail3.1.28.1 #28.14) id ; Fri, 11 Apr 97 15:31 PDT Message-Id: Date: Fri, 11 Apr 97 15:31 PDT From: bob@icx.com ( Bob Ross) To: ibis@vhdl.org Subject: IBIS Meeting Agenda 4/18/97 IBIS Open Forum Meeting Agenda for 4/18/97 Bridge Number Reservation # Passcode (916) 356-9200 1-137660 6974289 All meetings are 8:00 AM to 9:55 AM Pacific Time. When you call into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the Reservation Number and Passcode. 8:00 Check-In, Intros, Announcements Ross - Intros of New IBIS Participants, Meeting Quorum Ross - Membership Update and Treasurers Report Rusher - Review of Previous Meeting's Minutes (and ARs) Ross - Miscellany/Announcements All - Press & Web Page Updates Huq, All - New Models Available, Library Update Powell, All - Opens for New Issues All 8:25 Administrative and Project Discussions DAC97 IBIS Meeting Planning Rusher International Progress Rusher/Ross Cookbook Rokusek/Peters FAQ Update Huq s2ibis2 Issues (& NT) Dodd New Administrative Issues All 8:50 Technical Discussion BIRD36.3 - ELECTRICAL DESCRIPTIONS OF BOARDS (Vote) Peters Connector Status Peters BIRD41.1 - MODELING SERIES SWITCHABLE DEVICES Fitzpatrick Switched Terminators Muranyi New Technical Issues All 9:50 Wrap Up and Next Meetings Plans Ross 9:55 Sign Off From owner-ibis Tue Apr 15 08:16:15 1997 Received: from gatekeep.ti.com (news.ti.com [192.94.94.33]) by vhdl.vhdl.org (8.8.5/8.8.3) with ESMTP id IAA00960 for ; Tue, 15 Apr 1997 08:16:12 -0700 (PDT) Received: from alfred.itg.ti.com ([192.168.43.15]) by gatekeep.ti.com (8.8.5) with ESMTP id KAA05723 for ; Tue, 15 Apr 1997 10:13:38 -0500 (CDT) Received: from itg.ti.com (magic.itg.ti.com [172.25.2.76]) by alfred.itg.ti.com (8.8.5/8.8.5) with SMTP id KAA24726 for ; Tue, 15 Apr 1997 10:13:36 -0500 (CDT) Received: from dadsparc4.india.ti.com by itg.ti.com (4.1/ITG-1.1) id AA29553; Tue, 15 Apr 97 10:13:31 CDT Received: from holmes.india.ti.com (holmes.india.ti.com [134.183.191.57]) by dadsparc4.india.ti.com (8.6.12/8.6.10) with ESMTP id UAA20528 for ; Tue, 15 Apr 1997 20:39:56 +0530 Received: (from aargee@localhost) by holmes.india.ti.com (8.6.12/8.6.10) id KAA26750; Tue, 15 Apr 1997 10:14:54 -0500 Date: Tue, 15 Apr 1997 10:14:54 -0500 Message-Id: <199704151514.KAA26750@holmes.india.ti.com> From: Geetha R Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit To: ibis@vhdl.org Subject: unsubscribe X-Mailer: VM 6.22 under 19.15 XEmacs Lucid unsubscribe From owner-ibis Thu Apr 17 10:26:02 1997 Received: from alcatel.fr (news.alcatel.fr [194.133.58.131]) by vhdl.vhdl.org (8.8.5/8.8.3) with ESMTP id KAA01401 for ; Thu, 17 Apr 1997 10:25:49 -0700 (PDT) Received: from alcatel.fr (gatekeeper-ssn.alcatel.fr [155.132.180.244]) by mailgate.alcatel.fr (8.8.5/8.8.5) with ESMTP id TAA26696 for ; Thu, 17 Apr 1997 19:22:04 +0200 Received: from ln.cit.alcatel.fr (las40304.ln.cit.alcatel.fr [155.132.225.2]) by nsfhh5.alcatel.fr (8.7.3/8.7.3) with SMTP id TAA25525 for ; Thu, 17 Apr 1997 19:22:10 +0200 (METDST) Received: from las41247.ln.cit.alcatel.fr by ln.cit.alcatel.fr (4.1/SMI-4.1) id AA08717; Thu, 17 Apr 97 19:21:39 +0200 Received: from las41247 (localhost) by las41247.ln.cit.alcatel.fr (4.1/SMI-4.1) id AA01295; Thu, 17 Apr 97 19:21:08 +0200 Sender: fitzpat1@ln.cit.alcatel.fr Message-Id: <33565C03.2781E494@ln.cit.alcatel.fr> Date: Thu, 17 Apr 1997 19:21:07 +0200 From: John V Fitzpatrick Organization: Alcatel Telecom, Lannion, France X-Mailer: Mozilla 3.01Gold (X11; I; SunOS 4.1.3_U1 sun4m) Mime-Version: 1.0 To: ibis@vhdl.org Subject: Bird 41 Content-Type: multipart/mixed; boundary="------------446B9B3D794BDF3215FB7483" This is a multi-part message in MIME format. --------------446B9B3D794BDF3215FB7483 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Hello all, Work on Bird 41 has been very slow. With the notable exception of Bob's comments, there's not much to report. Since the last mail, no simulator company has replied to say that Bird 41 contains enough information to model a bus-switch. A while ago, I tried my hand at figuring out a behavioral model for a FET switch. I didn't get far. But for what it's worth, I've shoved some screenshots into a file, included below. Regards, John -- John Fitzpatrick Alcatel Telecom, 4 rue de Broglie, 22304 Lannion, France Tel: +33(0)2.96.04.79.33 Fax: +33(0)2.96.04.85.09 --------------446B9B3D794BDF3215FB7483 Content-Type: application/pdf; name="bird.pdf" Content-Transfer-Encoding: base64 Content-Disposition: inline; filename="bird.pdf" JVBERi0xLjIgDQol4uPP0w0KIA0KMTAgMCBvYmoNCjw8DQovTGVuZ3RoIDExIDAgUg0KL0Zp bHRlciAvTFpXRGVjb2RlIA0KPj4NCnN0cmVhbQ0KgBCKgNBQyGw3Fw4GggG42GIuGoyEAgKh EggwEEYjByM4gggvI0YGIwFwwHETKhmi8lGAzGcoMcZlB3EAoJJuOhyN5kOpjOhpN5uFMUNU EFoxHMIGELFoyGYuGUnihEEEgGIgkclqUplYwGA1G8wjMsGI1mc1IhhOhlHUTrA3FtLFtJoZ UooKjFNp9LlFUkleGkvikxv4wGQ5s4oIJ1OhoN5ytpKN5oNwgIxpOh6OFqORpMZrut3Kgqsd eGtXwelw2oKk0FBTOpiNRln1t2BiNppOZzoGVM2PEBJIRJKYgtZs2lBMxlORlNxjMogoNYHF xGlzsPNEHDKVUGkPGOhi4gFozGkQG191Q0reElgyhcU1xUNG6EBkN5jOpt5x0EA0DCOYQDEM rnBAOzmDyEA4jqzw1jZBQ4MY4w3jOMrGuY6TKjCig0DqOQ5jIMMFDLBA3DSNyOxQyw5DC54y hY/43jhFCOsatTxLw8gYoeiL1MKGjENSwqnMSOAyxm5AQRXDAQCmOi1DLAQ7jSNg2P+MMEOM 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MDIxMjM5IDAwMDAwIG4NCjAwMDAwMzgwNTIgMDAwMDAgbg0KMDAwMDAyMTAwNyAwMDAwMCBu DQowMDAwMDIxMjE2IDAwMDAwIG4NCjAwMDAwMzkxMzEgMDAwMDAgbg0KMDAwMDAzOTE1NCAw MDAwMCBuDQowMDAwMDM5MjQ1IDAwMDAwIG4NCnRyYWlsZXINCjw8DQovU2l6ZSA0MQ0KL1Jv b3QgMyAwIFINCi9JbmZvIDEgMCBSDQovSUQgWzxlNTU1YTQxY2FiODVjNmNlNWY1MTRhMzc5 MzNmNTJmOT48ZTU1NWE0MWNhYjg1YzZjZTVmNTE0YTM3OTMzZjUyZjk+XQ0KPj4NCnN0YXJ0 eHJlZg0KNDgyMjgNCiUlRU9GDQo= --------------446B9B3D794BDF3215FB7483-- From owner-ibis Mon Apr 21 11:01:13 1997 Received: from icx.com (root@fw.icx.com [205.238.6.33]) by vhdl.vhdl.org (8.8.5/8.8.3) with SMTP id LAA29177 for ; Mon, 21 Apr 1997 11:01:09 -0700 (PDT) Received: by icx.com (/\oo/\ Smail3.1.29.1 #29.2) id ; Mon, 21 Apr 97 10:59 PDT Received: by icx.com (/\==/\ Smail3.1.28.1 #28.14) id ; Mon, 21 Apr 97 10:59 PDT Received: by icx.com (/\==/\ Smail3.1.28.1 #28.14) id ; Mon, 21 Apr 97 10:58 PDT Message-Id: Date: Mon, 21 Apr 97 10:58 PDT From: bob@icx.com ( Bob Ross) To: ibis@vhdl.org Subject: IBIS Minutes 4/18/97 DATE: April 21, 1997 SUBJECT: 4/18/97 EIA IBIS Open Forum Minutes VOTING MEMBERS AND 1997 PARTICIPANTS LIST: AMP Jeff Walden Applied Simulation Technology Dileep Divekar, Norio Matsui, Raj Raghuram* Cadence Design C. Kumar, Don Telian Cypress Bruce Wenniger Digital Equipment Corp. Jeff Chu Hewlett Packard, EEsof Karl Kachigan, Henry Wu High Design Technology (Razvan Ene) HyperLynx Kellee Crisafulli INCASES Olaf Rethmeier* Intel Corporation Stephen Peters*, Arpad Muranyi* Interconnectix Bob Ross* Mitsubushi Tam Cao Motorola Ahmed Omer National Semiconductor Syed Huq*, Cheng-Yang Kao, Mike Bristol, Peter Laflamme, Kevin Smith, NCR Dave Moxley*, Richard Mellitz NEC (Hiroshi Matsumoto) Quad Design/Viewlogic Jon Powell, Chris Rokusek Quantic EMC (Mike Ventham) Texas Instruments Thomas Fisher Thomson-CSF/SCTF (Jean LeBrun) UniCAD Canada Ltd. (Celso Faia) VeriBest Ian Dodd*, William Bell VLSI Technology Harish Patel, D.C. Sessions, Zuken-Redac (John Berrie) OTHER PARTICIPANTS IN 1997: 3M Fran Hart Actel Scott Schlachter Acuson & Free Model Foundation Richard Munden Alcatel John Fitzpatrick* Ansoft Eric Bogatin Apteq Design Systems Dan FitzPatrick Compaq Weston Beal EIA Patti Rusher EMC Fabrizio Zanella Micron Technology Brian Johnson Molex Gus Panella North Carolina State U. (Michael Steer) S3, Inc. Porsh Shih, Sarathy Sribhashyam Ultratest International Charles Im Zeelan Technology George Opsahl In the list above, attendees at the meeting are indicated by *. Principal members or other active members who have not attended are in parentheses. Participants who no longer are in the organization are in square brackets. Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as follows: Date Bridge Number Reservation # Passcode 5/9/97 (916) 356-9200 1-137661 81111263 5/30/97 (916) 356-9200 1-137662 1259125 All meetings are 8:00 AM to 9:55 AM Pacific Time. We try to have agendas out 7 days before each open forum and meeting minutes out within 7 days after. When you call into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the reservation number and passcode. NOTE: "AR" = Action Required. -------------------------------- MINUTES ------------------------------------- INTRODUCTIONS AND MEETING QUORUM Raj Raghuram of Applied Simulation Technology called in for Dileep Divekar. MEMBERSHIP UPDATE AND TREASURER'S REPORT Bob Ross reported that High Design Technology in Italy has become a full EIA/IBIS Open Forum member and has also purchased the source code license for ibischk2. Bob Ross reported that he had not received any update from the previously reported figure of $10,129 in the EIA/IBIS account. REVIEW OF MINUTES AND AR'S Mike Ventham's name and company Quantic EMC, Inc. were corrected in the list of EIA/IBIS and EIAJ meeting participants. MISCELLANY/ANNOUNCEMENTS Bob Ross will prepare and present a 2 hour IBIS Modeling Workshop at PCB EAST in Boston in September 17, 1997. PRESS AND WEB PAGE UPDATES Bob Ross reported that IBIS was mentioned in "PC-Board Designers Insist on Standards", EE Times, April 7 1997, p. 45. IBIS was also mentioned in "CPLD Complexity Raises Package-selection Issues", Computer Design, April 1997, pp. 14-18. Bob also talked to an editor and there may be a small IBIS update in a future issue of Computer Design. NEW MODELS AVAILABLE, LIBRARY UPDATE Bob Ross reported that Zeelan Technology now offers a large library of IBIS models. Their home page is at: http://www.zeelan.com Duet Technologies adds IBIS model development to their services. Information is at: http://www.deuttech.com/ibis.html Bob also noted that Texas Instruments provides IBIS models that are on their Web site on the CD ROM "Logic Selection Guide and Databook". (They may not be available through the interface, but are accessible directly from the disk). OPENS FOR NEW ISSUES None. DESIGN AUTOMATION CONFERENCE 1997 IBIS MEETING PLANNING Bob Ross reported that Patti Rusher plans to schedule a meeting room for the EIA/IBIS Summit meeting on Thursday, June 12, 1997 in Anaheim, California. The topics should hopefully be a business meeting leading to IBIS Version 3.0 ratification and also election of new IBIS officers. A conference call line will be available during the morning business session. There should also be time for presentations. Bob asked Syed Huq to handle the agenda and presentation details. Syed will send out a request for presentations. INTERNATIONAL PROGRESS No report on IBIS Version 2.1 international ratification. Bob Ross indicated that the EIAJ working group met with the package committee group. IBIS COOKBOOK PROGRESS Stephen Peters reported only slight progress. FAQ UPDATE Syed Huq reported that he did not receive any information for updating the FAQ section of the IBIS Home page. Bob Ross had looked at the FAQs and noted some obvious corrections including deleting references to e-mail and modem access to vhdl.org and making some address corrections. Syed wanted to include some s2ibis FAQs. Bob noted that the s2ibis Version 1.3 contained some FAQs, and Syed should start with these. There are no FAQs for s2ibis2. Ian Dodd stated that VeriBest has some FAQs which he would be willing to make public. However, they contain references to some copyrighted Spice models. If he receives permission, he would make the FAQs publicly available. AR - Everyone review the FAQ's and e-mail suggestions to Syed Huq. S2IBIS2 ISSUES AND NT Ian Dodd reported that they had been working with an earlier version and got a newer version. The most recent version contains some of the fixes to their previous problems. However, they still need to change some code since a Microsoft compiler handles certain constructs related to file locking differently than a UNIX compiler. Regarding s2ibis2, VeriBest would like to have more testing done before releasing it. Bob Ross suggested that when they are ready to release the source code, it could be stored on vhdl.org or at the VeriBest site. Bob also mentioned that he communicated an extrapolation difference and a resolution (number of digits) printout problem to NCSU between s2ibis and s2ibis2. The resolution problem can cause as much as a 10% jump in data from, say, 0.10 to 0.11. Ian Dodd stated that their version of s2ibis offers an engineering notation option that gets around this. Arpad Muranyi uses scientific notation with plenty of digits in his utility. BIRD36.3 ELECTRICAL DESCRIPTIONS OF BOARDS Stephen Peters called for a vote on BIRD36.3 which has been out for several weeks. There was no further discussion. BIRD36.3 was approved unanimously with Applied Simulation Technology abstaining. CONNECTOR MODELING Stephen Peters has received information from Jon Powell. Jon did not have time to do some data comparison tests. Arpad Muranyi asked if the nodal issue had been resolved and Stephen responded that there had been some general agreement regarding a matrix format that included an efficient data storage method for large matrices. The fundamental decision made at the January meeting was to separate the electrical board description (BIRD36.3) and the connector model format description. Bob Ross suggested generating a proposal. This proposal should not delay ratification of IBIS Version 3.0 since the connector model format can be handled by an independent file. AR - Bob Ross work with Stephen Peters to generate a BIRD. BIRD41.1 - MODELING SERIES SWITCHABLE DEVICES John Fitzpatrick started the discussion by raising the question of whether enough electrical information was given to model bus switches. He had done some preliminary work and sent out some .pdf files (large, binary files are often delayed in transmission and may be corrupted by different operating systems). Bob Ross and John discussed options and formats for switch tables as a function of R_load or other parameters. John sees the need for such a subparameter; Bob would like to avoid that detail or to have multiple tables. This issue is not yet resolved. Bob, John, and Arpad Muranyi also discussed IV and Resistance-V formats and possible interpolation differences. Stephen Peters asked how different gate voltages would be handled, and Bob suggested using the min and max columns for worst case (highest resistance) and best case (lowest resistance) cases. (This would cover tolerance situations, but not bias changes in the gate voltage.) Bob also mentioned one series switch application of using the dynamic resistance to transform 5 V level logic to 3.3 V inputs. John asked if there were equations that could be fitted, and Arpad suggested the standard FET equations (for both the linear and saturated regions). Bob wanted clarification that the [Series Impedance] keyword considered series diodes separately. Johns clarified that this was already covered in BIRD41.1 using the same table with an R_load of 0 ohms to create and IV curve as a function of voltage across the series diode. There was some discussion, regarding the "Impedance" syntax for IV tables. Discrete series elements (R_series, L_series, C_series, C_r_series, L_r_series, and L_c_series) were discussed. Initially Bob favored fewer elements cascaded in series, but saw the benefits of a more generalized topology which allowed the series block to have three parallel paths. This would allow a series connection of a parallel RC or LR network, or some more general configurations. Bob was concerned with whether the simulator vendors would support the more generalized topology. John will keep it in the proposal. John proposed using a State table as a function of control pin settings and questioned if this is more useful for simulators. Bob felt that simulators do not process logic and therefore would not use these additions. These pins could still be documented using comment statements. John will use Bob's alternative proposal. Bob suggested modifying it so that the "Off" States would not be required if the "On" States were given, and visa-versa, to simplify and make more readable the State choices. John mentioned the measurement range considerations, but this discussion was deferred. Bob and John discussed whether lumped components could be used in series with the table components. After some discussion, they agreed it was simpler to restrict the combined usage. John would like to try out Spice models of the switch, and Bob suggested that the TI Spice models which John already has should contain the CBT technology. AR - John Fitzpatrick take into account the above comments and issue BIRD41.2 for further discussion. MODELING EARLY CLAMPS IN IBIS Arpad Muranyi reported no further work. NEXT MEETING: The next meeting is on Friday, May 9, 1997, 8:00 A.M. to 9:55 A.M. ============================================================================== NOTES IBIS CHAIR: Bob Ross (503) 603-2523, Fax (503) 639-3469 bob@icx.com Modeling Engineer, Interconnectix 10220 SW Nimbus Ave, K4, Portland, OR 97223 VICE CHAIR: Syed Huq (408) 721-4874, Fax: (408) 721-4785 huq@rockie.nsc.com Staff Applications Engineer, National Semiconductor, M/S A-2595 2900 Semiconductor Drive, Santa Clara, CA 95052 LIBRARIAN: Jon Powell (805) 988-8250, Fax: (805) 988-8259 jonp@qdt.com Transmission-Line Products Manager, Quad Design/Viewlogic 1385 Del Norte Rd., Camarillo, CA 93010 SECRETARY: Vacant This meeting was conducted in accordance with the EIA Legal Guides and EIA Manual of Organization and Procedure. The following e-mail addresses are used: ibis-request@vhdl.org To join, change, or drop from either the IBIS Open Forum Reflector (ibis@vhdl.org), the IBIS Users' Group Reflector (ibis-users@vhdl.org) or both. State your request. ibis-info@vhdl.org To obtain general information about IBIS, to ask specific questions for individual response, and to inquire about joining the EIA-IBIS Open Forum as a full Member. ibis@vhdl.org To send a message to the general IBIS Open Forum Reflector. This is used mostly for IBIS Standardization business and future IBIS technical enhancements. ibis-users@vhdl.org To send a message to the IBIS Users' Group Reflector. This is used mostly for IBIS clarification, current modeling issues, and general user concerns. ibischk-bug@vhdl.org To report ibischk2 parser bugs. The Bug Report Form Resides on vhdl.org in /pub/ibis/bugs/bugform.txt along with reported bugs. Information on IBIS technical contents, IBIS participants, and actual IBIS models are available on the IBIS Home page found by selecting the Electronic Information Group under: http://www.eia.org Check the pub/ibis directory on vhdl.org for more information on previous discussions and results. You can get on via ftp anonymous, or send an e-mail request to the automatic archive server, archive@vhdl.org. "IBIS Spoken Here" placards are available from Jon Powell (jonp@qdt.com) for use at trade shows. ============================================================================== From owner-ibis Tue Apr 29 18:10:14 1997 Received: from icx.com (root@fw.icx.com [205.238.6.33]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id SAA12544 for ; Tue, 29 Apr 1997 18:10:11 -0700 (PDT) Received: by icx.com (/\oo/\ Smail3.1.29.1 #29.2) id ; Tue, 29 Apr 97 18:09 PDT Received: by icx.com (/\==/\ Smail3.1.28.1 #28.14) id ; Tue, 29 Apr 97 18:09 PDT Received: by icx.com (/\==/\ Smail3.1.28.1 #28.14) id ; Tue, 29 Apr 97 18:09 PDT Message-Id: Date: Tue, 29 Apr 97 18:09 PDT From: bob@icx.com ( Bob Ross) To: FYT46205@pcvan.or.jp, ibis@vhdl.org Subject: IBIS Version 2.1 Terminology Suggestions Cc: alanrw@cs.man.ac.uk, fukuda@hitachi-mc.co.jp Ogawa-san: Thank you for going over in detail IBIS Version 2.1. You have revealed some inconsistent usages of words in the text. Per you permission, I am sending your comments to the IBIS reflector for information. I have also given my suggestions along with your suggestions in the column "Bob". I encourage anyone else who is interested to help us resolve some of these terms. Some major inconsistencies are related to using "part", "device", and "component"; "manufacturer", "silicon vendor", and "semiconductor vendor"; and "pin name" and "pin number". I have also copied the response I gave you for the first three comments: Thank you very much for you input and suggested clarifications regarding IBIS. Your review is extremely valuable to us because I and others are too familar with IBIS to catch the details you have presented. I will review each of your text comments and get back with you with a detailed response. Regarding your [Notes] comment, you are correct to note that IBIS does not have any statement that restricts the location of [Notes]. There is an IMPLIED (but UNSTATED) organization that the keywords above the first [Component] keyword should appear before [Component]. IBIS did not break out the "header" keywords in the text. There are other problems as well - IBIS does not specify whether any of these can appear more than once (it would be meaningless for [Date], as an example). We actually had to modify the parser to allow two [Disclaimer]s because it was inadvertantly entered twice on some stored, acceptable models. I hope there is some correction in IBIS. Regarding the "GND" pin, you have discovered a problem. Thank you for reporting this. Someone else also reported this problem late last year (it also applies to the "nc", "na", and "power" reserved words). Furthermore, we discovered that this problem also had existed in the orginal ibis_chk for Version 1.1 of IBIS. We have decided that this is a MISTAKE in both ibis_chk and ibis_chk2, but also decided not to fix it in these parsers. Rather, we plan to make the correction as part of the ibischk3 parser development project to be used with the future IBIS Version 3.0. I was not able to locate the [Temperature] keyword problem. Upon review, I can see some historically based lack of clarity. The intention is that the DEFAULT assumed settings (and measurement or Spice extraction conditions) for CMOS is typ 50 deg, min 100 deg, and max 0 deg. BIPOLAR technology assumes typ 50 deg, min 0 deg, and max 100 deg. I have to review and think about each of your suggested text changes and give you a detailed response later. I will try to do this within one week. Some of your suggestions seem very reasonable to me at this time (for example, to change all references of "part" to "component"). In other cases, there may be some differences in context (e.g., and actual "pin" and the reference to its "pin name"). There also may be some English implications that may not be apparent to you. However, it is very useful for me to examine in detail EACH of you suggestions, because you have really revealed some inconsistencies or needless usage of an alternative word. Thank you very much. Best Regards, Bob Ross Interconnectix Date: Thu, 24 Apr 1997 18:58:30 +0900 From: =?ISO-2022-JP?B?GyRCPi5AbiEhRkY7VhsoQg==?= To: bob@icx.com Subject: about_IBIS_V21 Hallow Mr. Bobb Ross This is first e-mail to you. My name is Atsushi Ogawa, belong to Memory Engineering Department Semiconductor Solution Engineering Division of NEC Corporation. My mission is technical user support. We distributing some IBIS models. But starting time( about one year ago ), obtained IBIS file was .ppt/.xls file! (Naturally my section converted it into .ibs file with handmade.) Several of modeling engineer is a little increases currently. Recently, I may look some illegal .ibs files. ex. [Notes] keyword is used after [Component] keyword. (This case was rejected by parser program.) "GND","VCC" were used as pin name in [Pin] section. ("GND" was rejected by parser program.) [Pin] signal_name model_name R_pin L_pin C_pin IO Io1 Buffer1 AJ In2 Input2 GND GND GND GND1 GND GND GND2 GND GND VCC1 VCC POWER | [Temperature] keyword of CMOS device becomes typ:50 , min:0 , max:100. To solve these problems, I just started a translation into Japanese of IBIS Ver.2.1 Spec. now. Because I discovered lack of unity of expression, I show it in the following. I feel it wonderful if have you examine these at the time of next version up. Line Current Own idea Bob (I prefer to use "pin name" because of its usage for pin grid array pin designation.) 258 pins and signal names pin numbers and signal names pin names and signal names 261 pin name pin number pin name 1207 pin name pin number pin name 1209 pin name pin number pin name 1458 pin name pin number pin name 8 place pin number pin number pin name 8 place [Pin Numbers] [Pin Numbers] agree (I agree, except where noted. I have added a change.) 4 integrated circuit integrated circuit agree 208 integrated circuit integrated circuit agree 6 place [Component] [Component] agree 25 component component agree 113 component component agree 201 component component agree 210 component component agree 212 Component Name component component name 223 components manufacturer silicon vendor manufacturer's name 223 Manufacturer's Name manufacturer's name 235 component component agree 257 component component agree 260 component component agree 564 component component agree 711 into the component into the component agree 737 component component agree (I like your suggestion to elimnate "device". However, I would substitue "model" EXCEPT when it refers to the PHYSICAL device versus a model for it (such as real device measurement versus extraction from a Spice model) 694 TTL and CMOS device TTL and CMOS component TTL and CMOS models 695 device component model 706 device [Model] model 748 ECL device ECL component ECL models 874 device [Model] model 1629 weak device weak component weak device 1630 strong device strong component strong device 1633 typical device typical component typical device 1656 bipolar device bipolar component bipolar device 1657 CMOS device CMOS component CMOS device 1731 ECL type device ECL type component ECL type device 1756 packaged device packaged component packaged device (I agree to eliminate "part".) 318 part component component 1098 part component component 1163 part component components(s) 1702 part component device 1807 part component delete - see 1806 below (I prefer "semiconductor vendor" over silicon vendor" because other material such as GaAs can be used. In some cases, manufacturer can be used.) 6 place [Manufacturer] [Manufacturer] 310 company name silicon vendor name semiconductor vendor name 10 silicon vendor silicon vendor semiconductor vendor 21 silicon vendor silicon vendor semiconductor vendor 1705 silicon vendor silicon vendor semiconductor vendor 1818 silicon vendor silicon vendor semiconductor vendor 1180 semiconductor vendor silicon vendor semiconductor vendor 196 manufacturer's data book silicon vendor's data book semiconductor vendor's data book 223 components manufacturer silicon vendor manufacturer's name 224 manufacturer silicon vendor manufacturer's name 226 manufacturer silicon vendor semiconductor vendor 561 manufacturer silicon vendor semiconductor vendor 564 manufacturer silicon vendor semiconductor vendor 1163 manufacturer of the part silicon vendor manufacturer ... 1167 manufacturer silicon vendor semiconductor vendor 1701 manufacturer of the part silicon vendor manufacturer ... 1744 manufacturer's suggested silicon-vendor-suggested semiconductor vendor's suggested 1806 manufacturer of the part silicon vendor semiconductor vendor 1636 vendor-proprietary silicon silicon-vendor-proprietary semiconductor-vendor proprietary 1772 vendor-suggested silicon-vendor-suggested semiconductor vendor suggested 1773 vendor-suggested silicon-vendor-suggested semiconductor vendor suggested 1778 vendor-suggested silicon-vendor-suggested semiconductor vendor suggested 1779 vendor-suggested silicon-vendor-suggested semiconductor vendor suggested 1175 manufacturer of the package manufacturer of the package agree 1176 manufacturer's name name manufacturer's name 1178 manufacturer manufacturer semiconductor vendor 1181 manufacturers package-manufacturers package manufacturers (I agree with your change here.) 10 simulation software vendor simulation tool vendor agree 13 simulation vendor simulation tool vendor agree 22 simulation vendor simulation tool vendor agree 1789 simulation tool vendor simulation tool vendor agree 1190 less than 60 not exceed 59 (60?) should be corrected (parser misses this) Best regards, Atsushi Ogawa Manager Memory Engineering Department Semiconductor Solution Engineering Division NEC Corporation e-mail FYT46205@pcvan.or.jp From owner-ibis Tue Apr 29 18:11:59 1997 Received: from ormail.intel.com (ormail.intel.com [134.134.248.3]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id SAA12555 for ; Tue, 29 Apr 1997 18:11:59 -0700 (PDT) Received: from relay.jf.intel.com (relay.jf.intel.com [134.134.131.6]) by ormail.intel.com (8.8.4/8.8.4) with ESMTP id SAA19417 for ; Tue, 29 Apr 1997 18:11:05 -0700 (PDT) Received: (from ccmgate@localhost) by relay.jf.intel.com (8.7.6/8.7.3) id SAA15442 for ibis@vhdl.org; Tue, 29 Apr 1997 18:11:18 -0700 (PDT) Received: by ccm.hf.intel.com (ccmgate 3.2 #8) Tue, 29 Apr 97 18:11:18 PDT Date: Wed, 30 Apr 97 08:34:00 PDT From: Chee Yee Chung Message-ID: To: ibis@vhdl.org Subject: to subscribe