From owner-ibis Mon Nov 2 15:25:32 1998 Received: from smtp3.ny.us.ibm.com (smtp3.ny.us.ibm.com [198.133.22.42]) by server.eda.org (8.8.5/8.8.3) with ESMTP id PAA28348; Mon, 2 Nov 1998 15:25:32 -0800 (PST) Received: from relay1.server.ibm.com (relay1.server.ibm.com [9.14.2.98]) by smtp3.ny.us.ibm.com (8.8.7/8.8.7) with ESMTP id SAA69732; Mon, 2 Nov 1998 18:03:10 -0500 Received: from US.IBM.COM (d01lms04.pok.ibm.com [9.117.30.25]) by relay1.server.ibm.com (8.8.7/8.8.7) with SMTP id SAA09762; Mon, 2 Nov 1998 18:16:47 -0500 Received: by US.IBM.COM (Soft-Switch LMS 2.0) with snapi via D01AU036 id 5010400028512960; Mon, 2 Nov 1998 18:26:11 -0500 From: Gregory R Edlund To: Cc: Subject: PCB East IBIS Summit - comments on Accuracy Message-ID: <5010400028512960000002L002*@MHS> Date: Mon, 2 Nov 1998 18:26:11 -0500 MIME-Version: 1.0 Content-Type: text/plain On behalf of the IBIS Accuracy Subcommittee and the IBIS User's Group, I want to thank everyone who attended the PCB East IBIS Summit. Thanks also to the folks at NESA for making the arrangements and to Applied Simulation Technology, Cadence, Compaq, EMC, Focus Technology, Hyperlynx, NESA, and Viewlogic for sponsoring the event. The IBIS Accuracy Subcommittee especially appreciated the feedback we got from attendees. Yes, there are differences of opinion about what accuracy means and about implementation during modeling and simulation. However, I firmly believe that the collective wisdom represented by the IBIS Committee is a tool that we can use to craft a solid, useful document for communicating accuracy data to the user. Perhaps we need to make the idea of "communicating accuracy data" more clear in the future. Just like an IBIS data sheet is not a model but a format for communicating model data, the IBIS Accuracy Specification is not a certification of model accuracy. Rather, it is a means for communicating model correlation data to the end user. To make sure we carefully consider the input you give us, the IBIS Accuracy Subcommittee will be keeping a running record of feedback we have received from various parties and what action we have taken on this feedback. We will periodically post this list to the reflector, perhaps as part of our minutes. Once again, if you have an opinion about something in the rough draft, please voice it to anyone on the subcommittee or the reflector. If you wish to remain anonymous, we will respect your wishes. The IBIS Accuracy Subcommittee has a lot of work to do before DesignCon99. We have a paper and demo to prepare, we are making the test board ready for public consumption, and the IBIS Accuracy Specification will go through another revision cycle. We hope to meet many of you again at the DesignCon99 Summit with a more refined specification. p.s. We will be posting the IBIS Accuracy Specification to the web in the near future. When this happens, we will post a pointer on the IBIS reflector. Greg Edlund Advisory Engineer, AS/400 System Timing IBM 3650 Hwy. 52 N, Dept. HDC Rochester, MN 55901 gedlund@us.ibm.com From owner-ibis Tue Nov 3 09:11:59 1998 Received: from mail.hyperlynx.com (root@mail.hyperlynx.com [209.20.148.70]) by server.eda.org (8.8.5/8.8.3) with ESMTP id JAA01021 for ; Tue, 3 Nov 1998 09:11:57 -0800 (PST) Received: from tensor ([192.168.148.75]) by mail.hyperlynx.com (8.8.5/8.8.5) with SMTP id JAA23399 for ; Tue, 3 Nov 1998 09:07:27 -0800 Message-Id: <3.0.5.32.19981103090737.010c06d0@mail.nwlink.com> X-Sender: mbflora@mail.nwlink.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.5 (32) Date: Tue, 03 Nov 1998 09:07:37 -0100 To: ibis@eda.org From: Matthew Flora Subject: V/I table rules not crystal clear Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" All, I noticed that the Golden IBIS Parser will issue an error if, in any V/I table, the MIN column contain values, but the first or last entry of the column is NA. (The same is true of the MAX column.) I hadn't remembered such a requirement, so I looked it up in the IBIS 3.1 specification. The specifications seems to be poorly worded on this subject. Here is the relevant excerpt from the IBIS 3.1 description of the [Pulldown], [Pullup], [GND Clamp], [POWER Clamp] keywords does not All four columns are required under these keywords. However, data is only required in the typical column. If minimum and/or maximum current values are not available, the reserved word "NA" must be used. "NA" can be used for currents in the typical column, but numeric values MUST be specified for the first and last voltage points on any V/I table. Each V/I table must have at least 2, but not more than 100, voltage points. Note that in the following sentence, the subject is the typical column: "NA" can be used for currents in the typical column, but numeric values MUST be specified for the first and last voltage points on any V/I table. So, my questions to the forum are: 1) What was the specification's intent here? 2) Does that intent match everyone's understanding of the rules? 3) Shall I draft a BIRD to change the wording so that this question won't arise again in the future? Regards, Matthew Flora IBIS Open Forum Secretary (425) 869-2320 PH (425) 881-1008 FAX mbflora@hyperlynx.com HyperLynx, 17641 NE 67th Court, Redmond, WA 98052 USA From owner-ibis Tue Nov 3 10:25:02 1998 Received: from thalia.fm.intel.com (thalia.fm.intel.com [132.233.247.11]) by server.eda.org (8.8.5/8.8.3) with ESMTP id KAA01162 for ; Tue, 3 Nov 1998 10:25:00 -0800 (PST) Received: from fmsmsx19.fm.intel.com (fmsmsx19.fm.intel.com [132.233.222.210]) by thalia.fm.intel.com (8.8.6/8.8.5) with ESMTP id SAA03611; Tue, 3 Nov 1998 18:20:28 GMT Message-Id: <199811031820.SAA03611@thalia.fm.intel.com> Received: by FMSMSX19 with Internet Mail Service (5.5.2232.9) id ; Tue, 3 Nov 1998 10:20:27 -0800 From: "Muranyi, Arpad" To: "\"ibis@eda.org\" " , "\"Matthew Flora\" " Subject: RE: V/I table rules not crystal clear Date: Tue, 3 Nov 1998 10:18:00 -0800 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2232.9) Content-Type: text/plain Matthew, The intent was this: 1) If you make an IBIS model you must have at least typical data in the I-V curve who's keyword is defined. This was established so that when you are making a model from measurements and don't have skewed chips you should still be able to make a valid model. In this case the min and max columns will be NA all the way through (including the last points), but the typ column will most likely have no NAs at all (even though it is not illegal). 2) For practical reasons we also wanted to make sure that the endpoints of the tables do not have NAs. This is where things get confusing. My understanding is that if you have a min or max column with no data at all, those columns are allowed to have NAs even on the end points. It is only data tables with data which are not to have NAs in the end points. I went through the same problem years ago, and if I remeber correctly we even discussed this in the Open Forum meetings, but nothing was done about it. Maybe you will have better luck rewording the spec... Arpad ============================================================================ === All, I noticed that the Golden IBIS Parser will issue an error if, in any V/I table, the MIN column contain values, but the first or last entry of the column is NA. (The same is true of the MAX column.) I hadn't remembered such a requirement, so I looked it up in the IBIS 3.1 specification. The specifications seems to be poorly worded on this subject. Here is the relevant excerpt from the IBIS 3.1 description of the [Pulldown], [Pullup], [GND Clamp], [POWER Clamp] keywords does not All four columns are required under these keywords. However, data is only required in the typical column. If minimum and/or maximum current values are not available, the reserved word "NA" must be used. "NA" can be used for currents in the typical column, but numeric values MUST be specified for the first and last voltage points on any V/I table. Each V/I table must have at least 2, but not more than 100, voltage points. Note that in the following sentence, the subject is the typical column: "NA" can be used for currents in the typical column, but numeric values MUST be specified for the first and last voltage points on any V/I table. So, my questions to the forum are: 1) What was the specification's intent here? 2) Does that intent match everyone's understanding of the rules? 3) Shall I draft a BIRD to change the wording so that this question won't arise again in the future? Regards, Matthew Flora IBIS Open Forum Secretary (425) 869-2320 PH (425) 881-1008 FAX mbflora@hyperlynx.com HyperLynx, 17641 NE 67th Court, Redmond, WA 98052 USA From owner-ibis Wed Nov 4 10:07:48 1998 Received: from mail.hyperlynx.com (root@mail.hyperlynx.com [209.20.148.70]) by server.eda.org (8.8.5/8.8.3) with ESMTP id KAA04863 for ; Wed, 4 Nov 1998 10:07:46 -0800 (PST) Received: from tensor ([192.168.148.75]) by mail.hyperlynx.com (8.8.5/8.8.5) with SMTP id KAA29468 for ; Wed, 4 Nov 1998 10:02:59 -0800 Message-Id: <3.0.5.32.19981104100312.014c1e30@mail.nwlink.com> X-Sender: mbflora@mail.nwlink.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.5 (32) Date: Wed, 04 Nov 1998 10:03:12 -0100 To: ibis@eda.org From: Matthew Flora Subject: Proposed Golden IBIS Parser checks Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" All, I'd like to raise for discussion some enhancements I would like to have made to the Golden IBIS Parser. My goal is to elevate the quality of IBIS models being produced by having IBISCHK perform additional sanity checks. Many of the enhancements proposed below would detect flaws in models which render the model unusable for some simulations. I am proposing that we enhance the Golden IBIS Parser instead of creating a separate utility since the Golden IBIS Parser already performs some sanity checking and it is already accepted as an authoritative tool. (I have actually had some model creators refuse to fix models because "IBISCHK doesn't complain".) Proposed enhancements: 1) Generate an error if, in the [Ramp] section, either the numerator or the denominator of dV/dt is zero or negative. 2) Generate a warning if the values of Vinl or Vinh are equal to or beyond their respective voltage rail. Although I believe it possible for a device to have Vinl or Vinh equal to the voltage rail, my impression is that those devices are rare. 2) Generate at least a warning if the Pullup or Pulldown V/I table indicates that current is always flowing in one direction. In other words, the V/I table does not have an entry with zero current or, by interpolation, the current is never zero in the range of the voltages listed. I think a warning should be generated even if the current would be zero when extrapolated to a voltage beyond those listed in the table because I believe that V/I tables should be complete and should not force a simulator to guess values and, to me, extrapolation beyond the voltages listed in the table is a guess. 3) For non-ECL models, shouldn't the zero current voltage for the Typ, Min, and Max columns in the Pullup or Pulldown V/I tables be the same (say within a microvolt)? I suggest that a warning be generated if they are not. 4) Related to a topic recently discussed on the reflector, I suggest that an error be generated if a differential pin (a pin referenced in the [Diff pin] section) is connected to one of the reserved models (POWER, GND, or NC). 5) I suggest generating a warning if multiple pins in a [Pin] section have the same signal name yet use different models. This is to help catch human error when entering [Pin] sections by hand on parts with hundreds of pins. This would catch mistakes like having 25 Vcc pins where 24 are correctly using model POWER and one is mistakenly using model GND. I realize that some of these enhancements might need a BIRD to be issued so that the IBIS specification specifically mentions values that are illegal. Regards, Matthew Flora Senior Engineer HyperLynx (425) 869-2320 PH (425) 881-1008 FAX mbflora@hyperlynx.com From owner-ibis Wed Nov 4 10:34:09 1998 Received: from mailext02.compaq.com (mailext02.compaq.com [207.18.199.33]) by server.eda.org (8.8.5/8.8.3) with SMTP id KAA04949 for ; Wed, 4 Nov 1998 10:34:09 -0800 (PST) Received: from mailext02.compaq.com by mailext02.compaq.com via smail with esmtp id for ; Wed, 4 Nov 98 12:19:43 -0600 (CST) (/\##/\ Smail3.1.30.16 #30.10 built 27-oct-98) Received: from mail.compaq.com([207.18.199.32]) by mailext02.compaq.com with SMTP (peer mailint01.compaq.com[207.18.199.34]) id rcv024428; Wed, 4 Nov 1998 12:19:43 -0600 (CST) Received: from lisbon.eng.hou.compaq.com(really [131.168.159.105]) by mail.compaq.com via sendmail with smtp id for ; Wed, 4 Nov 98 12:23:38 -0600 (CST) (/\##/\ Smail3.1.30.16 #30.10 built 18-dec-97) Received: by lisbon.eng.hou.compaq.com (Smail3.1.26.7/COMPAQ-HESIOD) id m0zb7a2-000KyfC; Wed, 4 Nov 98 12:22 CST Message-Id: Date: Wed, 4 Nov 98 12:22 CST From: beal@lisbon.eng.hou.compaq.com (Weston Beal) To: ibis@eda.org, mbflora@hyperlynx.com Subject: Re: Proposed Golden IBIS Parser checks > All, > > I'd like to raise for discussion some enhancements I would like to have made > to the Golden IBIS Parser. > > My goal is to elevate the quality of IBIS models being produced by having > IBISCHK perform additional sanity checks. Many of the enhancements proposed > below would detect flaws in models which render the model unusable for some > simulations. > > I am proposing that we enhance the Golden IBIS Parser instead of creating a > separate utility since the Golden IBIS Parser already performs some sanity > checking and it is already accepted as an authoritative tool. (I have > actually had some model creators refuse to fix models because "IBISCHK > doesn't complain".) > > Proposed enhancements: > ... CHOP ... These are good points, and if this can be done, I would very much like the golden parser to generate a warning when the timing reference load is not specified. I get too many model without the load information, making them nearly useless for timing verification. Most IBIS authors leave them out, because they don't know what the parameters are, and the specification makes them optional (interpreted as "not needed"). > > I realize that some of these enhancements might need a BIRD to be issued so > that the IBIS specification specifically mentions values that are illegal. > > Regards, > Matthew Flora > Senior Engineer > HyperLynx > (425) 869-2320 PH > (425) 881-1008 FAX > mbflora@hyperlynx.com > From owner-ibis Wed Nov 4 10:49:11 1998 Received: from relayhost.vlsi.com (relayhost.vlsi.com [134.27.20.24]) by server.eda.org (8.8.5/8.8.3) with ESMTP id KAA05021 for ; Wed, 4 Nov 1998 10:49:11 -0800 (PST) Received: (from smtp@localhost) by relayhost.vlsi.com (SMI-8.6/) id KAA26934 for ; Wed, 4 Nov 1998 10:43:28 -0800 Received: from (tem-pbx1.tempe.vlsi.com [134.27.128.26]) by isis.vlsi.com via smap (V2.0) id xma026912; Wed, 4 Nov 98 10:43:12 -0800 Received: from vlsi.com (witsend.tempe.vlsi.com [134.27.133.12]) by tem-pbx1.tempe.vlsi.com with SMTP (Microsoft Exchange Internet Mail Service Version 5.5.2232.9) id TXYVFX49; Wed, 4 Nov 1998 11:42:12 -0700 Sender: dsession@vlsi.com Message-ID: <3640A03F.717A1101@vlsi.com> Date: Wed, 04 Nov 1998 11:43:11 -0700 From: "D. C. Sessions" Reply-To: ibis@eda.org Organization: VLSI Technology Inc. X-Mailer: Mozilla 4.06 [en] (X11; U; SunOS 5.5.1 sun4m) MIME-Version: 1.0 To: ibis@eda.org Subject: Re: Proposed Golden IBIS Parser checks References: <3.0.5.32.19981104100312.014c1e30@mail.nwlink.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Matthew Flora wrote: > I'd like to raise for discussion some enhancements I would like to have made > to the Golden IBIS Parser. [...] > Proposed enhancements: > 2) Generate at least a warning if the Pullup or Pulldown V/I table indicates > that current is always flowing in one direction. In other words, the V/I > table does not have an entry with zero current or, by interpolation, the > current is never zero in the range of the voltages listed. > > I think a warning should be generated even if the current would be zero > when extrapolated to a voltage beyond those listed in the table because I > believe that V/I tables should be complete and should not force a simulator > to guess values and, to me, extrapolation beyond the voltages listed in the > table is a guess. If I understand you correctly, you would insist that the tables go at least to the zero-current intercept point. Thus, for an 1.5v device with a weak pullup to 5.0v you'd have the tables go at least to 5v so as to catch the intercept? > 3) For non-ECL models, shouldn't the zero current voltage for the Typ, Min, > and Max columns in the Pullup or Pulldown V/I tables be the same (say > within a microvolt)? I suggest that a warning be generated if they are > not. Lots of technologies have zero-current intercepts inside of their rails. ECL is only one of them; perhaps you've heard of TTL? > 4) Related to a topic recently discussed on the reflector, I suggest that an > error be generated if a differential pin (a pin referenced in the > [Diff pin] section) is connected to one of the reserved models (POWER, GND, > or NC). This would barf on RS-423 -- D. C. Sessions dc.sessions@vlsi.com From owner-ibis Wed Nov 4 11:29:45 1998 Received: from mail.nwlink.com (mail.nwlink.com [209.20.130.40]) by server.eda.org (8.8.5/8.8.3) with ESMTP id LAA05149 for ; Wed, 4 Nov 1998 11:29:45 -0800 (PST) Received: from hyperstar (ip40.du1.lynn.nwlink.com [209.20.140.40]) by mail.nwlink.com (8.9.1a/8.9.1) with SMTP id LAA28743; Wed, 4 Nov 1998 11:25:04 -0800 (PST) Message-Id: <3.0.32.19981104112442.00960890@mail.nwlink.com> X-Sender: kellee@mail.nwlink.com X-Mailer: Windows Eudora Pro Version 3.0 (32) Date: Wed, 04 Nov 1998 11:24:53 -0800 To: ibis@eda.org, ibis@eda.org From: Kellee Crisafulli Subject: Re: Proposed Golden IBIS Parser checks Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Hi group, At 11:43 AM 11/4/98 -0700, D. C. Sessions wrote: >Matthew Flora wrote: >> Proposed enhancements: >> 2) Generate at least a warning if the Pullup or Pulldown V/I table indicates >> that current is always flowing in one direction. In other words, the V/I >> table does not have an entry with zero current or, by interpolation, the >> current is never zero in the range of the voltages listed. >> I think a warning should be generated even if the current would be zero >> when extrapolated to a voltage beyond those listed in the table because I >> believe that V/I tables should be complete and should not force a simulator >> to guess values and, to me, extrapolation beyond the voltages listed in the >> table is a guess. >If I understand you correctly, you would insist that the tables >go at least to the zero-current intercept point. Thus, for an >1.5v device with a weak pullup to 5.0v you'd have the tables go >at least to 5v so as to catch the intercept? Matt asked for a warning. Not an error. Just a way to say are you really sure this is what you wanted. The warning could even say this condition may be valid for some classes of devices. >> 3) For non-ECL models, shouldn't the zero current voltage for the Typ, Min, >> and Max columns in the Pullup or Pulldown V/I tables be the same (say >> within a microvolt)? I suggest that a warning be generated if they are >> not. >Lots of technologies have zero-current intercepts inside of their >rails. ECL is only one of them; perhaps you've heard of TTL? I think Matt is asking that the zero current intercept be the same for typ,min,max not that it be 0. >> 4) Related to a topic recently discussed on the reflector, I suggest that an >> error be generated if a differential pin (a pin referenced in the >> [Diff pin] section) is connected to one of the reserved models (POWER, GND, >> or NC). >This would barf on RS-423 Good point. From owner-ibis Wed Nov 4 12:06:04 1998 Received: from relayhost.vlsi.com (relayhost.vlsi.com [134.27.20.24]) by server.eda.org (8.8.5/8.8.3) with ESMTP id MAA05242 for ; Wed, 4 Nov 1998 12:06:03 -0800 (PST) Received: (from smtp@localhost) by relayhost.vlsi.com (SMI-8.6/) id MAA29997 for ; Wed, 4 Nov 1998 12:00:35 -0800 Received: from (tem-pbx1.tempe.vlsi.com [134.27.128.26]) by isis.vlsi.com via smap (V2.0) id xma029975; Wed, 4 Nov 98 12:00:05 -0800 Received: from vlsi.com (witsend.tempe.vlsi.com [134.27.133.12]) by tem-pbx1.tempe.vlsi.com with SMTP (Microsoft Exchange Internet Mail Service Version 5.5.2232.9) id TXYVFXY0; Wed, 4 Nov 1998 12:59:04 -0700 Sender: dsession@vlsi.com Message-ID: <3640B244.E227B5E4@vlsi.com> Date: Wed, 04 Nov 1998 13:00:04 -0700 From: "D. C. Sessions" Reply-To: ibis@eda.org Organization: VLSI Technology Inc. X-Mailer: Mozilla 4.06 [en] (X11; U; SunOS 5.5.1 sun4m) MIME-Version: 1.0 To: ibis@eda.org Subject: Re: Proposed Golden IBIS Parser checks References: <3.0.32.19981104112442.00960890@mail.nwlink.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Kellee Crisafulli wrote: > At 11:43 AM 11/4/98 -0700, D. C. Sessions wrote: > >Matthew Flora wrote: > >> Proposed enhancements: > >> 3) For non-ECL models, shouldn't the zero current voltage for the Typ, Min, > >> and Max columns in the Pullup or Pulldown V/I tables be the same (say > >> within a microvolt)? I suggest that a warning be generated if they are > >> not. > >Lots of technologies have zero-current intercepts inside of their > >rails. ECL is only one of them; perhaps you've heard of TTL? > I think Matt is asking that the zero current intercept be the same for > typ,min,max not that it be 0. Still wouldn't work. TTL (to pick one) intercepts when the forward current through the base-collector junction equals the pulldown current through the collector-emitter path. This depends on the forward voltage of the base-emitter junction, the beta of the transistor, and the forward voltage of the collector-base junction as well as the predriver current to the transistor base node (also variable). The first three are dependent on process and temperature, and the last is also dependent on supply voltage. IOW, the open-circuit Vol is going to be all over the place. -- D. C. Sessions dc.sessions@vlsi.com From owner-ibis Wed Nov 4 12:45:43 1998 Received: from mail.hyperlynx.com (root@mail.hyperlynx.com [209.20.148.70]) by server.eda.org (8.8.5/8.8.3) with ESMTP id MAA05377 for ; Wed, 4 Nov 1998 12:45:41 -0800 (PST) Received: from tensor ([192.168.148.75]) by mail.hyperlynx.com (8.8.5/8.8.5) with SMTP id MAA30169 for ; Wed, 4 Nov 1998 12:41:11 -0800 Message-Id: <3.0.5.32.19981104124123.014cc0b0@mail.nwlink.com> X-Sender: mbflora@mail.nwlink.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.5 (32) Date: Wed, 04 Nov 1998 12:41:23 -0100 To: ibis@eda.org From: Matthew Flora Subject: Re: Proposed Golden IBIS Parser checks In-Reply-To: <3640A03F.717A1101@vlsi.com> References: <3.0.5.32.19981104100312.014c1e30@mail.nwlink.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" D. C., >> Proposed enhancements: > >> 2) Generate at least a warning if the Pullup or Pulldown V/I table >> indicates that current is always flowing in one direction. In other >> words, the V/I table does not have an entry with zero current or, by >> interpolation, the current is never zero in the range of the voltages >> listed. >> >> I think a warning should be generated even if the current would be zero >> when extrapolated to a voltage beyond those listed in the table because >> I believe that V/I tables should be complete and should not force a >> simulator to guess values and, to me, extrapolation beyond the voltages > listed in the table is a guess. > >If I understand you correctly, you would insist that the tables >go at least to the zero-current intercept point. Thus, for an >1.5v device with a weak pullup to 5.0v you'd have the tables go >at least to 5v so as to catch the intercept? In a word, yes. If you have a 1.5v buffer which is active all the way up to 5v, then it's behavior needs to be described. I thought V/I tables are supposed to show the behavior of the device in its active region, and perhaps a bit beyond its active region. I thought that is why the spec suggests generally spanning the voltages between -Vcc and 2Vcc. >> 4) Related to a topic recently discussed on the reflector, I suggest that >> an error be generated if a differential pin (a pin referenced in the >> [Diff pin] section) is connected to one of the reserved models (POWER, >> GND, or NC). > >This would barf on RS-423 I am not familiar with RS-423. Does it have one or more pins whose voltage is to be taken differentially to POWER or GND? Cheers, Matt From owner-ibis Wed Nov 4 14:07:10 1998 Received: from mail.hyperlynx.com (root@mail.hyperlynx.com [209.20.148.70]) by server.eda.org (8.8.5/8.8.3) with ESMTP id OAA05512 for ; Wed, 4 Nov 1998 14:07:08 -0800 (PST) Received: from Kellee98 ([192.168.148.110]) by mail.hyperlynx.com (8.8.5/8.8.5) with SMTP id OAA30523 for ; Wed, 4 Nov 1998 14:02:38 -0800 Message-Id: <199811042202.OAA30523@mail.hyperlynx.com> X-Sender: kellee@mail.nwlink.com X-Mailer: QUALCOMM Windows Eudora Pro Version 4.0 Date: Wed, 04 Nov 1998 14:02:38 -0800 To: ibis@eda.org From: Kellee Crisafulli Subject: Re: Proposed Golden IBIS Parser checks In-Reply-To: <3640B244.E227B5E4@vlsi.com> References: <3.0.32.19981104112442.00960890@mail.nwlink.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by server.eda.org id OAA05513 Hi IBIS, At 01:00 PM 11/4/98 -0700, you wrote: >> >> 3) For non-ECL models, shouldn't the zero current voltage for the Typ, Min, >> >> and Max columns in the Pullup or Pulldown V/I tables be the same (say >> >> within a microvolt)? I suggest that a warning be generated if they are >> >> not. >> >Lots of technologies have zero-current intercepts inside of their >> >rails. ECL is only one of them; perhaps you've heard of TTL? > >> I think Matt is asking that the zero current intercept be the same for >> typ,min,max not that it be 0. > >Still wouldn't work. TTL (to pick one) intercepts when the >forward current through the base-collector junction equals >the pulldown current through the collector-emitter path. >This depends on the forward voltage of the base-emitter >junction, the beta of the transistor, and the forward >voltage of the collector-base junction as well as the >predriver current to the transistor base node (also variable). >The first three are dependent on process and temperature, and >the last is also dependent on supply voltage. IOW, the >open-circuit Vol is going to be all over the place. Excellent point DC! Any ideas on how to do this that would work better are appreciated. Did I mention it needs to be reasonably simply so it's not too hard to write the test. This is another common problem we see it would be nice to smash with the golden parser. --------------------------------------------------------- Have a great day.... Kellee Crisafulli at HyperLynx SI,EMC,X-talk and IBIS tools for the Windows platform E-mail: web:   --------------------------------------------------------- From owner-ibis Wed Nov 4 15:29:17 1998 Received: from ganymede.or.intel.com (ganymede.or.intel.com [134.134.248.3]) by server.eda.org (8.8.5/8.8.3) with ESMTP id PAA05804 for ; Wed, 4 Nov 1998 15:29:16 -0800 (PST) Received: from ichips-jf.jf.intel.com (ichips-jf.jf.intel.com [134.134.50.200]) by ganymede.or.intel.com (8.8.6/8.8.5) with ESMTP id XAA27800; Wed, 4 Nov 1998 23:24:45 GMT Received: from xtg801.pdx.intel.com (xtg801.pdx.intel.com [134.134.114.35]) by ichips-jf.jf.intel.com (8.8.8/8.8.7) with ESMTP id PAA29016; Wed, 4 Nov 1998 15:24:45 -0800 (PST) Received: from ichips.intel.com by xtg801.pdx.intel.com (8.8.8/WW2.2 (Jones Farm)) id PAA02747; Wed, 4 Nov 1998 15:24:44 -0800 (PST) Message-Id: <199811042324.PAA02747@xtg801.pdx.intel.com> X-Mailer: exmh version 2.0delta 6/3/97 To: Matthew Flora cc: ibis@eda.org Subject: Re: Proposed Golden IBIS Parser checks In-reply-to: Your message of "Wed, 04 Nov 1998 12:41:23 -0100." <3.0.5.32.19981104124123.014cc0b0@mail.nwlink.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Wed, 04 Nov 1998 15:24:43 -0800 From: Stephen Peters Hello Matthew, D.C.: Comments below Regards, Stephen > D. C., > > >> Proposed enhancements: > > > >> 2) Generate at least a warning if the Pullup or Pulldown V/I table > >> indicates that current is always flowing in one direction. In other > >> words, the V/I table does not have an entry with zero current or, by > >> interpolation, the current is never zero in the range of the voltages > >> listed. > >> > >> I think a warning should be generated even if the current would be zero > >> when extrapolated to a voltage beyond those listed in the table because > >> I believe that V/I tables should be complete and should not force a > >> simulator to guess values and, to me, extrapolation beyond the voltages > > listed in the table is a guess. > > > >If I understand you correctly, you would insist that the tables > >go at least to the zero-current intercept point. Thus, for an > >1.5v device with a weak pullup to 5.0v you'd have the tables go > >at least to 5v so as to catch the intercept? > > In a word, yes. If you have a 1.5v buffer which is active all the way up to > 5v, then it's behavior needs to be described. I thought V/I tables are > supposed to show the behavior of the device in its active region, and perhaps > a bit beyond its active region. I thought that is why the spec suggests > generally spanning the voltages between -Vcc and 2Vcc. Actually, the -Vcc to 2Vcc requirement comes from the fact that this is the maximum signal swing on an unterminated transmission line. If the output swings 0 - 1.5v then the maximum voltage on the output would be -1.5v to 3.0v. However, if the part is intended to live in a 5V signaling environment then the V/I curves ought to to go from -5v to 10v. You know... this is really a defect in the spec. V/I table endpoints should be determined not by VCC, but by output swing, as described above. I feel a bird comming on.... > > >> 4) Related to a topic recently discussed on the reflector, I suggest that > >> an error be generated if a differential pin (a pin referenced in the > >> [Diff pin] section) is connected to one of the reserved models (POWER, > >> GND, or NC). > > > >This would barf on RS-423 > > I am not familiar with RS-423. Does it have one or more pins whose voltage is > to be taken differentially to POWER or GND? > > Cheers, > Matt From owner-ibis Wed Nov 4 16:13:03 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.eda.org (8.8.5/8.8.3) with ESMTP id QAA05875 for ; Wed, 4 Nov 1998 16:13:02 -0800 (PST) Received: from em-wv03.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id QAA03355; Wed, 4 Nov 1998 16:08:01 -0800 (PST) Received: from kappa2.wv.mentorg.com by em-wv03.wv.mentorg.com (8.8.8/CF5.40R) id QAA24980; Wed, 4 Nov 1998 16:08:00 -0800 (PST) Received: by localhost with Microsoft MAPI; Wed, 4 Nov 1998 16:01:00 -0800 Message-ID: <01BE080C.50F64860.tom_dagostino@mentorg.com> From: tomda To: "'Kellee Crisafulli'" , "ibis@eda.org" Subject: RE: Proposed Golden IBIS Parser checks Date: Wed, 4 Nov 1998 16:00:59 -0800 Organization: Mentor Graphics X-Mailer: Microsoft Internet E-mail/MAPI - 8.0.0.4211 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit There are many CMOS inputs that have a resistor to a third logic voltage level (not high or low) that will never have the same intercept. That third logic level will change with Vcc. Tom Dagostino -----Original Message----- From: Kellee Crisafulli [SMTP:kellee@hyperlynx.com] Sent: Wednesday, November 04, 1998 2:03 PM To: ibis@eda.org Subject: Re: Proposed Golden IBIS Parser checks Hi IBIS, At 01:00 PM 11/4/98 -0700, you wrote: >> >> 3) For non-ECL models, shouldn't the zero current voltage for the Typ, Min, >> >> and Max columns in the Pullup or Pulldown V/I tables be the same (say >> >> within a microvolt)? I suggest that a warning be generated if they are >> >> not. >> >Lots of technologies have zero-current intercepts inside of their >> >rails. ECL is only one of them; perhaps you've heard of TTL? > >> I think Matt is asking that the zero current intercept be the same for >> typ,min,max not that it be 0. > >Still wouldn't work. TTL (to pick one) intercepts when the >forward current through the base-collector junction equals >the pulldown current through the collector-emitter path. >This depends on the forward voltage of the base-emitter >junction, the beta of the transistor, and the forward >voltage of the collector-base junction as well as the >predriver current to the transistor base node (also variable). >The first three are dependent on process and temperature, and >the last is also dependent on supply voltage. IOW, the >open-circuit Vol is going to be all over the place. Excellent point DC! Any ideas on how to do this that would work better are appreciated. Did I mention it needs to be reasonably simply so it's not too hard to write the test. This is another common problem we see it would be nice to smash with the golden parser. --------------------------------------------------------- Have a great day.... Kellee Crisafulli at HyperLynx SI,EMC,X-talk and IBIS tools for the Windows platform E-mail: web: --------------------------------------------------------- From owner-ibis Wed Nov 4 16:16:08 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.eda.org (8.8.5/8.8.3) with ESMTP id QAA05885 for ; Wed, 4 Nov 1998 16:16:08 -0800 (PST) Received: from em-wv03.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id QAA03982; Wed, 4 Nov 1998 16:11:07 -0800 (PST) Received: from kappa2.wv.mentorg.com by em-wv03.wv.mentorg.com (8.8.8/CF5.40R) id QAA25459; Wed, 4 Nov 1998 16:11:06 -0800 (PST) Received: by localhost with Microsoft MAPI; Wed, 4 Nov 1998 16:04:06 -0800 Message-ID: <01BE080C.C013B7A0.tom_dagostino@mentorg.com> From: tomda To: "'Stephen Peters'" , Matthew Flora Cc: "ibis@eda.org" Subject: RE: Proposed Golden IBIS Parser checks Date: Wed, 4 Nov 1998 16:04:05 -0800 Organization: Mentor Graphics X-Mailer: Microsoft Internet E-mail/MAPI - 8.0.0.4211 MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit But remember the part may swing only a small fraction of the Vcc supply but other parts on the same bus may have larger swings. Also, let's not forget about inductive di/dt. Voltages could go much more than -Vcc to 2Vcc. Tom Dagostino -----Original Message----- From: Stephen Peters [SMTP:sjpeters@ichips.intel.com] Sent: Wednesday, November 04, 1998 3:25 PM To: Matthew Flora Cc: ibis@eda.org Subject: Re: Proposed Golden IBIS Parser checks Hello Matthew, D.C.: Comments below Regards, Stephen > D. C., > > >> Proposed enhancements: > > > >> 2) Generate at least a warning if the Pullup or Pulldown V/I table > >> indicates that current is always flowing in one direction. In other > >> words, the V/I table does not have an entry with zero current or, by > >> interpolation, the current is never zero in the range of the voltages > >> listed. > >> > >> I think a warning should be generated even if the current would be zero > >> when extrapolated to a voltage beyond those listed in the table because > >> I believe that V/I tables should be complete and should not force a > >> simulator to guess values and, to me, extrapolation beyond the voltages > > listed in the table is a guess. > > > >If I understand you correctly, you would insist that the tables > >go at least to the zero-current intercept point. Thus, for an > >1.5v device with a weak pullup to 5.0v you'd have the tables go > >at least to 5v so as to catch the intercept? > > In a word, yes. If you have a 1.5v buffer which is active all the way up to > 5v, then it's behavior needs to be described. I thought V/I tables are > supposed to show the behavior of the device in its active region, and perhaps > a bit beyond its active region. I thought that is why the spec suggests > generally spanning the voltages between -Vcc and 2Vcc. Actually, the -Vcc to 2Vcc requirement comes from the fact that this is the maximum signal swing on an unterminated transmission line. If the output swings 0 - 1.5v then the maximum voltage on the output would be -1.5v to 3.0v. However, if the part is intended to live in a 5V signaling environment then the V/I curves ought to to go from -5v to 10v. You know... this is really a defect in the spec. V/I table endpoints should be determined not by VCC, but by output swing, as described above. I feel a bird comming on.... > > >> 4) Related to a topic recently discussed on the reflector, I suggest that > >> an error be generated if a differential pin (a pin referenced in the > >> [Diff pin] section) is connected to one of the reserved models (POWER, > >> GND, or NC). > > > >This would barf on RS-423 > > I am not familiar with RS-423. Does it have one or more pins whose voltage is > to be taken differentially to POWER or GND? > > Cheers, > Matt From owner-ibis Wed Nov 4 16:25:04 1998 Received: from mail.hyperlynx.com (root@mail.hyperlynx.com [209.20.148.70]) by server.eda.org (8.8.5/8.8.3) with ESMTP id QAA05913 for ; Wed, 4 Nov 1998 16:25:03 -0800 (PST) Received: from tensor ([192.168.148.75]) by mail.hyperlynx.com (8.8.5/8.8.5) with SMTP id QAA31136 for ; Wed, 4 Nov 1998 16:20:28 -0800 Message-Id: <3.0.5.32.19981104162040.01497720@mail.nwlink.com> X-Sender: mbflora@mail.nwlink.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.5 (32) Date: Wed, 04 Nov 1998 16:20:40 -0100 To: ibis@eda.org From: Matthew Flora Subject: RE: Proposed Golden IBIS Parser checks In-Reply-To: <01BE080C.C013B7A0.tom_dagostino@mentorg.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" All, I think I miscommunicated. When I was talking about V/I tables that span -Vcc to 2Vcc, I was using that as an example of how a table may include voltages which are outside the normal operating region of the part. The point that I was trying to make is that the V/I table should, AT THE VERY LEAST, include the voltage span of the buffer's active region. Cheers, Matt From owner-ibis Wed Nov 4 16:58:22 1998 Received: from mail.hyperlynx.com (root@mail.hyperlynx.com [209.20.148.70]) by server.eda.org (8.8.5/8.8.3) with ESMTP id QAA06007 for ; Wed, 4 Nov 1998 16:58:20 -0800 (PST) Received: from Kellee98 ([192.168.148.110]) by mail.hyperlynx.com (8.8.5/8.8.5) with SMTP id QAA31297; Wed, 4 Nov 1998 16:52:51 -0800 Message-Id: <199811050052.QAA31297@mail.hyperlynx.com> X-Sender: kellee@mail.nwlink.com X-Mailer: QUALCOMM Windows Eudora Pro Version 4.0 Date: Wed, 04 Nov 1998 16:52:51 -0800 To: Stephen Peters , Matthew Flora From: Kellee Crisafulli Subject: What -Vcc to +2Vcc is for... Cc: ibis@eda.org In-Reply-To: <199811042324.PAA02747@xtg801.pdx.intel.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by server.eda.org id QAA06008 Hi Stephen, >Actually, the -Vcc to 2Vcc requirement comes from the fact that this is the >maximum signal swing on an unterminated transmission line. If the output >swings 0 - 1.5v then the maximum voltage on the output would be -1.5v to 3.0v. >However, if the part is intended to live in a 5V signaling environment then >the V/I curves ought to to go from -5v to 10v. > > You know... this is really a defect in the spec. V/I table endpoints >should be determined not by VCC, but by output swing, as described above. >I feel a bird comming on.... Stephen I think I agree with you, I would explain it as follows: The -VCC to 2VCC requirement was put in to insure that over the broadest expected range for which the device might need to be simulated there would be valid V/I entries so the simulators did not extrapolate to current levels the device would not deliver. For most devices this would include the max. input range generated by worst case reflections as Stephen indicated. However if you have a part that runs on a core switching range of say 0 to 3 and has a clamp at 5V or a weak pull up to 5V the range should probably be -5 to +10 not -3 to +6 (my opinion). Discression is left to the model developer on this one but the boardest possible range for which the device could conceivable operate should be covered with a minimum of -Vcc to +2VCC. Another example would be an old 30V open collector 7406. The V/I table for this device should extend to at least +30V and -5V. When in doubt use a broader range. --------------------------------------------------------- Have a great day.... Kellee Crisafulli at HyperLynx SI,EMC,X-talk and IBIS tools for the Windows platform E-mail: web:   --------------------------------------------------------- From owner-ibis Wed Nov 4 23:44:16 1998 Received: from ernst.netinsight.se (ernst.netinsight.se [194.16.221.130]) by server.eda.org (8.8.5/8.8.3) with SMTP id XAA06953 for ; Wed, 4 Nov 1998 23:43:19 -0800 (PST) Received: from netinsight.se (unverified [194.16.221.135]) by ernst.netinsight.se (EMWAC SMTPRS 0.83) with SMTP id ; Thu, 05 Nov 1998 08:38:16 +0100 Message-ID: <3641585A.ABD9D306@netinsight.se> Date: Thu, 05 Nov 1998 08:48:42 +0100 From: Elling DISEN Reply-To: elling.disen@netinsight.se Organization: Net Insight AB X-Mailer: Mozilla 4.05 [en] (WinNT; I) MIME-Version: 1.0 To: ibis@eda.org Subject: Unsubscribe Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Please remove from the list unless you plan to soon moderate it -- Mr Elling DISEN Ingènieur Supelec Hardware Architect " Fiberize the planet ! TM " elling.disen@netinsight.se http://www.netinsight.se Phones:#46 8 449 22 35 (work), #46 8 652 1832 (priv), #46 70 796 1991 (cellular) Fax: # 46 8 449 22 40 Work: Net Insight AB, Ingenjörsvägen 3, S-117 43 STOCKHOLM Priv: Svarvargatan 5, S-112 49 STOCKHOLM S W E D E N -------------------------------------------------------- "Be nice to everyone, pray and ride your bike gently ! " -------------------------------------------------------- From owner-ibis Thu Nov 5 08:28:40 1998 Received: from relayhost.vlsi.com (relayhost.vlsi.com [134.27.20.24]) by server.eda.org (8.8.5/8.8.3) with ESMTP id IAA08394 for ; Thu, 5 Nov 1998 08:28:40 -0800 (PST) Received: (from smtp@localhost) by relayhost.vlsi.com (SMI-8.6/) id IAA24764 for ; Thu, 5 Nov 1998 08:22:47 -0800 Received: from (tem-pbx1.tempe.vlsi.com [134.27.128.26]) by isis.vlsi.com via smap (V2.0) id xma024752; Thu, 5 Nov 98 08:22:28 -0800 Received: from vlsi.com (witsend.tempe.vlsi.com [134.27.133.12]) by tem-pbx1.tempe.vlsi.com with SMTP (Microsoft Exchange Internet Mail Service Version 5.5.2232.9) id TXYVFY7L; Thu, 5 Nov 1998 09:21:27 -0700 Sender: dsession@vlsi.com Message-ID: <3641D0C3.E3025A6@vlsi.com> Date: Thu, 05 Nov 1998 09:22:27 -0700 From: "D. C. Sessions" Reply-To: ibis@eda.org Organization: VLSI Technology Inc. X-Mailer: Mozilla 4.06 [en] (X11; U; SunOS 5.5.1 sun4m) MIME-Version: 1.0 To: ibis@eda.org Subject: Re: Proposed Golden IBIS Parser checks References: <3.0.5.32.19981104100312.014c1e30@mail.nwlink.com> <3.0.5.32.19981104124123.014cc0b0@mail.nwlink.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Matthew Flora wrote: > >> 4) Related to a topic recently discussed on the reflector, I suggest that > >> an error be generated if a differential pin (a pin referenced in the > >> [Diff pin] section) is connected to one of the reserved models (POWER, > >> GND, or NC). > > > >This would barf on RS-423 > > I am not familiar with RS-423. Does it have one or more pins whose voltage is > to be taken differentially to POWER or GND? RS-423 is a half-step between RS-232 and RS-422. The drivers are sort of limited-range RS-232 (plus and minus 5v) and the receivers are RS-422 receivers with one input grounded. -- D. C. Sessions dc.sessions@vlsi.com From owner-ibis Fri Nov 6 09:23:29 1998 Received: from smtp3.ny.us.ibm.com (smtp3.ny.us.ibm.com [198.133.22.42]) by server.eda.org (8.8.5/8.8.3) with ESMTP id JAA12642; Fri, 6 Nov 1998 09:23:28 -0800 (PST) Received: from relay1.server.ibm.com (relay1.server.ibm.com [9.14.2.98]) by smtp3.ny.us.ibm.com (8.8.7/8.8.7) with ESMTP id MAA67146; Fri, 6 Nov 1998 12:00:56 -0500 Received: from US.IBM.COM (d01lms04.pok.ibm.com [9.117.30.25]) by relay1.server.ibm.com (8.8.7/8.8.7) with SMTP id MAA42516; Fri, 6 Nov 1998 12:14:25 -0500 Received: by US.IBM.COM (Soft-Switch LMS 2.0) with snapi via D01AU036 id 5010400028671109; Fri, 6 Nov 1998 12:24:07 -0500 From: Gregory R Edlund To: Cc: Subject: IBIS Accuracy Subcommittee Minutes - 11/05/98 Message-ID: <5010400028671109000002L092*@MHS> Date: Fri, 6 Nov 1998 12:24:07 -0500 MIME-Version: 1.0 Content-Type: text/plain IBIS Accuracy Subcommittee Minutes Thursday, November 5, 1998 Held at Compaq Computer, Maynard, MA Attendees Greg Edlund, IBM (by phone) Bob Haller, Compaq Computer Peter LaFlamme, Fairchild Semiconductor Harvey Stiegler, Texas Instruments (by phone) Time and location of next meeting to be determined. MILESTONES Pass 2 of the test board has been fabricated, assembled, and is currently in testing. Those of you who have been waiting for the design files can expect them before the end of 1998. The Test Board Application Note make take a while longer. The subcommittee will post a notice to the reflector when these events occur October 15, 1998: IBIS Accuracy Test Board tested - demo at PCB East IBIS Summit. October 15, 1998: Rough draft of IBIS Accuracy Spec distributed at PCB East IBIS Summit. November 22, 1998: Submit final draft of DesignCon99 paper. February 1999: Present the IBIS Accuracy Specification at DesignCon99. EDITING No activity this meeting. The IBIS Accuracy Specification should be made available on the web as soon as possible to increase visibility and the potential for feedback. The subcommittee would like to see a link to the spec from somewhere within the main IBIS web page if possible. DESIGNCON99 Most of the group activity has been focused on the final draft of the DesignCon99 paper, which includes taking data from the test board. HP will be providing test equipment for the demo that accompanies the paper: HP54750 digital oscilloscope and TDR, FET probes, power supply, and multimeter. Bob Ross has suggested the possibility of space at the IBIS booth, and this topic will be up for discussion at the next Open Forum. The Accuracy Subcommittee would also like to suggest setting up IBIS development software from one or more vendors and demonstrating curve overlay techniques. FUTURE ACTIVITIES Once the DesignCon99 final draft is done, the subcommittee will return to activities related to the IBIS Accuracy Specification and the test board. These include: 1. Finish writing the rough draft of the IBIS Accuracy Specification. 2. Publish the test board design files. 3. Write and publish the IBIS Accuracy Test Board Application Note. 4. Implement feedback from the IBIS community. There seems to be a strong body of opinion that the IBIS Accuracy Specification needs to be decoupled from the question of simulator accuracy. One possible means suggested for accomplishing this goal is VT tables. However, VT tables presently lack the capability of transmission line loads. This means a new BIRD, which would delay the introduction of the first draft. We began debating ways to implement VT tables into the spec, but decided to table the discussion until after we submit the DesignCon99 final draft. Including VT tables in the spec represents a significant amount of work. Indeed, parts of the spec would have to be re-written. We are coming to the realization that no matter what direction we take on the implementation of VT tables, much of the next year of the IBIS Accuracy Subcommittee will be spent dealing with simulation questions and advanced model features, including advanced I/O buffer designs. Greg Edlund Advisory Engineer, AS/400 System Timing IBM 3650 Hwy. 52 N, Dept. HDC Rochester, MN 55901 gedlund@us.ibm.com From owner-ibis Mon Nov 9 12:06:28 1998 Received: from relayhost.vlsi.com (relayhost.vlsi.com [134.27.20.24]) by server.eda.org (8.8.5/8.8.3) with ESMTP id MAA18993 for ; Mon, 9 Nov 1998 12:06:27 -0800 (PST) Received: (from smtp@localhost) by relayhost.vlsi.com (SMI-8.6/) id MAA19248 for ; Mon, 9 Nov 1998 12:01:25 -0800 Received: from (tem-pbx1.tempe.vlsi.com [134.27.128.26]) by isis.vlsi.com via smap (V2.0) id xma019233; Mon, 9 Nov 98 12:01:03 -0800 Received: from vlsi.com (witsend.tempe.vlsi.com [134.27.133.12]) by tem-pbx1.tempe.vlsi.com with SMTP (Microsoft Exchange Internet Mail Service Version 5.5.2232.9) id TXYVF676; Mon, 9 Nov 1998 12:59:57 -0700 Sender: dsession@vlsi.com Message-ID: <364749FE.AC9149BD@vlsi.com> Date: Mon, 09 Nov 1998 13:01:02 -0700 From: "D. C. Sessions" Reply-To: IBIS Mailing list Organization: VLSI Technology Inc. X-Mailer: Mozilla 4.06 [en] (X11; U; SunOS 5.5.1 sun4m) MIME-Version: 1.0 To: IBIS Mailing list Subject: Re: standard loads on 66 MHz PCI References: <199811091922.TAA29945@thalia.fm.intel.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Muranyi, Arpad wrote: > > All, > > I guess it is not impossible to come up with a fix to the IBIS spec to > accommodate the various reference loads the PCI spec uses. But, to answer > someone's question, I have only seen this kind of multiple reference loads in > the PCI spec. so far. And, sorry, but I have no idea why it was done that > way. It actually maps into the requirements. Min has to be guaranteed at light load to avoid violating the zero hold time spec in the face of clock skew; the light load is possible in onboard point-to-point connections. The max is necessary to guarantee avoiding setup violation on a loaded bus. > To further complicate things, think about this. There is a separate min and max > reference (test) load. But what are you supposed to use if you want to run a > typical simulation? This makes me suggest that we should look into how to fix > the PCI spec... Fixing the PCI spec would be nice, (the 5v tolerant section has always been ugly) and the timing is right since Intel has announced its end-of-life. Less flippantly, it's probably too late. The fool thing has a life of its own now. To get an idea, see how many 3.3v PCI systems you can find, and then read the intro to the electricals where Intel announced that PCI is intended to be a 3.3v bus but 5v is supported only as a transisition path... -- D. C. Sessions dc.sessions@vlsi.com From owner-ibis Mon Nov 9 15:02:35 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.eda.org (8.8.5/8.8.3) with ESMTP id PAA19451 for ; Mon, 9 Nov 1998 15:02:35 -0800 (PST) Received: from em-wv03.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id OAA20239; Mon, 9 Nov 1998 14:57:33 -0800 (PST) Received: from bob by em-wv03.wv.mentorg.com (8.8.8/CF5.40R) id OAA01630; Mon, 9 Nov 1998 14:57:30 -0800 (PST) From: bob_ross@mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA16944; Mon, 9 Nov 98 14:57:30 PST Date: Mon, 9 Nov 98 14:57:30 PST Message-Id: <9811092257.AA16944@bob> To: ibis@eda.org Subject: Re: standard loads on 66 MHz PCI To All: The IBIS Version 3.1 format could theoretically handle this multiple test load situation by using the [Model Selector] keyword to reference individual [Model] keywords containing the same information except for the individually specified test loads. However, it is likely that the user would to manually manage the analysis for testing the design corners. Bob Ross Interconnectix/Mentor Graphics > Date: Mon, 09 Nov 1998 13:01:02 -0700 > From: "D. C. Sessions" > Reply-To: IBIS Mailing list > To: IBIS Mailing list > Subject: Re: standard loads on 66 MHz PCI > Muranyi, Arpad wrote: > > > > All, > > > > I guess it is not impossible to come up with a fix to the IBIS spec to > > accommodate the various reference loads the PCI spec uses. But, to answer > > someone's question, I have only seen this kind of multiple reference loads in > > the PCI spec. so far. And, sorry, but I have no idea why it was done that > > way. > It actually maps into the requirements. Min has to be guaranteed at light > load to avoid violating the zero hold time spec in the face of clock skew; > the light load is possible in onboard point-to-point connections. > The max is necessary to guarantee avoiding setup violation on a loaded bus. > > To further complicate things, think about this. There is a separate min and max > > reference (test) load. But what are you supposed to use if you want to run a > > typical simulation? This makes me suggest that we should look into how to fix > > the PCI spec... > Fixing the PCI spec would be nice, (the 5v tolerant section has always > been ugly) and the timing is right since Intel has announced its end-of-life. > Less flippantly, it's probably too late. The fool thing has a life of > its own now. To get an idea, see how many 3.3v PCI systems you can find, > and then read the intro to the electricals where Intel announced that PCI > is intended to be a 3.3v bus but 5v is supported only as a transisition > path... > -- > D. C. Sessions > dc.sessions@vlsi.com From owner-ibis Mon Nov 9 15:12:04 1998 Received: from thalia.fm.intel.com (thalia.fm.intel.com [132.233.247.11]) by server.eda.org (8.8.5/8.8.3) with ESMTP id PAA19471 for ; Mon, 9 Nov 1998 15:12:04 -0800 (PST) Received: from fmsmsx19.fm.intel.com (fmsmsx19.fm.intel.com [132.233.222.210]) by thalia.fm.intel.com (8.8.6/8.8.5) with ESMTP id XAA14758; Mon, 9 Nov 1998 23:07:32 GMT Message-Id: <199811092307.XAA14758@thalia.fm.intel.com> Received: by FMSMSX19 with Internet Mail Service (5.5.2232.9) id ; Mon, 9 Nov 1998 15:07:31 -0800 From: "Muranyi, Arpad" To: "\"ibis@eda.org\" " , "\"bob_ross@mentorg.com\" " Subject: RE: standard loads on 66 MHz PCI Date: Mon, 9 Nov 1998 15:05:00 -0800 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.2232.9) Content-Type: text/plain That is ture, but the simulations would still have to be run twice... Arpad ============================================================================ == To All: The IBIS Version 3.1 format could theoretically handle this multiple test load situation by using the [Model Selector] keyword to reference individual [Model] keywords containing the same information except for the individually specified test loads. However, it is likely that the user would to manually manage the analysis for testing the design corners. Bob Ross Interconnectix/Mentor Graphics > Date: Mon, 09 Nov 1998 13:01:02 -0700 > From: "D. C. Sessions" > Reply-To: IBIS Mailing list > To: IBIS Mailing list > Subject: Re: standard loads on 66 MHz PCI > Muranyi, Arpad wrote: > > > > All, > > > > I guess it is not impossible to come up with a fix to the IBIS spec to > > accommodate the various reference loads the PCI spec uses. But, to answer > > someone's question, I have only seen this kind of multiple reference loads in > > the PCI spec. so far. And, sorry, but I have no idea why it was done that > > way. > It actually maps into the requirements. Min has to be guaranteed at light > load to avoid violating the zero hold time spec in the face of clock skew; > the light load is possible in onboard point-to-point connections. > The max is necessary to guarantee avoiding setup violation on a loaded bus. > > To further complicate things, think about this. There is a separate min and max > > reference (test) load. But what are you supposed to use if you want to run a > > typical simulation? This makes me suggest that we should look into how to fix > > the PCI spec... > Fixing the PCI spec would be nice, (the 5v tolerant section has always > been ugly) and the timing is right since Intel has announced its end-of-life. > Less flippantly, it's probably too late. The fool thing has a life of > its own now. To get an idea, see how many 3.3v PCI systems you can find, > and then read the intro to the electricals where Intel announced that PCI > is intended to be a 3.3v bus but 5v is supported only as a transisition > path... > -- > D. C. Sessions > dc.sessions@vlsi.com From owner-ibis Tue Nov 10 05:04:36 1998 Received: from mail11.digital.com (mail11.digital.com [192.208.46.10]) by server.eda.org (8.8.5/8.8.3) with ESMTP id FAA21248 for ; Tue, 10 Nov 1998 05:04:35 -0800 (PST) Received: from sbuamazko2ae.zko.dec.com (sbuamazko2ae.zko.dec.com [16.29.160.92]) by mail11.digital.com (8.9.1a/8.9.1/WV2.0a) with ESMTP id IAA24658 for ; Tue, 10 Nov 1998 08:00:00 -0500 (EST) Received: by sbuamazko2ae.zko.dec.com with Internet Mail Service (5.0.1458.49) id ; Tue, 10 Nov 1998 07:59:57 -0500 Message-ID: <890ED1999E9CD01197A10000F84AA1F7FDFF45@sbuamapko3cc.eng.pko.dec.com> From: Andrew Ingraham To: "'ibis@eda.org'" Subject: RE: standard loads on 66 MHz PCI Date: Tue, 10 Nov 1998 07:59:49 -0500 X-Priority: 3 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.0.1458.49) Content-Type: text/plain Greg Edlund asked: > How new are these Tval loads? Version 2.2 (currently in draft, dated > June > 1998)? Much older than that. They became official at least as early as June 11, 1995, and were available in preliminary form a year before that. See Version 2.1, note 2 under Table 4-6, on page 134; and Figures 7-6, 7-7, and 7-8 on pages 227-228. Parts for the 5V PCI signaling environment use the two simple "lumped" test loads (0pF and 50pF), as these were already in place and in use for Version 2.0 (1993). Arpad Myranyi said: > The test load (and waveform) doesn't match the driver's real load > (and waveform) ... But I think they do! They are more realistic than the conventional 50pF lumped test load. The minimum load represents the limiting case of two PCI devices on a motherboard with no expansion slots and short etch; a strictly local bus. The maximum load represents that first nanosecond or so on a long bus, before the incident edge bounces off the open ends and returns to the driver. The waveform you get is ... well ... it's what you really get! Regards, Andy Ingraham From owner-ibis Tue Nov 10 11:04:26 1998 Received: from mail.hyperlynx.com (root@mail.hyperlynx.com [209.20.148.70]) by server.eda.org (8.8.5/8.8.3) with ESMTP id LAA22284 for ; Tue, 10 Nov 1998 11:04:15 -0800 (PST) Received: from tensor ([192.168.148.75]) by mail.hyperlynx.com (8.8.5/8.8.5) with SMTP id KAA29938 for ; Tue, 10 Nov 1998 10:59:34 -0800 Message-Id: <3.0.5.32.19981110105957.00fb7270@mail.nwlink.com> X-Sender: mbflora@mail.nwlink.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.5 (32) Date: Tue, 10 Nov 1998 10:59:57 -0100 To: ibis@eda.org From: Matthew Flora Subject: IBIS Open Forum Minutes 6 Nov 1998 Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" DATE: 11/10/98 SUBJECT: 11/6/98 EIA IBIS Open Forum Minutes VOTING MEMBERS AND 1998 PARTICIPANTS LIST: AMP (Martin Freedman) Applied Simulation Technology Norio Matsui, Raj Raghuram* Cadence Design (& UniCAD) C. Kumar, Don Telian, Patrick Riffault, Craig Lewis, Greg Fitzgerald, Paul Galloway, Patrick Dos Santos, Catherine Weiss, Alain Tribaudot, Geoffrey Ellis, Todd Westerhoff*, Ken Willis, Mike LaBonte* Cisco Systems Syed Huq*, Sergio Camerlo, Irfan Elahi Compaq Shariq Rahma, Jeff Chu, Bob Haller*, (Digital Equipment Corp.) Doug Burns, Steve Coe Cypress Bruce Wenniger H.A.S. Electronics Haruny Said Hewlett Packard (EEsof, etc.) Karl Kachigan, Henry Wu, Paul Gregory, Brenda Arena High Design Technology Razvan Ene HyperLynx Kellee Crisafulli, Matthew Flora*, Gene Garat, Dave Kohlmeier Incases Olaf Rethmeier, Scott Jacobson, Werner Rissiek Intel Corporation Stephen Peters*, Arpad Muranyi*, Frank Kern, (& formerly NCR) Will Hobbs, Prakash Radhakrishnan, Mohammed Hawana, Martin Chang, Dave Moxley, Tim Schreyer, Lynn Dell* LSI Logic (Symbios Logic) Larry Barnes Mentor Graphics (Zeelan, Bob Ross*, George Opsahl, Mark Noneman, Interconnectix, etc.) Tom Dagostino, Karine Loudet, Jean Oudinot, Manuel De Almeida, Stephane Rousseau, Neven Orhanovic*, Mohamed Mahmoud, Kevin Cohan Mitsubishi Tam Cao Motorola (Ron Werner) National Semiconductor Cheng-Yang Kao, John Goldie, Ikchang Song, Milt Schwartz* North East Systems Associates Edward Sayre, Kathy Breda, Michael Baxter, (NESA) Jon Green, Jinhua Chen NEC (Hiroshi Matsumoto) Quantic EMC (Mike Ventham) Texas Instruments Thomas Fisher, Harvey Stiegler, Vincent Chang, Jean-Claude Perrin, Peter Forstner Thomson-CSF Jean-Marc Claveau, Laurent Duzaic, Saverio Lerose, Benoit Meyniel, Jean Lefebvre Viewlogic Jon Powell, Chris Rokusek, Guy de Burgh, Gary Mandel VeriBest Ian Dodd, David Weins, Ian Gabbitas VLSI Technology D.C. Sessions Zuken-Redac (John Berrie) OTHER PARTICIPANTS IN 1998: 3Com Steve Miller 3Dfx Interactive Ken Wu A.T.Sinker Tony Sinker Actel Eric Tardif, Emmonvelle Gaudin Aerospatiale Lionel Dreux, Claude Huet Alcatel (Bell, Espace, etc.) John Fitzpatrick, W. Temmerman, Laure Bessettes, Jean-Claude Pourtau, Daniel Peron ALS Design Yves Mouquet Ansoft Eric Bogatin Apple Fred Floresca, Danny Itani Apteq Design Systems Dan FitzPatrick Atmel Ali Baktashian Avanti Nik Bannov* CERN Olivier Clere, Jean-Michel Sainson, Rudi Zurbroken Corning John Nieznanski Crucial Technology Rathna Reddy DIVA Corp Tieng Nguyen Dynamic Research Corporation Mike Walsh EIA Patti Rusher* EMC Fawn Engelmann, Fabrizio Zanella* ENST, Paris Jean-Jacques Charlot European CAD Standardization Adam Morawiec Intitiative (ECSI) Fairchild Semiconductor Peter LaFlamme Focus Technology John Salzillo, Gary Brophy, Mike Arieta, Jim Skane IBM Richard Steinle, Kevin Jackson, Greg Edlund* InRange Elliot Lipin Intracon Design Ltd. Derek Laidlaw Philips Semiconductor Todd Andersen Rockwell Semiconductor Tim Gilbert Scottish Electronics Robert Easson Manufacturing Center (SEMC) Seagate Vanessa Howard Signal Integrity Software Barry Katz SGS-Thomson Philippe Lefevre Siemens Gerald Bannert, Bernhard Unger, Christian Marot, Miguel Hernandez, Gil Russell SSEI Tom Hawkins Stratus Bruce Heilbrunn, Steve Mango, Lewis Steiner, Karla Eignor, Rich Newell Summit Computer Systems Bob Davis Sun Microsystems Lam Dong, Kevin Ko, Tay Ansari, Ken Weiss Symmetry Andy Hughes Tektronix Nassrin Ghahyasi, Tom Brinkoetter*, Brad Webb*, John Rettig* Teradyne Michael Khusid TranSwitch Bill Todd TRILOGIC Joe Socha Ultratest International Chris O'Connor Xilinx Susan Wu In the list above, attendees at the meeting are indicated by *. Principal members or other active members who have not attended are in parentheses. Participants who no longer are in the organization are in square brackets. Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as follows: Date Bridge Number Reservation # Passcode November 20, 1998 (916) 356-9200 3-241992 5578793 Monday, December 7, 1998 IBIS Summit Meeting - No Teleconference December 18, 1998 (916) 356-9200 3-241993 1195347 All meetings are 8:00 AM to 9:55 AM Pacific Time. We try to have agendas out 7 days before each Open Forum and meeting minutes out within 7 days after. When you call into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the reservation number and passcode. NOTE: "AR" = Action Required. -------------------------------- MINUTES ------------------------------------- INTRODUCTIONS AND MEETING QUORUM Tom Brinkoetter, Brad Webb, and John Rettig joined from Tektronix to discuss the IPA 510 Software Transfer Agreement offer to the EIA IBIS Open Forum. Lynn Dell from Intel joined primarily because of interest in the IPA 510 topic. Mike LaBonte of Cadence is involved in software development for EDA tools which use IBIS models. Greg Edlund joined from IBM. He is a signal integrity engineer involved initially in IBIS library creation and tool investigation. MEMBERSHIP UPDATE AND TREASURER'S REPORT As previously announced, H.A.S. Electronics is now an official EIA IBIS Open Forum Member Bob Ross stated that Cisco Systems is also a full member. REVIEW OF MINUTES AND AR'S No corrections were noted for the September 18, 1998 and October 15, 1998 meeting minutes. The ARs will be discussed during the meeting. MISCELLANY/ANNOUNCEMENTS Bob Ross announced a policy decision regarding listing of names on the participation list above. In the past we have kept names in square brackets, even when the individual has left the company in order to document the total scope of company participation. However, we understand that this may not be what the previous company or the individual wants. So we will remove the name when requested by the previous company, or by the individual or when notified of an address change by the individual. However, we will add back the names in square brackets to the last minutes of the year that are archived so we have a participation record for that year. PRESS AND WEB PAGE UPDATES Bob Ross reported the informative article "IBIS Evolves, Keeping Pace with Signal Integrity Issues: in the October 1998 issue of Printed Circuit Design, pp. 34-37 by Jon Powell and Don Mazur. Also there was mention of IBIS in the cover story article "Right the First Time, Enjoying the Full Measure of Library Management" by Randall Hartgrove, pp. 13-18 and 54. Bob also reported that "Free Utilities at Intusoft Site" in the October 19, 1998 issue of Electrical Engineering Times states that a free IBIS-to-Spice is available from http://www.intusoft.com. The press release also was printed in the November, 1998 issue of Printed Circuit Design on Page 56. Bob reported another article "Interconnectix Launches IBIS Models, Services" in the October 5, 1998 issue of Electrical Engineering Times, pg. 41 by Michael Santarini. Bob noted that a new EIA Web location http://www.eigroup.org is implemented, but the existing links are being maintained. Syed Huq added that the existing links will be kept via aliases, even if the IBIS directories are moved to a new site. Syed did a number of EIA IBIS Home page updates. He added a new Support page for direct email contact to the reflector and IBIS Model Review process. Syed added an Upcoming Events page for IBIS Summit registrations and contact. Also Syed stated that a large number of IBIS home page updates occurred in the roster, logo page and other areas. Bob noted that among the additional updates a link to the free Intusoft IBIS to Spice Free Utility utility under the newly named Free Tools link was added. Also a link to the EIAJ standard modeling group page was added in the Specs page. The link is http://tsc.eiaj.or.jp/tsc/SSC/iopg.htm Bob noted that some pages in Version 1.1 of IMIC are corrupted. However, the document is expected to be fixed soon. NEW MODELS AVAILABLE, LIBRARY UPDATE Matthew Flora reported that an American Microsystems, Inc. link for clock buffers has several IBIS models: http://www.amis.com/tgp Bob Ross reported the revised Atmel page with EPROM buffers: http://www.atmel.com/atmel/products/prod93.htm Motorola ECL/LCX changed to: http://mot2.mot-sps.com/models/bin/logic_ic.html Advanced Micro Devices (AMD) has a library of IBIS models at: http://www.amd.com/products/nvd/tools/fusion/ibis_models.html OPENS FOR NEW ISSUES - Patti Rusher asked Bob to contact Britt Brooks of the Compact Modeling Council regarding BSIM3 Version 3.2 standardization developments. - Bob Ross added BUG33 - Infinite Loop with Decreasing V/I Bad End Voltage - Also, Bob added the proposed golden parser enhancement discussion during the meeting. INTERNATIONAL/EXTERNAL PROGRESS - IEC 62014-1 (IBIS Version 2.1) - Patti Rusher stated that the standard is being distributed and reviewed very quickly. Bob Ross noted that the results of the September 23-25, 1998 IEC meeting in London were discussed in the last minutes. Bob had noted that the ratification of IEC 62014-1 was delayed because the IBIS Version 2.1 document had not been forwarded to the IEC Central Office for distribution. Patti Rusher properly forwarded the document, and it will be sent out for Committee Draft for Vote (CDV) on a fast track basis which should take about a year. Added note later in the meeting: Patti reported that Hajimu Mori has been named as co-chair of WG6 and that two US technical experts have been added: John Keets of SI2 and Jim St. Pierre of NIST. Patti also noted that Tabuchi-san of the Japanese delegation wants the IBIS committee to cooperate with the EIAJ committee regarding further work. Patti stated that the IMIC could fall under IEC TC93 activity working with the IBIS Open Forum or work through JEDEC. (Interaction has begun, as discussed below.) - pr EIAJ ED-5302 Standard for I/O Interface Model for Integrated Circuits (IMIC) - As previously reported, Bob Ross noted that he along with Will Hobbs (past Chair of the EIA IBIS Open Forum) and Stephen Peters (Vice-Chair), both from Intel, and some model and simulator development people from Mentor Graphics had recently met with Dr. Hideki Fukuda, Chair of the EIAJ committee on I/O Model for Integrated Circuits (IMIC). Ed Sayre and the staff at NESA had also had met with Dr. Fukuda. The agendas were to get more information and to investigate whether IBIS and IMIC can and should be merged or linked in some manner. In subsequent conversations, Bob responded to Dr. Fukuda's request to see whether the IBIS and IMIC activities could be merged. Bob's response was that such discussions would occur for Version 4.X IBIS since years of work and much corporate commitment exists for the current Version 3.1 and pending Version 3.2 levels of IBIS. However, to facilitate interaction, Bob asked Stephen Peters and Raj Raghuram to join him to review IMIC with respect to technical and practical concerns. Others are invited to join. This group will serve as a focal point for interaction with the EIAJ committee. Bob noted briefly that there exists several options: Continue as independent activities (with possible translator connections), have weak linkage (such as IBIS calling certain IMIC package and buffer models), or totally merge the documents. - IEC 93/67/NP IBIS and EMC Simulation - Bob Ross reported from a note from Jean-Claude Perrin, task force Chair under WG6. Jean-Claude reported that the task force met on September 22, 1998 and it decided to operate at zero level working on a PNW (Preliminary New Work Item). The first activity is to work on EMC modelization involving power supply emission driven by the internal clock activity of the device. - JC-16.2 Subcommittee: Modeling and Test - Bob Ross noted that the co-located JEDEC JC-16.2 and IBIS Meeting will be discussed below. - IEEE P1537 Electronic Data Format Project (Previously listed as the Standard Component Data Sheet) - Bob Ross noted that Stephen Peters has been following the activity. Stephen confirmed that he will probably not attend the November 11-12, 1998 meeting. IBIS (EAST) USERS GROUP MEETINGS Bob Haller reported on the most recent (November 5, 1998) Accuracy Committee meeting that the main discussion involved the DesignCon99 paper preparation, DesignCon99 booth (discussed later), and review of the constructive feedback on the draft document. Greg Edlund added that tasks include finishing the rough draft (filling in the missing sections), publishing the test design, writing an application note, and providing feedback on the comments. Fabrizio Zanella stated that work has been continuing in several Connector Committee meetings on the Connector BIRD, with the intention of having it ready for the February 1999 DesignCon99 meeting. IBISEAST OCTOBER 15, 1998 SUMMIT FEEDBACK Bob Ross asked for some feedback regarding the IBIS Summit Meeting. Bob Haller and Greg Edlund responded that they felt the presentations were very good and informative. They appreciated the feedback on the draft Accuracy Specification and plan to examine adding VT tables to the documents. They have provided a positive response to the reflector. Greg also noted that they appreciated Will Hobbs' presentation to move forward rapidly and to have the IBIS document keep pace with technology. Bob Ross felt this was a very good meeting but it may have been too packed. As previously noted, there were 10 presentations, an introductory presentation, a tutorial, and five demos. We may not have had as much interactive discussion as in other meetings. As previously noted 50 people from 29 organizations attended. The meeting was supported financially by 7 companies. Kathy Breda of NESA provide the logistics support by coordinated the meeting and free lunch arrangements, collecting and copying the presentations, and handling a lot of other details. Added note: All of the documentation and presentations for the meeting have been uploaded at: http://www.eda.org/pub/ibis/summits/oct98. JEDEC/IBIS DECEMBER 7, 1998 SUMMIT MEETING Bob Ross introduced the JEDEC Meeting scheduled in San Diego, California on Monday, December 7, 1998 from 12 Noon to 5 PM. The meeting will start with a free buffet lunch. It is co-located with the JEDEC meetings to promote interaction with the JEDEC JC-16.2 group on Modeling and Test. Patti Rusher noted that there are few sign-ups to date. Bob mentioned that this is typical since most sign-ups occur at the last minute. Several other people at the meeting indicated plans to attend. Bob invited JEDEC JC-16.2 members to give some general presentations for interactive discussions. Bob also noted that we might be able to discuss some IMIC issues. The JEDEC JC-16.2 meeting will occur on Tuesday morning, December 8, 1998. The IBIS Forum is invited to give a general overview of IBIS, and Stephen Peters will consider doing this presentation. Added note: Contact Patti Rusher (pattir@eia.org) or through the EIA IBIS home page Upcoming Events link to register for either or both the IBIS Summit meeting and any JEDEC meeting. The deadline for JEDEC registration is November 11, 1998. Information has been sent out per the previous AR. DESIGNCON99 FEBRUARY 1, 1999 SUMMIT MEETING Bob Ross summarized that the IBIS Open Forum had accepted the proposal of being an Associate Sponsor of DesignCon99 at the October 15, 1998 IBIS Summit meeting. Among the benefits, DesignCon99 would provide the IBIS Open Forum a meeting room, food and refreshments for the IBIS Summit Meeting on Monday, February 1, 1999 and also provide us a 10 by 10 booth. Bob reported that National Semiconductor will also be a co-sponsor by possibly providing a buffet lunch beyond what DesignCon99 is offering. Milt Schwartz agreed to provide logistical support by helping in sign-up and in collecting and copying presentations. National Semiconductor has sponsored and funded all of the previous meetings. Bob asked, and Patti Rusher responded that EIA has not yet been in contact with DesignCon99 to formalize the contract. Bob noted that he will be confirming with Jon Powell on whether Jon will coordinate the booth activity. Bob also is planning that the booth be used for the Accuracy Committee hardware demo. Greg Edlund noted that the Accuracy Committee has arranged for more Hewlett-Packard equipment than at the October 15, 1998 Summit meeting and is planning to use the booth. Greg asked if a CAE vendor could also be in the booth to show simulations that correlate with measurement. Bob stated that we should not provide such a a single EDA vendor presentation in order to preserve the IBIS vendor-neutral basis of operation. Instead, IBIS Open Forum member companies may have placards at the booth and provide directions to their booths at the show. Information can be distributed, and IBIS members can meet and participate in the booth to discuss IBIS activities with others. VERSION 3.2 PARSER DEVELOPMENT Bob Ross noted that the preliminary parser for ibischk3 Version 3.2.0 had been distributed, and preliminary Version 3.2.1 with some fixes has just been sent out by Matthew Flora on November 2, 1998. The parser source and Windows executable was sent to the 12 companies funding the project. Bob noted the BIRDs and BUGs fixed in each release: Version 3.2.0: [Add Submodel] and [Submodel] (Birds 48.3, 49.4, 50.3) Relaxation of file name restrictions (Bird46.1) 3-state_ECL model type (BIRD51) BUG25 and BUG30 Version 3.2.1: BUG30 improvements ([Pin Mapping] tests Pending BUG32 (discussed below) Other fixes and wording Bob noted that he used the parser and corrected a mistake in the sample file for dynamic clamps stored as; http://www.eda.org/pub/ibis/samples/ver3.2/dclamptr.ibs Nik Bannov asked if non-member companies can purchase the parser. Bob's response was yes. Furthermore, in response to Nik's question, the purchase of any source code license for any parser such as for ibischk3 applies to ALL releases including FUTURE upgrades. For example all companies who have purchased the Version 3.0 license will get source code parser updates for all subsequent 3.X versions. There is no additional charge for the upgrades. Bob noted that there was some email discussion on the ibischk-bug reflector between Atul Agarwal, Chris Rokusek and Matthew Flora regarding some ibischk3 global variables. Matthew gave some background and will supply agreed upon fixes to Atul where needed. No BUG report is needed for this. Matthew stated who is on the ibischk-bug list. The list was set up originally to facilitate communications among a group dealing with ibischk3 project and technical details. Much of the detailed bug reporting/fixing decisions may not be of general interest. Occasionally some of the BUGs and responses are sent to the IBIS reflector. Bob noted that anyone can join the ibischk-bug list and encourage any individual who has an interest in the ibischk3 project details to contact Matthew Flora (addresses are at the end). While the email list for ibischk3 source code distribution consists of just one contact address for each of the 12 funding members, Matthew is willing to expand the list to include other people within the 12 companies so that they get the code immediately. Contact Matthew if you want to be added to the source code distribution list. VERSION 3.2 RATIFICATION Bob Ross noted that he is planning meetings on Friday, November 20, 1998 and Friday, December 18, 1998 so that we can ratify IBIS Version 3.2 at the December meeting. We have to close some issues, do some more editorial review and generate the documents for a formal vote. Matthew Flora later commented on lack of clarity regarding usage of NA in VT tables - per some recent reflector email. Bob felt this could be dealt with as an editorial fix on the document in preparation for ratification (versus generating a BIRD). Bob indicated that he may upload a new unofficial IBIS document ver3_2c.ibs per official ratification of the BIRDs to be discussed later. Added note: ver3_2c.ibs has been uploaded under http://www.eda.org/pub/ibis/wip/ver3_2.c Bob noted that the editing committee BNF AR remains. AR - Bob Ross generate and post a BNF for IBIS Version 3.0 (an IBIS Version 3.0 ratification AR). TEKTRONIX IPA 510 SOFTWARE DISTRIBUTION PROPOSAL Brad Webb and other Tektronix people summarized the background of a proposal to transfer the Tektronix IPA 510 software to the EIA IBIS Open Forum. Tektronix has discontinued support for IPA 510 product for business reasons. However, Tektronix would still like it to be supported because it is still useful for promoting hardware sales. The IPA 510 is used to extract model information from the results of TDR measurements. The associated hardware system is still being sold. Mentor Graphics suggested that Tektronix contact the IBIS Open Forum since the product has been used for IBIS model parameter extraction. Syed Huq reported that he used the software to get package model and C_comp information as well as to extract VT tables. Tektronix wants the IPA 510 software to be maintained and upgraded. In response to some discussions, Tektronix generated a Software Transfer Agreement for review by EIA, the contracting body, on behalf of the IBIS Open Forum. Patti Rusher reported that the EIA legal department had reviewed the document and found it acceptable. Bob Ross summarized the key points of the agreement (some of the formal language is not included below): Tektronix assigns free of charge all rights, title, and interest in the IPA 510 software to the IBIS Open Forum, subject to a royalty-free perpetual license to Tektronix to make, use, sell, license, and generate derivative works. The software is delivered as is. Legal disclaimers are included. The IBIS Open Forum agrees to maintain and support the IPA 510 software and make available executable copies without cost. The IBIS Open Forum agrees to ONLY provide source code to users who are willing to provide back to the IBIS Open Forum any source code enhancements. Patti Rusher reported that the EIA legal department had reviewed the document and found it acceptable. A general discussion then took place. Most of the points are captured below. Several people endorsed the software. Syed reported that the software was in good shape and "bug free". Fabrizio Zanella and Raj Raghuram questioned further why Tektronix was doing this and how this relates to IBIS. The Tektronix people elaborated that for business reasons Tektronix could not provide further support. Others stated that it could be used for model parameter extraction. Existing and future customers of their hardware product may need to do IPA 510 software upgrades. Bob was most concerned about what the expectations were regarding source code distribution. The Tektronix people had in mind a GNU type license moderated by a "gate-keeper" who would maintain the software and make upgrades. Bob validated that Tektronix expected more than just a software "shrink wrap" license distribution for just agreeing to the terms, but without provisions for software upgrades. A number of "what if" scenarios were discussed. While the executables are useful as is, they are configured only for Windows 95. The output syntax follows the PSpice format. The product manual is included in the executable softwares. Bob asked, and Tektronix responded that they would deliver the executable without the license plug ("dongle"). So even existing users would have added flexibility on where to use the software. The general consensus at the meeting was to move forward. There did not appear to be any problems regarding direct distribution of the executable code from a Web link. However, more investigation is needed regarding how to handle source code distribution. Bob proposed that Patti and Bob work with the EIA legal staff to generate an amended Software Transfer Agreement for the purposes of transferring only the IPA 510 executable. This can be accomplished rapidly and mostly involves deleting the source code distribution paragraph of the existing Agreement. AR - Bob Ross and Patti Rusher generate a revised Agreement to transfer only the IPA 510 executable code to the IBIS Open Forum. This could be approved at the next meeting. Patti suggested further work is needed to document more clearly the expectations and terms for source code transfer. Bob suggested he, Syed, and Patti work on such details on how the IBIS Open Forum would actually manage the source code. The general description of these details would be added to a DIFFERENT Software Transfer Agreement for the source code. This Agreement would then be sent back to Tektronix. AR - Bob Ross, Syed Huq, and Patti Rusher work on details for a Software Transfer Agreement for the Source code. COOKBOOK STATUS (Not Discussed) IBIS MODEL REVIEW COMMITTEE DISCUSSION Bob Ross noted briefly that Matthew Flora has distributed IBIS models from Motorola, CERN, Galileo for review. Bob also stated that he and probably others have been too busy to respond yet. Bob does plan to respond shortly. (Matthew Flora is the contact person with contact information listed below and with the new IBIS Support link from the EIA IBIS home page noted above. The existing AR remains in effect: AR - Matthew Flora issue to the IBIS reflector a short write-up on the IBIS Model Review Committee. BIRD54 - Package Model Corrections (VOTE) Bob Ross briefly noted that BIRD54 was issued to correct an unintended mistake in the IBIS Version 3.1 document. IBIS Version 3.1 supports uncoupled, cascaded transmission line sections in the package model description, but one section implied that the existing Version 2.1 Matrix format was still required. The release ibischk3, version 3.1.0 parser supports this mistake per compliance with the document. BIRD54 modifies some tables and notes to clarify when the Matrix format is not required. BIRD54 was approved by unanimous vote. BUG32 - Package Model Lumped and Distributed Syntax Not Correct Bob Ross classified BUG32 as Severe and High as a result of BIRD54 approval. It is Closed pending check out as a result of it already being fixed in the distributed preliminary ibischk3 version 3.2.1. [Done] BIRD55 - [Model Spec] Vmeas Addition Bob Ross introduced BUG55 by noting that the Vmeas value may differ for some technologies such as PECL with min and max column [Model] tables. Arpad Muranyi questioned the meaning of min and max columns, and Bob responded that within the [Model] keyword, most (except for C_comp) typ-min-max columns are to be used together to define the typical, slow-weak, and fast-strong corners. In all cases the min column for the various supply voltages are also the numerically lowest magnitude values. Similarly, the max column for the various supply voltages are for the numerically largest magnitude values. With PECL technology, the min and max column supply values can vary in a manner which causes a currently defined fixed Vmeas point to not be what is intended (or even out of operating range) for min and max column model simulation. CMOS technology specified as a percentage of Vcc would have a similar problem. The proposal is to modify the existing [Model Spec] keyword to include the Vmeas subparameter. The keyword already supports typ-min-max column entries for specification data. Even though the general consensus was in support of BIRD55, not enough time remained to conclude the discussion and vote on BIRD55. The discussion will be continued, and a vote is scheduled on BIRD55 at the next meeting. Todd Westerhoff noted that other parameters for detailed flight time specification might be needed. SERIES ELEMENTS RESTRICTION (No discussion) 100 POINT BIRD? (Not discussion) EIAJ IMIC TECHNICAL DISCUSSION Since little time remained, Bob Ross suggested technical discussion of IMIC could be added as a topic to the IBIS Summit meeting on December 7, 1998. BUG31 - Error for [Pulldown] Decreasing Current Should be Warning (No discussion) BUG33 - Infinite Loop with Decreasing V/I Bad End Voltage (New Item) Bob noted briefly that Matthew Flora discovered a hang condition and knows how to fix the problem. Bob classified BUG33 as Severe, High, and Open. Matthew should report the fix to Atul Agarwal. PROPOSED GOLDEN PARSER ENHANCEMENTS (New Item) As a new item Matthew Flora indicated that there were some enhancements needed to ibischk3 to catch some more mistakes IBIS model developers typically make. Bob Ross stated that the main priority is to finalize ibischk3 Version 3.2.x for compliance with the pending IBIS Version 3.2. Further enhancements are valuable, but could be deferred to a later ibischk3 release after parser and specification ratification. The exact set of proposed enhancements would eventually be documented and reviewed through the BUG document process. NEXT MEETING: The following meeting will be on Friday, November 20, 1998 from 8:00 AM to 10:00 AM. A vote on BIRD55 is scheduled. ============================================================================== NOTES IBIS CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897 bob_ross@mentorg.com Modeling Engineer, Interconnectix BU of Mentor Graphics 8005 S.W. Boeckman Road, Wilsonville, OR 97070 VICE CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-4515 sjpeters@ichips.intel.com Senior Hardware Engineer, Intel Corporation M/S JF1-56 2111 NE 25th Ave. Hillsboro, Oregon 97124-5961 SECRETARY: Matthew Flora (425) 869-2320, Fax: (425) 881-1008 mbflora@hyperlynx.com Senior Engineer, HyperLynx, Inc. 17641 NE 67th Court Redmond, WA 98052 LIBRARIAN: Jon Powell (805) 988-8250, Fax: (805) 988-8259 jonp@qdt.com Senior Scientist, Viewlogic Systems(formerly Quad Design) 1385 Del Norte Rd., Camarillo, CA 93010 This meeting was conducted in accordance with the EIA Legal Guides and EIA Manual of Organization and Procedure. The following e-mail addresses are used: ibis-request@eda.org To join, change, or drop from either the IBIS Open Forum Reflector (ibis@eda.org), the IBIS Users' Group Reflector (ibis-users@eda.org) or both. State your request. ibis-info@eda.org To obtain general information about IBIS, to ask specific questions for individual response, and to inquire about joining the EIA-IBIS Open Forum as a full Member. ibis@eda.org To send a message to the general IBIS Open Forum Reflector. This is used mostly for IBIS Standardization business and future IBIS technical enhancements. Job posting information is not permitted. ibis-users@eda.org To send a message to the IBIS Users' Group Reflector. This is used mostly for IBIS clarification, current modeling issues, and general user concerns. Job posting information is not permitted. ibischk-bug@eda.org To report ibischk2 parser bugs. The Bug Report Form Resides on eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs. To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt, /pub/ibis/bugs/s2ibis2/bugs2i2.txt, & /pub/ibis/bugs/s2iplt/bugsplt.txt respectively. Information on IBIS technical contents, IBIS participants, and actual IBIS models are available on the IBIS Home page found by selecting the Electronic Information Group under: http://www.eia.org Check the pub/ibis directory on eda.org for more information on previous discussions and results. You can get on via FTP anonymous. ============================================================================== From owner-ibis Tue Nov 10 17:26:23 1998 Received: from mail-gw5.pacbell.net (mail-gw5.pacbell.net [206.13.28.23]) by server.eda.org (8.8.5/8.8.3) with ESMTP id RAA23460 for ; Tue, 10 Nov 1998 17:26:21 -0800 (PST) Received: from pacbell.net (ppp-209-79-182-129.vntrcs.pacbell.net [209.79.182.129]) by mail-gw5.pacbell.net (8.8.8/8.7.1+antispam) with ESMTP id RAA18704; Tue, 10 Nov 1998 17:21:48 -0800 (PST) Message-ID: <3648E6C9.DDB53096@pacbell.net> Date: Tue, 10 Nov 1998 17:22:17 -0800 From: Jon Powell Reply-To: jonp@qdt.com Organization: Viewlogic Consulting Services X-Mailer: Mozilla 4.04 [en]C-PBI-NC404 (Win95; I) MIME-Version: 1.0 To: ibis@vhdl.org Subject: Model Page Update Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Fellow Ibis Lovers, The IBIS page has been updated using inputs from you the loyal IBIS fans from the past few months. Please send any other additions my way. regards, jon - ibis librarian From owner-ibis Wed Nov 11 09:02:31 1998 Received: from hebe.or.intel.com (hebe.or.intel.com [134.134.248.4]) by server.eda.org (8.8.5/8.8.3) with ESMTP id JAA25916 for ; Wed, 11 Nov 1998 09:02:30 -0800 (PST) Received: from ichips-jf.jf.intel.com (ichips-jf.jf.intel.com [134.134.50.200]) by hebe.or.intel.com (8.8.6/8.8.5) with ESMTP id JAA08854 for ; Wed, 11 Nov 1998 09:07:49 -0800 (PST) Received: from xtg801.pdx.intel.com (xtg801.pdx.intel.com [134.134.114.35]) by ichips-jf.jf.intel.com (8.8.8/8.8.7) with ESMTP id IAA28939 for ; Wed, 11 Nov 1998 08:57:58 -0800 (PST) Received: from ichips.intel.com by xtg801.pdx.intel.com (8.8.8/WW2.2 (Jones Farm)) id IAA24262; Wed, 11 Nov 1998 08:57:57 -0800 (PST) Message-Id: <199811111657.IAA24262@xtg801.pdx.intel.com> X-Mailer: exmh version 2.0delta 6/3/97 To: ibis@eda.org Subject: Survey on IBIS 3.1 support Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Wed, 11 Nov 1998 08:57:56 -0800 From: Stephen Peters Hello All: I've been asked by my management to put together a presentation on IBIS 3.1, and for this presentation I'd like to get an idea of the number of CAE vendors that support the keywords and capabilities that are new to IBIS version 3.1. To that end I've put together the following survey. Please note that the information gathered will be presented in summary form only -- the purpose of this survey is not to compare products, but only to gauge industry support/acceptance of specific IBIS 3.1 features. Feel free to mail this directly back to Stephen Peters at sjpeters@ichips.intel.com. Thanks for you time. Regards, Stephen Peters Intel Corp. Keyword/Feature Now/3mon 6mon 1year No Plans ---------------- -------- ---- ----- -------- [Series Pin Mapping] [Series Switch Groups] [Model Selector] [Model Spec] [Driver Schedule] [TTgnd] [TTpwr] Terminator Model Series Switch [Series Current] [Series Mosfet] Enhanced Package Description EBD files From owner-ibis Wed Nov 11 10:45:02 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.eda.org (8.8.5/8.8.3) with ESMTP id KAA26082 for ; Wed, 11 Nov 1998 10:45:01 -0800 (PST) Received: from em-wv03.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id KAA22922; Wed, 11 Nov 1998 10:39:59 -0800 (PST) Received: from bob by em-wv03.wv.mentorg.com (8.8.8/CF5.40R) id KAA21497; Wed, 11 Nov 1998 10:39:57 -0800 (PST) From: bob_ross@mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA19198; Wed, 11 Nov 98 10:39:54 PST Date: Wed, 11 Nov 98 10:39:54 PST Message-Id: <9811111839.AA19198@bob> To: ibis@eda.org Subject: IBIS/JEDEC SUMMIT MEETING To All: This is a reminder to for those planning to attend the December 7, 1998 IBIS SUMMIT MEETING and JEDEC JC-16.2 and JC-42 MEETINGS to sign up. You can also sign up through the Upcoming Events Link on the IBIS home page. Bob Ross Mentor Graphics. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------- ****************** REMINDER NOTICE ******************** ------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ------------------------------------------------------- IBIS/JEDEC SUMMIT CALL FOR PARTICIPATION, PRESENTATIONS ------------------------------------------------------- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ I B I S S U M M I T M E E T I N G Time/Date: 12:00 PM - 5:00 PM, Monday, December 7, 1998 Location: Kona Kai Continental Hotel 1551 Shelter Island Drive San Diego, CA 92106-3102 Tel: 619-221-8000 Fax: 619-221-5953 Content: Interchange of ideas with JEDEC JC16.2 Subcommittee on Modeling and Test Purpose: Solicit and Exchange IBIS Model Related Information and Ideas. Sponsors: EIA Contact for Signup for IBIS Meeting and FREE Buffet Lunch: Patti Rusher pattir@eia.org J E D E C M E E T I N G S Time/Date: 8:00 AM - 5 PM, Tuesday, December 8, 1998 Content: IBIS Participants are invited to the JEDEC JC16.2 meeting also to view and discuss issues of mutual concern. You must signup for these meetings to be formally invited. Schedule of Meetings: JC16.2 - Modeling and Test: Tuesday Morning, December 8, 1998 JC42 - Memories: Tuesday Afternoon, December 8, 1998 Deadline: JEDEC Meeting Registration Deadline is November 11, 1998 Contact for Signup to JEDEC Meeting: Patti Rusher pattir@eia.org URL for JC42 Schedule: http://www.jedec.org BACKGROUND The JEDEC committee is involved in standardization activities from the physical device point of view. D.C. Sessions of VLSI Technology has been active in both JEDEC JC16.2 and the EIA IBIS Open Forum. The joint/co- located meeting offers several opportunities: EDA people can understand some real device modeling and testing concerns and the semiconductor people can understand the applicability of IBIS models and corresponding simulation tools. The IBIS format is being considered as the template for a JEDEC data sheet proposal. The proposal is to provide the envelope tables and data for the I/O characteristics and pin capacitance for SSTL2 related specifications. Interaction with IBIS experts will be very helpful. The IBIS meeting will be conducted as a formal IBIS Summit meeting. Presentations are expected to be available and archived in an electronic format, and minutes of the meeting will be issued. Any pending formal decisions (votes) will be announced at least two weeks prior to the meeting. JEDEC MEMBERS ARE INVITED TO PROVIDE PRESENTATIONS ON CURRENT TECHNOLOGIES SUCH AS SSTL AND HSTL, ETC., AND ASSOCIATED MODELING/SIMULATION ISSUES TO THE IBIS SUMMIT MEETING TO PROMOTE INTERACTION AMONG TECHNICAL EXPERTS. CALL FOR PRESENTATIONS We are seeking presentations from individuals who have IBIS experiences or issues. Format of Presentation: Overhead Projections Time: 15-30 Minutes Electronic Archival: We request electronic versions so that the presentations can be archived and also made available to non-attendees. Formats used in the past have been text, Power Point, Word, Postscript, and Acrobat. Plan to bring about 30 copies for distribution at the meeting. If you plan a presentation, please supply Title: Presenter: E-mail address: Company: Telephone: Estimate Time: Send this to: Bob Ross bob_ross@mentorg.com AGENDA The agenda includes presentations, discussions, a break, and a luncheon (which will be provided). In addition, we will have an opportunity for Ad Hoc presentations. From owner-ibis Wed Nov 11 11:58:32 1998 Received: from mail.nwlink.com (mail.nwlink.com [209.20.130.40]) by server.eda.org (8.8.5/8.8.3) with ESMTP id LAA26262 for ; Wed, 11 Nov 1998 11:58:31 -0800 (PST) Received: from hyperstar (ip197.du2.lynn.nwlink.com [209.20.140.197]) by mail.nwlink.com (8.9.1a/8.9.1) with SMTP id LAA23880; Wed, 11 Nov 1998 11:53:54 -0800 (PST) Message-Id: <3.0.32.19981111115339.0096f920@mail.nwlink.com> X-Sender: kellee@mail.nwlink.com X-Mailer: Windows Eudora Pro Version 3.0 (32) Date: Wed, 11 Nov 1998 11:53:41 -0800 To: bob_ross@mentorg.com (Bob Ross), ibis@eda.org From: Kellee Crisafulli Subject: Re: IBIS/JEDEC SUMMIT MEETING Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Hi Bob,IBIS, What do we mean by an IBIS SUMMIT MEETING? I feel there is an official aspect to the IBIS SUMMIT MEETINGS and that active IBIS members should make a best effort to attend. Is this really a summit meeting? There is an IBIS SUMMIT MEETING at Design Con it seems like this is very close spacing for IBIS SUMMIT MEETINGS. Many of us have other jobs and don't wish to miss major SUMMIT meetings but I object to the close spacing of these two SUMMIT meetings. Could we re-title this as a joint IBIS JEDEC meeting without the official aspects of a summit. Kellee At 10:39 AM 11/11/98 PST, Bob Ross wrote: >This is a reminder to for those planning to attend the December 7, 1998 >IBIS SUMMIT MEETING and JEDEC JC-16.2 and JC-42 MEETINGS to sign up. From owner-ibis Wed Nov 11 12:33:34 1998 Received: from mail-gw2.pacbell.net (mail-gw2.pacbell.net [206.13.28.53]) by server.eda.org (8.8.5/8.8.3) with ESMTP id MAA26326 for ; Wed, 11 Nov 1998 12:33:33 -0800 (PST) Received: from pacbell.net (ppp-209-79-182-207.vntrcs.pacbell.net [209.79.182.207]) by mail-gw2.pacbell.net (8.8.8/8.7.1+antispam) with ESMTP id MAA04416; Wed, 11 Nov 1998 12:29:00 -0800 (PST) Message-ID: <3649F3A2.26E20538@pacbell.net> Date: Wed, 11 Nov 1998 12:29:22 -0800 From: Jon Powell Reply-To: jonp@qdt.com Organization: Viewlogic Consulting Services X-Mailer: Mozilla 4.04 [en]C-PBI-NC404 (Win95; I) MIME-Version: 1.0 To: ibis@vhdl.org Subject: IBIS Booth at DesignCon99 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Hi, Bob has asked me to organize the IBIS booth at DesignCon. It looks like the physical space will be occupied with some measurement hardware for showing off the accuracy board. This fits in well with the DesignCon focus. I was thinking that it would be nice to use the backdrop space to show IBIS members info along with a general purpose bullet sign about IBIS itself. I am leaning toward allowing each IBIS member company a small sign (8.5X11?) that contains only the company LOGO and booth number (of your companies DesignCon booth). What do you think? Please feel free to send replies and ideas direct to me if you don't want to clog the reflector. jonp@pacbell.net regards, jon powell - ibis librarian From owner-ibis Wed Nov 11 13:06:04 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.eda.org (8.8.5/8.8.3) with ESMTP id NAA26420 for ; Wed, 11 Nov 1998 13:06:03 -0800 (PST) Received: from em-wv03.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id NAA13313; Wed, 11 Nov 1998 13:01:00 -0800 (PST) Received: from bob by em-wv03.wv.mentorg.com (8.8.8/CF5.40R) id NAA12307; Wed, 11 Nov 1998 13:00:58 -0800 (PST) From: bob_ross@mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA19272; Wed, 11 Nov 98 13:00:58 PST Date: Wed, 11 Nov 98 13:00:58 PST Message-Id: <9811112100.AA19272@bob> To: ibis@eda.org, kellee@hyperlynx.com Subject: Re: IBIS/JEDEC SUMMIT MEETING Kellee: I regard all face-to-face IBIS meetings where all members are invited as Summit meetings. These are official meetings per EIA rules where business can be conducted and minutes are published to the IBIS reflectors. We did do one formal business item at the recent Summit meeting in Boxboro, Massachusetts. I do not expect any major issues to be resolved at the December Summit Meeting. Its main purpose is for mutual interaction with JEDEC JC-16.2 which handles Modeling and Test. Others have expressed interest in holding such a meeting, and I am following through. Best Regards, Bob Ross Mentor Graphics > Date: Wed, 11 Nov 1998 11:53:41 -0800 > To: bob_ross (Bob Ross), ibis@eda.org > From: Kellee Crisafulli > Subject: Re: IBIS/JEDEC SUMMIT MEETING > Hi Bob,IBIS, > What do we mean by an IBIS SUMMIT MEETING? > I feel there is an official aspect to the IBIS SUMMIT MEETINGS > and that active IBIS members should make a best effort to attend. > Is this really a summit meeting? > There is an IBIS SUMMIT MEETING at Design Con it seems like this > is very close spacing for IBIS SUMMIT MEETINGS. > Many of us have other jobs and don't wish to miss major SUMMIT meetings > but I object to the close spacing of these two SUMMIT meetings. > > Could we re-title this as a joint IBIS JEDEC meeting without the > official aspects of a summit. > Kellee > At 10:39 AM 11/11/98 PST, Bob Ross wrote: > >This is a reminder to for those planning to attend the December 7, 1998 > >IBIS SUMMIT MEETING and JEDEC JC-16.2 and JC-42 MEETINGS to sign up. From owner-ibis Wed Nov 11 16:07:03 1998 Received: from jasper.cisco.com (jasper.cisco.com [171.69.198.63]) by server.eda.org (8.8.5/8.8.3) with ESMTP id QAA26759 for ; Wed, 11 Nov 1998 16:07:02 -0800 (PST) Received: (shuq@localhost) by jasper.cisco.com (8.8.5-Cisco.2-SunOS.5.5.1.sun4/8.6.5) id QAA02514; Wed, 11 Nov 1998 16:01:07 -0800 (PST) Date: Wed, 11 Nov 1998 16:01:07 -0800 (PST) From: Syed Huq Message-Id: <199811120001.QAA02514@jasper.cisco.com> To: ibis@eda.org, kellee@hyperlynx.com, bob_ross@mentorg.com Subject: Re: IBIS/JEDEC SUMMIT MEETING Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Content-MD5: t6jcbh09XfsrYOzArFbICQ== Hello: I tend to agree with Kellee. Since 1993 we always had 'Summit' meetings twice a year. DAC(~July) and DesignCon(~Feb). The recent IBIS east and the upcoming IBIS/JEDEC is really a first time kind of a meeting where no IBISv3.x standard related issues were/are going to be resolved/discussed.. If this IBIS east is going to be a yearly event starting 1998 then it falls into a 'Summit' category.. This is my personal opinion. Regards, Syed Cisco Systems,Inc > From bob_ross@mentorg.com Wed Nov 11 13:03:03 1998 > X-SMAP-Received-From: outside > From: bob_ross@mentorg.com (Bob Ross) > Date: Wed, 11 Nov 98 13:00:58 PST > To: ibis@eda.org, kellee@hyperlynx.com > Subject: Re: IBIS/JEDEC SUMMIT MEETING > > Kellee: > > I regard all face-to-face IBIS meetings where all members > are invited as Summit meetings. These are official > meetings per EIA rules where business can be conducted and > minutes are published to the IBIS reflectors. We did do one > formal business item at the recent Summit meeting in > Boxboro, Massachusetts. > > I do not expect any major issues to be resolved at the > December Summit Meeting. Its main purpose is for mutual > interaction with JEDEC JC-16.2 which handles Modeling > and Test. Others have expressed interest in holding > such a meeting, and I am following through. > > Best Regards, > Bob Ross > Mentor Graphics > > > > Date: Wed, 11 Nov 1998 11:53:41 -0800 > > To: bob_ross (Bob Ross), ibis@eda.org > > From: Kellee Crisafulli > > Subject: Re: IBIS/JEDEC SUMMIT MEETING > > > > Hi Bob,IBIS, > > > What do we mean by an IBIS SUMMIT MEETING? > > I feel there is an official aspect to the IBIS SUMMIT MEETINGS > > and that active IBIS members should make a best effort to attend. > > > Is this really a summit meeting? > > > There is an IBIS SUMMIT MEETING at Design Con it seems like this > > is very close spacing for IBIS SUMMIT MEETINGS. > > Many of us have other jobs and don't wish to miss major SUMMIT meetings > > but I object to the close spacing of these two SUMMIT meetings. > > > > Could we re-title this as a joint IBIS JEDEC meeting without the > > official aspects of a summit. > > > Kellee > > > At 10:39 AM 11/11/98 PST, Bob Ross wrote: > > >This is a reminder to for those planning to attend the December 7, 1998 > > >IBIS SUMMIT MEETING and JEDEC JC-16.2 and JC-42 MEETINGS to sign up. > > > From owner-ibis Wed Nov 11 17:23:40 1998 Received: from relayhost.vlsi.com (relayhost.vlsi.com [134.27.20.24]) by server.eda.org (8.8.5/8.8.3) with ESMTP id RAA26914 for ; Wed, 11 Nov 1998 17:23:39 -0800 (PST) Received: (from smtp@localhost) by relayhost.vlsi.com (SMI-8.6/) id RAA17798; Wed, 11 Nov 1998 17:17:28 -0800 Received: from (tem-pbx1.tempe.vlsi.com [134.27.128.26]) by isis.vlsi.com via smap (V2.0) id xma017793; Wed, 11 Nov 98 17:17:01 -0800 Received: from vlsi.com (witsend.tempe.vlsi.com [134.27.133.12]) by tem-pbx1.tempe.vlsi.com with SMTP (Microsoft Exchange Internet Mail Service Version 5.5.2232.9) id TXYVF95N; Wed, 11 Nov 1998 18:15:53 -0700 Sender: dsession@vlsi.com Message-ID: <364A370C.A976A8FC@vlsi.com> Date: Wed, 11 Nov 1998 18:17:00 -0700 From: "D. C. Sessions" Organization: VLSI Technology Inc. X-Mailer: Mozilla 4.06 [en] (X11; U; SunOS 5.5.1 sun4m) MIME-Version: 1.0 To: Syed Huq CC: ibis@eda.org, kellee@hyperlynx.com, bob_ross@mentorg.com Subject: Re: IBIS/JEDEC SUMMIT MEETING References: <199811120001.QAA02514@jasper.cisco.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Syed Huq wrote: > > Hello: > > I tend to agree with Kellee. Since 1993 we always had 'Summit' meetings > twice a year. DAC(~July) and DesignCon(~Feb). > > The recent IBIS east and the upcoming IBIS/JEDEC is really a first time > kind of a meeting where no IBISv3.x standard related issues were/are going to > be resolved/discussed.. > > If this IBIS east is going to be a yearly event starting 1998 then it falls > into a 'Summit' category.. There *will* be standards issues discussed, and the only reason we probably won't resolve them would be that they are too new to act hastily on them. The JEDEC group are people in semiconductor companies working on (or sometimes beyond) the bleeding edge of current capabilities. This isn't DesignCon where the big struggle is still to get people to take SI seriously; these people BREATH SI, but have been too close to the silicon and are only now coming to need IBIS as a specification tool. In the domain they're working in, its power as a specification language is stressed. That's GOOD news, because we need their insight into future needs to avoid having to play catch-up. Meanwhile JC16.2 is also dealing with the issues of verification at the specification level. They've been burned in the past by passing a standard that looked good in an Excel spreadsheet but didn't work in real life; they want simulatable specs. IBIS, and also they really want to make alliances with the EDA companies; they're not presently represented at all in JEDEC. > > From bob_ross@mentorg.com Wed Nov 11 13:03:03 1998 > > X-SMAP-Received-From: outside > > From: bob_ross@mentorg.com (Bob Ross) > > Date: Wed, 11 Nov 98 13:00:58 PST > > To: ibis@eda.org, kellee@hyperlynx.com > > Subject: Re: IBIS/JEDEC SUMMIT MEETING > > > > Kellee: > > > > I regard all face-to-face IBIS meetings where all members > > are invited as Summit meetings. These are official > > meetings per EIA rules where business can be conducted and > > minutes are published to the IBIS reflectors. We did do one > > formal business item at the recent Summit meeting in > > Boxboro, Massachusetts. > > > > I do not expect any major issues to be resolved at the > > December Summit Meeting. Its main purpose is for mutual > > interaction with JEDEC JC-16.2 which handles Modeling > > and Test. Others have expressed interest in holding > > such a meeting, and I am following through. > > > > Best Regards, > > Bob Ross > > Mentor Graphics > > > > > > > Date: Wed, 11 Nov 1998 11:53:41 -0800 > > > To: bob_ross (Bob Ross), ibis@eda.org > > > From: Kellee Crisafulli > > > Subject: Re: IBIS/JEDEC SUMMIT MEETING > > > > > > > Hi Bob,IBIS, > > > > > What do we mean by an IBIS SUMMIT MEETING? > > > I feel there is an official aspect to the IBIS SUMMIT MEETINGS > > > and that active IBIS members should make a best effort to attend. > > > > > Is this really a summit meeting? > > > > > There is an IBIS SUMMIT MEETING at Design Con it seems like this > > > is very close spacing for IBIS SUMMIT MEETINGS. > > > Many of us have other jobs and don't wish to miss major SUMMIT meetings > > > but I object to the close spacing of these two SUMMIT meetings. > > > > > > Could we re-title this as a joint IBIS JEDEC meeting without the > > > official aspects of a summit. > > > > > Kellee > > > > > At 10:39 AM 11/11/98 PST, Bob Ross wrote: > > > >This is a reminder to for those planning to attend the December 7, 1998 > > > >IBIS SUMMIT MEETING and JEDEC JC-16.2 and JC-42 MEETINGS to sign up. > > > > > > -- D. C. Sessions dc.sessions@vlsi.com From owner-ibis Fri Nov 13 14:29:27 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.eda.org (8.8.5/8.8.3) with ESMTP id OAA03700 for ; Fri, 13 Nov 1998 14:29:26 -0800 (PST) Received: from em-wv03.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id OAA26654; Fri, 13 Nov 1998 14:24:22 -0800 (PST) Received: from bob by em-wv03.wv.mentorg.com (8.8.8/CF5.40R) id OAA28670; Fri, 13 Nov 1998 14:24:21 -0800 (PST) From: bob_ross@mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA20916; Fri, 13 Nov 98 14:24:19 PST Date: Fri, 13 Nov 98 14:24:19 PST Message-Id: <9811132224.AA20916@bob> To: ibis@eda.org Subject: IBIS MEETING 11/20/98 IBIS Open Forum Meeting Agenda for 11/20/98 Bridge Number Reservation # Passcode (916) 356-9200 3-241992 5578793 All meetings are 8:00 AM to 9:55 AM Pacific Time. When you call into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the Reservation Number and Passcode. 8:00 Check-In, Intros, Announcements Ross - Intros of New IBIS Participants, Meeting Quorum Ross - Membership Update and Treasurers Report Rusher - Review of Previous Meeting's Minutes (and ARs) Ross - Miscellany/Announcements All - Press & Web Page Updates Huq, All - New Models Available, Library Update Powell, All - Opens for New Issues All 8:15 Administrative and Project Discussions International/External Progress - IEC 62014-1 (IBIS Version 2.1) Rusher - pr EIAJ ED-5302 Standard for I/O Interface Model for Integrated Circuits (IMIC) Raghuram/Ross - 93/67/NP IBIS and EMC Simulation Perrin - JEDEC JC-16.2 Modeling and Testing Sessions - IEEE P1537 Data Format Project Peters IBIS (East) Users Group Meetings Haller/Zanella JEDEC/IBIS December 7, 1998 SUMMIT Meeting Sessions/Ross DesignCon99 February 1, 1999 SUMMIT Meeting/Booth Ross/Rokusek Version 3.2 Parser Development Ross/Flora/Rokusek - Source, Executables - Version 3.2 Document - Version 3.2 Parser Development Version 3.2 Ratification Ross Tektronix IPA510 Software Proposal Discussion Huq Cookbook Status Peters IBIS Model Review Committee Flora New Administrative Issues All 9:15 Technical Discussion BIRD55 - [Model Spec] Vmeas Addition (Vote) Ross BUG31 - Error for [Pulldown] Decreasing Current Should Ross be Warning (more discussion) Series Elements Restriction Ross/Rokusek 100 Point BIRD? Ross PCI66 Timing Load Discussion Ross EIAJ IMIC Technical Discussion Ross New Technical Issues All 9:50 Wrap Up and Next Meetings Plans Peters 9:55 Sign Off From owner-ibis Tue Nov 17 10:26:28 1998 Received: from mail-gw2.pacbell.net (mail-gw2.pacbell.net [206.13.28.53]) by server.eda.org (8.8.5/8.8.3) with ESMTP id KAA13822 for ; Tue, 17 Nov 1998 10:26:27 -0800 (PST) Received: from pacbell.net (ppp-209-79-182-160.vntrcs.pacbell.net [209.79.182.160]) by mail-gw2.pacbell.net (8.8.8/8.7.1+antispam) with ESMTP id KAA27426; Tue, 17 Nov 1998 10:21:51 -0800 (PST) Message-ID: <3651BED8.2A7B8CF6@pacbell.net> Date: Tue, 17 Nov 1998 10:22:17 -0800 From: Jon Powell Reply-To: jonp@qdt.com Organization: Viewlogic Consulting Services X-Mailer: Mozilla 4.04 [en]C-PBI-NC404 (Win95; I) MIME-Version: 1.0 To: ibis@vhdl.org Subject: DesignCon Booth Info Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Hi IBIS resources (we can't say people anymore). I need a count of companies who would like their LOGO on display as IBIS participants at the IBIS booth at DesignCon in Feb. A reply saves you space on the backdrop and determines the size of the signs that will be allowed (we have very limited space and I am reduced to performing "math"). Speak now or forever hold you peace! jon From owner-ibis Tue Nov 17 13:30:34 1998 Received: from smtp3.ny.us.ibm.com (smtp3.ny.us.ibm.com [198.133.22.42]) by server.eda.org (8.8.5/8.8.3) with ESMTP id NAA14274 for ; Tue, 17 Nov 1998 13:30:33 -0800 (PST) Received: from relay1.server.ibm.com (relay1.server.ibm.com [9.14.2.98]) by smtp3.ny.us.ibm.com (8.8.7/8.8.7) with ESMTP id QAA20672 for ; Tue, 17 Nov 1998 16:07:32 -0500 Received: from US.IBM.COM (d01lms04.pok.ibm.com [9.117.30.25]) by relay1.server.ibm.com (8.8.7/8.8.7) with SMTP id QAA11902 for ; Tue, 17 Nov 1998 16:21:36 -0500 Received: by US.IBM.COM (Soft-Switch LMS 2.0) with snapi via D01AU036 id 5010400029017412; Tue, 17 Nov 1998 16:31:07 -0500 From: Gregory R Edlund To: Subject: s2ibis on AIX? Message-ID: <5010400029017412000002L022*@MHS> Date: Tue, 17 Nov 1998 16:31:07 -0500 MIME-Version: 1.0 Content-Type: text/plain Does anyone know if the s2ibis code has been ported to the AIX platform? Thanks. Greg Edlund Advisory Engineer, AS/400 System Timing IBM 3650 Hwy. 52 N, Dept. HDC Rochester, MN 55901 gedlund@us.ibm.com From owner-ibis Tue Nov 17 14:42:10 1998 Received: from mail-gw3.pacbell.net (mail-gw3.pacbell.net [206.13.28.55]) by server.eda.org (8.8.5/8.8.3) with ESMTP id OAA14419 for ; Tue, 17 Nov 1998 14:42:10 -0800 (PST) Received: from pacbell.net (ppp-209-79-182-65.vntrcs.pacbell.net [209.79.182.65]) by mail-gw3.pacbell.net (8.8.8/8.7.1+antispam) with ESMTP id OAA21040; Tue, 17 Nov 1998 14:37:34 -0800 (PST) Message-ID: <3651FAC4.CA2FEFDE@pacbell.net> Date: Tue, 17 Nov 1998 14:37:57 -0800 From: Jon Powell Reply-To: jonp@qdt.com Organization: Viewlogic Consulting Services X-Mailer: Mozilla 4.04 [en]C-PBI-NC404 (Win95; I) MIME-Version: 1.0 To: ibis@vhdl.org Subject: No Logos Yet Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Please don't send me any supercon (designcon?) art work yet. In the next week or so I will put together a request that will include art size and such and send it out to you. I still haven't decided whether I want computer art or finshed product. regards, jon From owner-ibis Tue Nov 17 17:03:40 1998 Received: from hotmail.com (f130.hotmail.com [207.82.251.9]) by server.eda.org (8.8.5/8.8.3) with SMTP id RAA14730 for ; Tue, 17 Nov 1998 17:03:39 -0800 (PST) Received: (qmail 20434 invoked by uid 0); 18 Nov 1998 00:58:32 -0000 Message-ID: <19981118005832.20433.qmail@hotmail.com> Received: from 147.145.40.40 by www.hotmail.com with HTTP; Tue, 17 Nov 1998 16:58:32 PST X-Originating-IP: [147.145.40.40] From: "bharat sinha" To: ibis@vhdl.org Cc: ibis-users@eda.org MIME-Version: 1.0 Content-Type: text/plain Date: Tue, 17 Nov 1998 16:58:32 PST hI, Could you please tell me why are the PULL UP/PULL DOWN curves seen thru s2iplt having kinks and spikes. They are weird and triangular. The Power/Gnd Clamps are O.K. I have generated the IBIS files successfully. They have passed the IBISCHK2 .Only warnings are there. The cell under question is a Impedance controlled bUffer. The foll warnings are there TYP AC Rising Endpoints(-0.0V, 1.76 V) not within 0.035V (2%) of (-0.70, 0.00V) on VI curves for 100 Ohms to 0V. TYP AC Falling Endpoints(0.67V, 2.5 V) not within 0.037V (2%) of (-0.70, 2.50V) on VI curves for 100 Ohms to 2.5V. MIN AC Rising Endpoints (0.0, 1.5V) not within 0.031V (2%) of (-0.70V, 4.87V) on VI curves for 100 ohms to 0v. MIN AC Falling Endpoints (0.71, 2.31V) not within 0.032V (2%) of (-0.70V, 4.92V) on VI curves for 100 ohms to 2.5V Please reply ASAP thanx Bharat ______________________________________________________ Get Your Private, Free Email at http://www.hotmail.com From owner-ibis Wed Nov 18 11:06:03 1998 Received: from jasper.cisco.com (jasper.cisco.com [171.69.198.63]) by server.eda.org (8.8.5/8.8.3) with ESMTP id LAA17492 for ; Wed, 18 Nov 1998 11:06:03 -0800 (PST) Received: (shuq@localhost) by jasper.cisco.com (8.8.5-Cisco.2-SunOS.5.5.1.sun4/8.6.5) id LAA13392; Wed, 18 Nov 1998 11:00:30 -0800 (PST) Date: Wed, 18 Nov 1998 11:00:30 -0800 (PST) From: Syed Huq Message-Id: <199811181900.LAA13392@jasper.cisco.com> To: ibis@vhdl.org, bharat_sinha@hotmail.com Subject: Re: Your Message Sent on Tue, 17 Nov 1998 16:58:32 PST Cc: ibis-users@eda.org Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Content-MD5: Cq9QQK/y6/A0vm/03ddcWA== Hi, What you see as kinks/spikes are usually in the ranges where s2ibis2 has done some extrapolation. If they are in the region beyond which the simulator has no interest in, they may be ignored. If you see kinks/spikes in the region of operation for your device then the derived data should be checkout out for errors. Regards, Syed. Cisco Systems,Inc > > hI, > Could you please tell me why are the PULL UP/PULL DOWN curves seen thru > s2iplt having kinks and spikes. They are weird and triangular. > The Power/Gnd Clamps are O.K. > From owner-ibis Wed Nov 18 15:11:29 1998 Received: from hotmail.com (f144.hotmail.com [207.82.251.23]) by server.eda.org (8.8.5/8.8.3) with SMTP id PAA17983 for ; Wed, 18 Nov 1998 15:11:23 -0800 (PST) Received: (qmail 12446 invoked by uid 0); 18 Nov 1998 23:06:15 -0000 Message-ID: <19981118230615.12445.qmail@hotmail.com> Received: from 147.145.40.40 by www.hotmail.com with HTTP; Wed, 18 Nov 1998 15:06:14 PST X-Originating-IP: [147.145.40.40] From: "bharat sinha" To: shuq@cisco.com Cc: ibis@vhdl.org Subject: Imp MIME-Version: 1.0 Content-Type: text/plain Date: Wed, 18 Nov 1998 15:06:14 PST Hi, This is just one of the sample files. Could you please spare a few minutes and see it thru S2IPLT. See how weird the waveforms are. This is a cell about which I had mailed warnings etc. yeterday. This problem is there with at least 1000 more cells! .please help me out. Thanx Bharat > >>|******************************************************************* >>|************************************************************************ >>| >>[IBIS ver] 2.1 >>[File name] x.ibs >>[File Rev] 0 >>[Date] >>[Source] >>[ | >>|************************************************************************ >>| Component x >>|************************************************************************ >>| >>[Component] x >>[Manufacturer] >>[Package] >>| variable typ min max >>R_pkg 0.000 0.000 0.000 >>L_pkg 0.000H 0.000H 0.000H >>C_pkg 0.000F 0.000F 0.000F >>| >>[Pin] signal_name model_name R_pin L_pin >C_pin >>1 x x >>| one In1 Input1 >>| two En1 Enable1 >>VDD VDD POWER >>VSS GND GND >>| >>[Pin Mapping] pulldown_ref pullup_ref gnd_clamp_ref >power_clamp_ref >>| >>1 GND POWER >>one GND POWER >>two GND POWER >>VDD NC POWER >>VSS GND NC >>| >>|************************************************************************ >>| Model x >>|************************************************************************ >>| >>[Model] x >>Model_type I/O >>Polarity Non-Inverting >>Enable Active-Low >>Vinl = 0.80V >>Vinh = 2.00V >>Vmeas = 1.50V >>C_comp 0.000F 0.000F 0.000F >>| >>| >>[Temperature Range] 25.00 100.00 0.000 >>[Voltage Range] 2.50V 2.25V 2.75V >>[Pulldown] >>| voltage I(typ) I(min) I(max) >>| >> -2.50 -0.90mA -1.20mA -0.80mA >> -2.30 -1.00mA -1.30mA -0.90mA >> -2.10 -1.20mA -1.60mA -1.10mA >> -1.90 -1.50mA -1.80mA -1.40mA >> -1.70 -1.90mA -2.30mA -1.80mA >> -1.50 -2.50mA -2.90mA -2.40mA >> -1.30 -3.90mA -4.20mA -3.80mA >> -1.10 -7.80mA -7.00mA -8.70mA >> -0.90 -28.23mA -17.55mA -32.84mA >> -0.70 -40.06mA -0.69A -2.20A >> -0.70 -40.06mA -0.69A -2.20A >> -0.60 -36.30mA -0.59A -2.00A >> -0.50 -31.11mA -31.64mA -29.64mA >> -0.40 -25.45mA -25.59mA -24.14mA >> -0.30 -19.52mA -19.40mA -18.42mA >> -0.20 -13.32mA -13.08mA -12.50mA >> -0.10 -6.83mA -6.61mA -6.37mA >> 0.00 0.24nA 1.33nA 0.29nA >> 0.10 6.74mA 6.43mA 6.30mA >> 0.20 12.95mA 12.33mA 12.22mA >> 0.30 18.64mA 17.71mA 17.76mA >> 0.40 23.85mA 22.61mA 22.94mA >> 0.50 28.57mA 27.02mA 27.76mA >> 0.60 32.82mA 30.96mA 32.23mA >> 0.70 36.62mA 34.45mA 36.35mA >> 0.80 39.99mA 37.49mA 40.15mA >> 0.90 42.93mA 40.12mA 43.62mA >> 1.00 45.46mA 42.33mA 46.78mA >> 1.10 47.49mA 44.02mA 49.62mA >> 1.20 48.67mA 45.16mA 52.16mA >> 1.30 49.48mA 45.98mA 54.05mA >> 1.40 50.10mA 46.64mA 55.24mA >> 1.50 50.61mA 47.20mA 56.11mA >> 1.60 51.05mA 47.68mA 56.82mA >> 1.70 51.45mA 48.12mA 57.43mA >> 1.80 51.81mA 48.54mA 57.99mA >> 1.90 52.15mA 48.93mA 58.51mA >> 2.00 52.47mA 49.30mA 59.00mA >> 2.10 52.79mA 49.66mA 59.46mA >> 2.20 53.10mA 50.01mA 59.92mA >> 2.30 53.39mA 50.33mA 60.36mA >> 2.40 53.68mA 50.67mA 60.79mA >> 2.50 53.96mA 50.99mA 61.22mA >> 2.60 54.26mA 51.36mA 61.61mA >> 2.70 54.55mA 51.72mA 62.04mA >> 2.80 54.84mA 52.25mA 62.47mA >> 2.90 55.13mA 53.51mA 62.90mA >> 3.00 55.47mA 58.57mA 63.33mA >> 3.10 56.13mA 74.97mA 63.76mA >> 3.20 57.78mA 0.11A 64.19mA >> 3.30 61.08mA 0.15A 64.73mA >> 3.40 69.51mA 0.19A 65.75mA >> 3.50 93.09mA 0.24A 68.08mA >> 3.60 0.13A 0.28A 72.59mA >> 3.70 0.18A 0.33A 81.77mA >> 3.80 0.22A 0.38A 0.10A >> 4.00 0.32A 0.48A 0.19A >> 4.20 0.42A 0.58A 0.28A >> 4.40 0.52A 0.68A 0.38A >> 4.60 0.62A 0.78A 0.48A >> 4.80 0.72A 0.88A 0.58A >> 5.00 0.82A 0.98A 0.68A >> -0.80 -0.84A -0.79A -2.40A >> -0.70 -0.74A -0.69A -2.20A >> -0.60 -0.64A -0.59A -2.00A >> 5.00 0.82A 0.98A 0.68A >>| >>[Pullup] >>| voltage I(typ) I(min) I(max) >>| >> -2.50 0.80mA 1.00mA 0.70mA >> -2.30 1.00mA 1.20mA 0.90mA >> -2.10 1.10mA 1.40mA 1.10mA >> -1.90 1.40mA 1.60mA 1.30mA >> -1.70 1.80mA 1.90mA 1.60mA >> -1.50 2.30mA 2.50mA 2.10mA >> -1.30 3.50mA 3.40mA 3.30mA >> -1.10 6.60mA 5.50mA 6.90mA >> -0.90 22.26mA 12.21mA 27.46mA >> -0.70 35.79mA 33.38mA 34.42mA >> -0.70 35.79mA 33.38mA 34.42mA >> -0.60 32.28mA 33.53mA 31.24mA >> -0.50 27.80mA 28.73mA 27.02mA >> -0.40 22.46mA 23.06mA 21.85mA >> -0.30 16.87mA 17.21mA 16.44mA >> -0.20 11.24mA 11.40mA 10.99mA >> -0.10 5.61mA 5.65mA 5.50mA >> 0.00 -57.30pA -0.97nA -3.55nA >> 0.10 -5.49mA -5.46mA -5.42mA >> 0.20 -10.73mA -10.62mA -10.62mA >> 0.30 -15.73mA -15.48mA -15.60mA >> 0.40 -20.46mA -20.05mA -20.37mA >> 0.50 -24.94mA -24.31mA -24.91mA >> 0.60 -29.15mA -28.27mA -29.23mA >> 0.70 -33.10mA -31.92mA -33.34mA >> 0.80 -36.78mA -35.27mA -37.21mA >> 0.90 -40.19mA -38.31mA -40.87mA >> 1.00 -43.33mA -41.05mA -44.29mA >> 1.10 -46.20mA -43.49mA -47.50mA >> 1.20 -48.79mA -45.61mA -50.48mA >> 1.30 -51.12mA -47.39mA -53.23mA >> 1.40 -53.15mA -49.00mA -55.77mA >> 1.50 -54.81mA -50.40mA -58.08mA >> 1.60 -56.39mA -51.60mA -60.10mA >> 1.70 -57.79mA -52.64mA -61.85mA >> 1.80 -59.02mA -53.55mA -63.50mA >> 1.90 -60.10mA -54.37mA -65.04mA >> 2.00 -61.06mA -55.11mA -66.46mA >> 2.10 -61.92mA -55.79mA -67.76mA >> 2.20 -62.70mA -56.43mA -68.96mA >> 2.30 -63.41mA -57.05mA -70.07mA >> 2.40 -64.07mA -57.64mA -71.12mA >> 2.50 -64.69mA -58.22mA -72.11mA >> 2.60 -65.28mA -58.79mA -73.05mA >> 2.70 -65.85mA -59.35mA -73.95mA >> 2.80 -66.39mA -59.91mA -74.81mA >> 2.90 -66.92mA -60.62mA -75.64mA >> 3.00 -67.43mA -62.85mA -76.45mA >> 3.10 -67.96mA -72.58mA -77.23mA >> 3.20 -68.68mA -98.39mA -77.99mA >> 3.30 -70.52mA -0.14A -78.74mA >> 3.40 -75.93mA -0.18A -79.69mA >> 3.50 -93.39mA -0.23A -81.70mA >> 3.60 -0.13A -0.27A -86.29mA >> 3.70 -0.17A -0.32A -94.86mA >> 3.80 -0.21A -0.37A -0.11A >> 4.00 -0.31A -0.47A -0.18A >> 4.20 -0.41A -0.57A -0.27A >> 4.40 -0.51A -0.66A -0.37A >> 4.60 -0.61A -0.76A -0.47A >> 4.80 -0.71A -0.87A -0.57A >> 5.00 -0.81A -0.97A -0.67A >>-133287736222332993536.00 0.00 1.00e 0.00 >>-133287736222332993536.00 0.00 1.00e 0.00 >>-133287736222332993536.00 0.00 1.00e 0.00 >> 5.00 -0.81A -0.97A -0.67A >>| >>[GND_clamp] >>| voltage I(typ) I(min) I(max) >>| >> -2.50 -0.80A -0.84A -0.79A >> -2.40 -0.75A -0.79A -0.74A >> -2.30 -0.70A -0.74A -0.69A >> -2.20 -0.65A -0.69A -0.64A >> -2.10 -0.60A -0.64A -0.59A >> -2.00 -0.55A -0.59A -0.54A >> -1.90 -0.50A -0.54A -0.49A >> -1.80 -0.45A -0.49A -0.44A >> -1.70 -0.40A -0.44A -0.39A >> -1.60 -0.35A -0.39A -0.34A >> -1.50 -0.31A -0.34A -0.29A >> -1.40 -0.26A -0.29A -0.24A >> -1.30 -0.21A -0.24A -0.20A >> -1.20 -0.16A -0.20A -0.15A >> -1.10 -0.11A -0.15A -0.10A >> -1.00 -69.91mA -0.10A -60.98mA >> -0.90 -31.59mA -62.15mA -27.93mA >> -0.80 -8.78mA -25.97mA -13.13mA >> -0.70 -2.35mA -4.90mA -5.62mA >> -0.60 -0.47mA -0.51mA -1.25mA >> -0.50 -0.13mA -0.11mA -0.21mA >> -0.40 -84.02uA -58.67uA -0.11mA >> -0.30 -61.44uA -41.28uA -76.09uA >> -0.20 -40.74uA -27.02uA -50.59uA >> -0.10 -20.27uA -13.32uA -25.25uA >> 0.00 -1.78nA -10.18nA -2.31nA >> 0.10 19.70uA 12.72uA 24.74uA >> 0.20 38.49uA 24.73uA 48.59uA >> 0.30 56.36uA 36.00uA 71.54uA >> 0.40 73.27uA 46.52uA 93.45uA >> 0.50 89.16uA 56.27uA 0.11mA >> 0.60 0.10mA 65.10uA 0.13mA >> 0.70 0.12mA 72.25uA 0.15mA >> 0.80 0.12mA 75.87uA 0.16mA >> 0.90 0.12mA 72.58uA 0.16mA >> 1.00 0.11mA 40.75uA 0.15mA >> 1.10 13.01uA -68.78uA 90.42uA >> 1.20 -0.12mA -76.86uA -70.09uA >> 1.30 -0.13mA -75.97uA -0.18mA >> 1.40 -0.13mA -72.52uA -0.19mA >> 1.50 -0.12mA -67.47uA -0.19mA >> 1.60 -0.12mA -61.19uA -0.18mA >> 1.70 -0.11mA -53.85uA -0.17mA >> 1.80 -98.50uA -45.64uA -0.16mA >> 1.90 -87.18uA -36.69uA -0.15mA >> 2.00 -74.77uA -27.04uA -0.14mA >> 2.10 -61.40uA -16.73uA -0.12mA >> 2.20 -47.21uA -5.74uA -0.11mA >> 2.30 -32.23uA 5.89uA -89.43uA >> 2.40 -16.49uA 18.13uA -71.03uA >> 2.50 0.53nA 32.59uA -51.76uA >>| >>[POWER_clamp] >>| voltage I(typ) I(min) I(max) >>| >> -2.50 0.82A 0.85A 0.80A >> -2.40 0.76A 0.80A 0.75A >> -2.30 0.71A 0.75A 0.70A >> -2.20 0.66A 0.70A 0.65A >> -2.10 0.61A 0.65A 0.60A >> -2.00 0.56A 0.60A 0.55A >> -1.90 0.51A 0.55A 0.50A >> -1.80 0.46A 0.50A 0.45A >> -1.70 0.41A 0.45A 0.40A >> -1.60 0.36A 0.40A 0.35A >> -1.50 0.32A 0.35A 0.30A >> -1.40 0.27A 0.31A 0.25A >> -1.30 0.22A 0.26A 0.21A >> -1.20 0.17A 0.21A 0.16A >> -1.10 0.12A 0.16A 0.11A >> -1.00 78.81mA 0.12A 66.99mA >> -0.90 38.91mA 73.17mA 29.79mA >> -0.80 12.60mA 35.08mA 10.90mA >> -0.70 4.99mA 9.61mA 5.31mA >> -0.60 1.96mA 1.93mA 1.97mA >> -0.50 0.47mA 0.45mA 0.42mA >> -0.40 0.11mA 0.11mA 0.11mA >> -0.30 54.48uA 43.69uA 67.28uA >> -0.20 34.52uA 24.78uA 43.98uA >> -0.10 17.05uA 11.91uA 21.89uA >> 0.00 0.53nA 1.46nA 33.44nA >>| >>[Ramp] >>dV/dt_r 1.05/0.12n 0.94/0.17n 1.15/0.11n >>dV/dt_f 1.09/0.15n 0.97/0.20n 1.18/0.11n >>[Rising Waveform] >>R_fixture = 100.00 >>V_fixture = 0.000 >>| time V(typ) V(min) V(max) >>| >> 0.00S -1.17uV 0.75uV -3.08uV >> 60.00pS 38.17uV -33.73uV 0.20mV >> 0.12nS 0.53mV 0.31mV -1.22mV >> 0.18nS -1.42mV 0.46mV -7.82mV >> 0.24nS -7.08mV -0.48mV 66.01mV >> 0.30nS -0.86mV -2.75mV 0.57V >> 0.36nS 0.11V -6.91mV 1.43V >> 0.42nS 0.55V -13.07mV 2.02V >> 0.48nS 1.26V -4.46mV 2.22V >> 0.54nS 1.76V 58.74mV 2.27V >> 0.60nS 1.99V 0.30V 2.29V >> 0.66nS 2.05V 0.70V 2.29V >> 0.72nS 2.08V 1.18V 2.29V >> 0.78nS 2.08V 1.53V 2.29V >> 0.84nS 2.09V 1.73V 2.29V >> 0.90nS 2.09V 1.81V 2.29V >> 0.96nS 2.09V 1.84V 2.29V >> 1.02nS 2.09V 1.86V 2.29V >> 1.08nS 2.09V 1.87V 2.29V >> 1.14nS 2.09V 1.87V 2.29V >> 1.20nS 2.09V 1.88V 2.29V >> 1.26nS 2.09V 1.88V 2.29V >> 1.32nS 2.09V 1.88V 2.29V >> 1.38nS 2.09V 1.88V 2.29V >> 1.44nS 2.09V 1.88V 2.29V >> 1.50nS 2.09V 1.88V 2.29V >> 1.56nS 2.09V 1.88V 2.29V >> 1.62nS 2.09V 1.88V 2.29V >> 1.68nS 2.09V 1.88V 2.29V >> 1.74nS 2.09V 1.88V 2.29V >> 1.80nS 2.09V 1.88V 2.29V >> 1.86nS 2.09V 1.88V 2.29V >> 1.92nS 2.09V 1.88V 2.29V >> 1.98nS 2.09V 1.88V 2.29V >> 2.04nS 2.09V 1.88V 2.29V >> 2.10nS 2.09V 1.88V 2.29V >> 2.16nS 2.09V 1.88V 2.29V >> 2.22nS 2.09V 1.88V 2.29V >> 2.28nS 2.09V 1.88V 2.29V >> 2.34nS 2.09V 1.88V 2.29V >> 2.40nS 2.09V 1.88V 2.29V >> 2.46nS 2.09V 1.88V 2.29V >> 2.52nS 2.09V 1.88V 2.29V >> 2.58nS 2.09V 1.88V 2.29V >> 2.64nS 2.09V 1.88V 2.29V >> 2.70nS 2.09V 1.88V 2.29V >> 2.76nS 2.09V 1.88V 2.29V >> 2.82nS 2.09V 1.88V 2.29V >> 2.88nS 2.09V 1.88V 2.29V >> 2.94nS 2.09V 1.88V 2.29V >> 3.00nS 2.09V 1.88V 2.29V >>| >>[Falling Waveform] >>R_fixture = 100.00 >>V_fixture = 2.50 >>| time V(typ) V(min) V(max) >>| >> 0.00S 2.50V 2.29V 2.71V >> 60.00pS 2.50V 2.29V 2.71V >> 0.12nS 2.50V 2.29V 2.71V >> 0.18nS 2.50V 2.29V 2.71V >> 0.24nS 2.51V 2.29V 2.52V >> 0.30nS 2.39V 2.29V 1.75V >> 0.36nS 1.98V 2.30V 0.85V >> 0.42nS 1.35V 2.28V 0.49V >> 0.48nS 0.79V 2.13V 0.40V >> 0.54nS 0.46V 1.84V 0.38V >> 0.60nS 0.38V 1.46V 0.37V >> 0.66nS 0.37V 1.03V 0.37V >> 0.72nS 0.36V 0.69V 0.37V >> 0.78nS 0.36V 0.52V 0.37V >> 0.84nS 0.35V 0.44V 0.37V >> 0.90nS 0.35V 0.41V 0.37V >> 0.96nS 0.35V 0.39V 0.37V >> 1.02nS 0.35V 0.39V 0.37V >> 1.08nS 0.35V 0.38V 0.37V >> 1.14nS 0.35V 0.38V 0.37V >> 1.20nS 0.35V 0.38V 0.37V >> 1.26nS 0.35V 0.37V 0.37V >> 1.32nS 0.35V 0.37V 0.37V >> 1.38nS 0.35V 0.37V 0.37V >> 1.44nS 0.35V 0.37V 0.37V >> 1.50nS 0.35V 0.37V 0.37V >> 1.56nS 0.35V 0.37V 0.37V >> 1.62nS 0.35V 0.37V 0.37V >> 1.68nS 0.35V 0.37V 0.37V >> 1.74nS 0.35V 0.37V 0.37V >> 1.80nS 0.35V 0.37V 0.37V >> 1.86nS 0.35V 0.37V 0.37V >> 1.92nS 0.35V 0.37V 0.37V >> 1.98nS 0.35V 0.37V 0.37V >> 2.04nS 0.35V 0.37V 0.37V >> 2.10nS 0.35V 0.37V 0.37V >> 2.16nS 0.35V 0.37V 0.37V >> 2.22nS 0.35V 0.37V 0.37V >> 2.28nS 0.35V 0.37V 0.37V >> 2.34nS 0.35V 0.37V 0.37V >> 2.40nS 0.35V 0.37V 0.37V >> 2.46nS 0.35V 0.37V 0.37V >> 2.52nS 0.35V 0.37V 0.37V >> 2.58nS 0.35V 0.37V 0.37V >> 2.64nS 0.35V 0.37V 0.37V >> 2.70nS 0.35V 0.37V 0.37V >> 2.76nS 0.35V 0.37V 0.37V >> 2.82nS 0.35V 0.37V 0.37V >> 2.88nS 0.35V 0.37V 0.37V >> 2.94nS 0.35V 0.37V 0.37V >> 3.00nS 0.35V 0.37V 0.37V >>| >>| End [Model] x >>| >>| End [Component] x >>| >>[End] > > >______________________________________________________ >Get Your Private, Free Email at http://www.hotmail.com ______________________________________________________ Get Your Private, Free Email at http://www.hotmail.com From owner-ibis Wed Nov 18 16:18:41 1998 Received: from mail.hyperlynx.com (root@mail.hyperlynx.com [209.20.148.70]) by server.eda.org (8.8.5/8.8.3) with ESMTP id QAA18098 for ; Wed, 18 Nov 1998 16:18:37 -0800 (PST) Received: from tensor ([192.168.148.75]) by mail.hyperlynx.com (8.8.5/8.8.5) with SMTP id PAA04467; Wed, 18 Nov 1998 15:58:29 -0800 Message-Id: <3.0.5.32.19981118155834.0109e890@mail.nwlink.com> X-Sender: mbflora@mail.nwlink.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.5 (32) Date: Wed, 18 Nov 1998 15:58:34 -0100 To: "bharat sinha" , shuq@cisco.com From: Matthew Flora Subject: Re: Imp Cc: ibis@vhdl.org In-Reply-To: <19981118230615.12445.qmail@hotmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Bharat, > This is just one of the sample files. Could you please spare a few >minutes and see it thru S2IPLT. See how weird the waveforms are. >This is a cell about which I had mailed warnings etc. yeterday. The problem is that you've got some trash in your data points. Assuming that your mail tool didn't corrupt the file, take a look at the current in you pulldown table around -0.70 volts and the bad voltages around 5.00 volts. In your pullup table, the voltage increases to 5 volts, then to -10e20 volts and then back to 5 volts. Check your data!! Good luck! Matthew Flora Senior Engineer HyperLynx (425) 869-2320 PH (425) 881-1008 FAX mbflora@hyperlynx.com PS I included a somewhat cleaned up version: |******************************************************************* |************************************************************************ | [IBIS ver] 2.1 [File name] x.ibs [File Rev] 0 [Date] 00/00/00 [Source] | |************************************************************************ | Component x |************************************************************************ | [Component] x [Manufacturer] y [Package] | variable typ min max R_pkg 0.000 0.000 0.000 L_pkg 0.000H 0.000H 0.000H C_pkg 0.000F 0.000F 0.000F | [Pin] signal_name model_name R_pin L_pin C_pin 1 x x | one In1 Input1 | two En1 Enable1 VDD VDD POWER VSS GND GND | |************************************************************************ | Model x |************************************************************************ | [Model] x Model_type I/O Polarity Non-Inverting Enable Active-Low Vinl = 0.80V Vinh = 2.00V Vmeas = 1.50V C_comp 0.000F 0.000F 0.000F | | [Temperature Range] 25.00 100.00 0.000 [Voltage Range] 2.50V 2.25V 2.75V [Pulldown] | voltage I(typ) I(min) I(max) | -2.50 -0.90mA -1.20mA -0.80mA -2.30 -1.00mA -1.30mA -0.90mA -2.10 -1.20mA -1.60mA -1.10mA -1.90 -1.50mA -1.80mA -1.40mA -1.70 -1.90mA -2.30mA -1.80mA -1.50 -2.50mA -2.90mA -2.40mA -1.30 -3.90mA -4.20mA -3.80mA -1.10 -7.80mA -7.00mA -8.70mA -0.90 -28.23mA -17.55mA -32.84mA -0.50 -31.11mA -31.64mA -29.64mA -0.40 -25.45mA -25.59mA -24.14mA -0.30 -19.52mA -19.40mA -18.42mA -0.20 -13.32mA -13.08mA -12.50mA -0.10 -6.83mA -6.61mA -6.37mA 0.00 0.24nA 1.33nA 0.29nA 0.10 6.74mA 6.43mA 6.30mA 0.20 12.95mA 12.33mA 12.22mA 0.30 18.64mA 17.71mA 17.76mA 0.40 23.85mA 22.61mA 22.94mA 0.50 28.57mA 27.02mA 27.76mA 0.60 32.82mA 30.96mA 32.23mA 0.70 36.62mA 34.45mA 36.35mA 0.80 39.99mA 37.49mA 40.15mA 0.90 42.93mA 40.12mA 43.62mA 1.00 45.46mA 42.33mA 46.78mA 1.10 47.49mA 44.02mA 49.62mA 1.20 48.67mA 45.16mA 52.16mA 1.30 49.48mA 45.98mA 54.05mA 1.40 50.10mA 46.64mA 55.24mA 1.50 50.61mA 47.20mA 56.11mA 1.60 51.05mA 47.68mA 56.82mA 1.70 51.45mA 48.12mA 57.43mA 1.80 51.81mA 48.54mA 57.99mA 1.90 52.15mA 48.93mA 58.51mA 2.00 52.47mA 49.30mA 59.00mA 2.10 52.79mA 49.66mA 59.46mA 2.20 53.10mA 50.01mA 59.92mA 2.30 53.39mA 50.33mA 60.36mA 2.40 53.68mA 50.67mA 60.79mA 2.50 53.96mA 50.99mA 61.22mA 2.60 54.26mA 51.36mA 61.61mA 2.70 54.55mA 51.72mA 62.04mA 2.80 54.84mA 52.25mA 62.47mA 2.90 55.13mA 53.51mA 62.90mA 3.00 55.47mA 58.57mA 63.33mA 3.10 56.13mA 74.97mA 63.76mA 3.20 57.78mA 0.11A 64.19mA 3.30 61.08mA 0.15A 64.73mA 3.40 69.51mA 0.19A 65.75mA 3.50 93.09mA 0.24A 68.08mA 3.60 0.13A 0.28A 72.59mA 3.70 0.18A 0.33A 81.77mA 3.80 0.22A 0.38A 0.10A 4.00 0.32A 0.48A 0.19A 4.20 0.42A 0.58A 0.28A 4.40 0.52A 0.68A 0.38A 4.60 0.62A 0.78A 0.48A 4.80 0.72A 0.88A 0.58A 5.00 0.82A 0.98A 0.68A | [Pullup] | voltage I(typ) I(min) I(max) | -2.50 0.80mA 1.00mA 0.70mA -2.30 1.00mA 1.20mA 0.90mA -2.10 1.10mA 1.40mA 1.10mA -1.90 1.40mA 1.60mA 1.30mA -1.70 1.80mA 1.90mA 1.60mA -1.50 2.30mA 2.50mA 2.10mA -1.30 3.50mA 3.40mA 3.30mA -1.10 6.60mA 5.50mA 6.90mA -0.90 22.26mA 12.21mA 27.46mA -0.70 35.79mA 33.38mA 34.42mA -0.70 35.79mA 33.38mA 34.42mA -0.60 32.28mA 33.53mA 31.24mA -0.50 27.80mA 28.73mA 27.02mA -0.40 22.46mA 23.06mA 21.85mA -0.30 16.87mA 17.21mA 16.44mA -0.20 11.24mA 11.40mA 10.99mA -0.10 5.61mA 5.65mA 5.50mA 0.00 -57.30pA -0.97nA -3.55nA 0.10 -5.49mA -5.46mA -5.42mA 0.20 -10.73mA -10.62mA -10.62mA 0.30 -15.73mA -15.48mA -15.60mA 0.40 -20.46mA -20.05mA -20.37mA 0.50 -24.94mA -24.31mA -24.91mA 0.60 -29.15mA -28.27mA -29.23mA 0.70 -33.10mA -31.92mA -33.34mA 0.80 -36.78mA -35.27mA -37.21mA 0.90 -40.19mA -38.31mA -40.87mA 1.00 -43.33mA -41.05mA -44.29mA 1.10 -46.20mA -43.49mA -47.50mA 1.20 -48.79mA -45.61mA -50.48mA 1.30 -51.12mA -47.39mA -53.23mA 1.40 -53.15mA -49.00mA -55.77mA 1.50 -54.81mA -50.40mA -58.08mA 1.60 -56.39mA -51.60mA -60.10mA 1.70 -57.79mA -52.64mA -61.85mA 1.80 -59.02mA -53.55mA -63.50mA 1.90 -60.10mA -54.37mA -65.04mA 2.00 -61.06mA -55.11mA -66.46mA 2.10 -61.92mA -55.79mA -67.76mA 2.20 -62.70mA -56.43mA -68.96mA 2.30 -63.41mA -57.05mA -70.07mA 2.40 -64.07mA -57.64mA -71.12mA 2.50 -64.69mA -58.22mA -72.11mA 2.60 -65.28mA -58.79mA -73.05mA 2.70 -65.85mA -59.35mA -73.95mA 2.80 -66.39mA -59.91mA -74.81mA 2.90 -66.92mA -60.62mA -75.64mA 3.00 -67.43mA -62.85mA -76.45mA 3.10 -67.96mA -72.58mA -77.23mA 3.20 -68.68mA -98.39mA -77.99mA 3.30 -70.52mA -0.14A -78.74mA 3.40 -75.93mA -0.18A -79.69mA 3.50 -93.39mA -0.23A -81.70mA 3.60 -0.13A -0.27A -86.29mA 3.70 -0.17A -0.32A -94.86mA 3.80 -0.21A -0.37A -0.11A 4.00 -0.31A -0.47A -0.18A 4.20 -0.41A -0.57A -0.27A 4.40 -0.51A -0.66A -0.37A 4.60 -0.61A -0.76A -0.47A 4.80 -0.71A -0.87A -0.57A 5.00 -0.81A -0.97A -0.67A | [GND_clamp] | voltage I(typ) I(min) I(max) | -2.50 -0.80A -0.84A -0.79A -2.40 -0.75A -0.79A -0.74A -2.30 -0.70A -0.74A -0.69A -2.20 -0.65A -0.69A -0.64A -2.10 -0.60A -0.64A -0.59A -2.00 -0.55A -0.59A -0.54A -1.90 -0.50A -0.54A -0.49A -1.80 -0.45A -0.49A -0.44A -1.70 -0.40A -0.44A -0.39A -1.60 -0.35A -0.39A -0.34A -1.50 -0.31A -0.34A -0.29A -1.40 -0.26A -0.29A -0.24A -1.30 -0.21A -0.24A -0.20A -1.20 -0.16A -0.20A -0.15A -1.10 -0.11A -0.15A -0.10A -1.00 -69.91mA -0.10A -60.98mA -0.90 -31.59mA -62.15mA -27.93mA -0.80 -8.78mA -25.97mA -13.13mA -0.70 -2.35mA -4.90mA -5.62mA -0.60 -0.47mA -0.51mA -1.25mA -0.50 -0.13mA -0.11mA -0.21mA -0.40 -84.02uA -58.67uA -0.11mA -0.30 -61.44uA -41.28uA -76.09uA -0.20 -40.74uA -27.02uA -50.59uA -0.10 -20.27uA -13.32uA -25.25uA 0.00 -1.78nA -10.18nA -2.31nA 0.10 19.70uA 12.72uA 24.74uA 0.20 38.49uA 24.73uA 48.59uA 0.30 56.36uA 36.00uA 71.54uA 0.40 73.27uA 46.52uA 93.45uA 0.50 89.16uA 56.27uA 0.11mA 0.60 0.10mA 65.10uA 0.13mA 0.70 0.12mA 72.25uA 0.15mA 0.80 0.12mA 75.87uA 0.16mA 0.90 0.12mA 72.58uA 0.16mA 1.00 0.11mA 40.75uA 0.15mA 1.10 13.01uA -68.78uA 90.42uA 1.20 -0.12mA -76.86uA -70.09uA 1.30 -0.13mA -75.97uA -0.18mA 1.40 -0.13mA -72.52uA -0.19mA 1.50 -0.12mA -67.47uA -0.19mA 1.60 -0.12mA -61.19uA -0.18mA 1.70 -0.11mA -53.85uA -0.17mA 1.80 -98.50uA -45.64uA -0.16mA 1.90 -87.18uA -36.69uA -0.15mA 2.00 -74.77uA -27.04uA -0.14mA 2.10 -61.40uA -16.73uA -0.12mA 2.20 -47.21uA -5.74uA -0.11mA 2.30 -32.23uA 5.89uA -89.43uA 2.40 -16.49uA 18.13uA -71.03uA 2.50 0.53nA 32.59uA -51.76uA | [POWER_clamp] | voltage I(typ) I(min) I(max) | -2.50 0.82A 0.85A 0.80A -2.40 0.76A 0.80A 0.75A -2.30 0.71A 0.75A 0.70A -2.20 0.66A 0.70A 0.65A -2.10 0.61A 0.65A 0.60A -2.00 0.56A 0.60A 0.55A -1.90 0.51A 0.55A 0.50A -1.80 0.46A 0.50A 0.45A -1.70 0.41A 0.45A 0.40A -1.60 0.36A 0.40A 0.35A -1.50 0.32A 0.35A 0.30A -1.40 0.27A 0.31A 0.25A -1.30 0.22A 0.26A 0.21A -1.20 0.17A 0.21A 0.16A -1.10 0.12A 0.16A 0.11A -1.00 78.81mA 0.12A 66.99mA -0.90 38.91mA 73.17mA 29.79mA -0.80 12.60mA 35.08mA 10.90mA -0.70 4.99mA 9.61mA 5.31mA -0.60 1.96mA 1.93mA 1.97mA -0.50 0.47mA 0.45mA 0.42mA -0.40 0.11mA 0.11mA 0.11mA -0.30 54.48uA 43.69uA 67.28uA -0.20 34.52uA 24.78uA 43.98uA -0.10 17.05uA 11.91uA 21.89uA 0.00 0.53nA 1.46nA 33.44nA | [Ramp] dV/dt_r 1.05/0.12n 0.94/0.17n 1.15/0.11n dV/dt_f 1.09/0.15n 0.97/0.20n 1.18/0.11n [Rising Waveform] R_fixture = 100.00 V_fixture = 0.000 | time V(typ) V(min) V(max) | 0.00S -1.17uV 0.75uV -3.08uV 60.00pS 38.17uV -33.73uV 0.20mV 0.12nS 0.53mV 0.31mV -1.22mV 0.18nS -1.42mV 0.46mV -7.82mV 0.24nS -7.08mV -0.48mV 66.01mV 0.30nS -0.86mV -2.75mV 0.57V 0.36nS 0.11V -6.91mV 1.43V 0.42nS 0.55V -13.07mV 2.02V 0.48nS 1.26V -4.46mV 2.22V 0.54nS 1.76V 58.74mV 2.27V 0.60nS 1.99V 0.30V 2.29V 0.66nS 2.05V 0.70V 2.29V 0.72nS 2.08V 1.18V 2.29V 0.78nS 2.08V 1.53V 2.29V 0.84nS 2.09V 1.73V 2.29V 0.90nS 2.09V 1.81V 2.29V 0.96nS 2.09V 1.84V 2.29V 1.02nS 2.09V 1.86V 2.29V 1.08nS 2.09V 1.87V 2.29V 1.14nS 2.09V 1.87V 2.29V 1.20nS 2.09V 1.88V 2.29V 1.26nS 2.09V 1.88V 2.29V 1.32nS 2.09V 1.88V 2.29V 1.38nS 2.09V 1.88V 2.29V 1.44nS 2.09V 1.88V 2.29V 1.50nS 2.09V 1.88V 2.29V 1.56nS 2.09V 1.88V 2.29V 1.62nS 2.09V 1.88V 2.29V 1.68nS 2.09V 1.88V 2.29V 1.74nS 2.09V 1.88V 2.29V 1.80nS 2.09V 1.88V 2.29V 1.86nS 2.09V 1.88V 2.29V 1.92nS 2.09V 1.88V 2.29V 1.98nS 2.09V 1.88V 2.29V 2.04nS 2.09V 1.88V 2.29V 2.10nS 2.09V 1.88V 2.29V 2.16nS 2.09V 1.88V 2.29V 2.22nS 2.09V 1.88V 2.29V 2.28nS 2.09V 1.88V 2.29V 2.34nS 2.09V 1.88V 2.29V 2.40nS 2.09V 1.88V 2.29V 2.46nS 2.09V 1.88V 2.29V 2.52nS 2.09V 1.88V 2.29V 2.58nS 2.09V 1.88V 2.29V 2.64nS 2.09V 1.88V 2.29V 2.70nS 2.09V 1.88V 2.29V 2.76nS 2.09V 1.88V 2.29V 2.82nS 2.09V 1.88V 2.29V 2.88nS 2.09V 1.88V 2.29V 2.94nS 2.09V 1.88V 2.29V 3.00nS 2.09V 1.88V 2.29V | [Falling Waveform] R_fixture = 100.00 V_fixture = 2.50 | time V(typ) V(min) V(max) | 0.00S 2.50V 2.29V 2.71V 60.00pS 2.50V 2.29V 2.71V 0.12nS 2.50V 2.29V 2.71V 0.18nS 2.50V 2.29V 2.71V 0.24nS 2.51V 2.29V 2.52V 0.30nS 2.39V 2.29V 1.75V 0.36nS 1.98V 2.30V 0.85V 0.42nS 1.35V 2.28V 0.49V 0.48nS 0.79V 2.13V 0.40V 0.54nS 0.46V 1.84V 0.38V 0.60nS 0.38V 1.46V 0.37V 0.66nS 0.37V 1.03V 0.37V 0.72nS 0.36V 0.69V 0.37V 0.78nS 0.36V 0.52V 0.37V 0.84nS 0.35V 0.44V 0.37V 0.90nS 0.35V 0.41V 0.37V 0.96nS 0.35V 0.39V 0.37V 1.02nS 0.35V 0.39V 0.37V 1.08nS 0.35V 0.38V 0.37V 1.14nS 0.35V 0.38V 0.37V 1.20nS 0.35V 0.38V 0.37V 1.26nS 0.35V 0.37V 0.37V 1.32nS 0.35V 0.37V 0.37V 1.38nS 0.35V 0.37V 0.37V 1.44nS 0.35V 0.37V 0.37V 1.50nS 0.35V 0.37V 0.37V 1.56nS 0.35V 0.37V 0.37V 1.62nS 0.35V 0.37V 0.37V 1.68nS 0.35V 0.37V 0.37V 1.74nS 0.35V 0.37V 0.37V 1.80nS 0.35V 0.37V 0.37V 1.86nS 0.35V 0.37V 0.37V 1.92nS 0.35V 0.37V 0.37V 1.98nS 0.35V 0.37V 0.37V 2.04nS 0.35V 0.37V 0.37V 2.10nS 0.35V 0.37V 0.37V 2.16nS 0.35V 0.37V 0.37V 2.22nS 0.35V 0.37V 0.37V 2.28nS 0.35V 0.37V 0.37V 2.34nS 0.35V 0.37V 0.37V 2.40nS 0.35V 0.37V 0.37V 2.46nS 0.35V 0.37V 0.37V 2.52nS 0.35V 0.37V 0.37V 2.58nS 0.35V 0.37V 0.37V 2.64nS 0.35V 0.37V 0.37V 2.70nS 0.35V 0.37V 0.37V 2.76nS 0.35V 0.37V 0.37V 2.82nS 0.35V 0.37V 0.37V 2.88nS 0.35V 0.37V 0.37V 2.94nS 0.35V 0.37V 0.37V 3.00nS 0.35V 0.37V 0.37V | | End [Model] x | | End [Component] x | [End] From owner-ibis Mon Nov 23 14:26:11 1998 Received: from hamachi.synopsys.com (hamachi-8.synopsys.com [146.225.8.26]) by server.eda.org (8.8.5/8.8.3) with ESMTP id OAA01906 for ; Mon, 23 Nov 1998 14:26:11 -0800 (PST) Received: from javelin.synopsys.com (javelin.synopsys.com [146.225.100.38]) by hamachi.synopsys.com (8.8.8/8.8.5) with ESMTP id OAA20376 for ; Mon, 23 Nov 1998 14:20:22 -0800 (PST) Received: from rharr-lap (dhcp-146-225-24-191.synopsys.com [146.225.24.191]) by javelin.synopsys.com (8.8.8/8.8.8) with SMTP id OAA10387 for ; Mon, 23 Nov 1998 14:21:02 -0800 (PST) Message-Id: <3.0.3.32.19981123142440.009bf220@pophost> X-Sender: rharr@pophost X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.3 (32) Date: Mon, 23 Nov 1998 14:24:40 -0800 To: ibis@eda.org From: "Randolph E. (Randy) Harr" Subject: Ignore previous email about a new account Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Apologies, but some system maintenance by the IBIS group and eda.org system administrators caused an incorrect message to be posted to your group. The acccount mentioned was immediately disabled after the message went out and no harm has or will come to the IBIS group repository as a result. Sorry for the inconvenience of this and the previous message. _____________________________________________________________________ Randolph E. (Randy) Harr rharr@synopsys.com Synopsys, Inc. Ph (650)694-1927 700 East Middlefield Road Fax(650)694-1626 Mountain View, CA 94043 From owner-ibis Tue Nov 24 09:33:38 1998 Received: from mail.hyperlynx.com (root@mail.hyperlynx.com [209.20.148.70]) by server.eda.org (8.8.5/8.8.3) with ESMTP id JAA05840 for ; Tue, 24 Nov 1998 09:33:33 -0800 (PST) Received: from tensor ([192.168.148.75]) by mail.hyperlynx.com (8.8.5/8.8.5) with SMTP id JAA06712 for ; Tue, 24 Nov 1998 09:28:54 -0800 Message-Id: <3.0.5.32.19981124092915.010334e0@mail.nwlink.com> X-Sender: mbflora@mail.nwlink.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.5 (32) Date: Tue, 24 Nov 1998 09:29:15 -0100 To: ibis@eda.org From: Matthew Flora Subject: IBIS Open Forum Minutes 20 Nov 1998 Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" DATE: 11/24/98 SUBJECT: 11/20/98 EIA IBIS Open Forum Minutes VOTING MEMBERS AND 1998 PARTICIPANTS LIST: AMP (Martin Freedman) Applied Simulation Technology Norio Matsui, Raj Raghuram Cadence Design (& UniCAD) C. Kumar, Don Telian, Patrick Riffault, Craig Lewis, Greg Fitzgerald, Paul Galloway, Patrick Dos Santos, Catherine Weiss, Alain Tribaudot, Geoffrey Ellis, Todd Westerhoff, Ken Willis, Mike LaBonte Cisco Systems Syed Huq*, Sergio Camerlo, Irfan Elahi Compaq Shariq Rahma, Jeff Chu, Bob Haller, (Digital Equipment Corp.) Doug Burns, Steve Coe Cypress Bruce Wenniger H.A.S. Electronics Haruny Said Hewlett Packard (EEsof, etc.) Karl Kachigan, Henry Wu, Paul Gregory, Brenda Arena High Design Technology Razvan Ene HyperLynx Kellee Crisafulli, Matthew Flora*, Gene Garat, Dave Kohlmeier Incases Olaf Rethmeier, Scott Jacobson, Werner Rissiek Intel Corporation Stephen Peters*, Arpad Muranyi*, Frank Kern, (& formerly NCR) Will Hobbs, Prakash Radhakrishnan, Mohammed Hawana, Martin Chang, Dave Moxley, Tim Schreyer, Lyndell Asbenson LSI Logic (Symbios Logic) Larry Barnes Mentor Graphics (Zeelan, Bob Ross*, George Opsahl, Mark Noneman, Interconnectix, etc.) Tom Dagostino, Karine Loudet, Jean Oudinot, Manuel De Almeida, Stephane Rousseau, Neven Orhanovic, Mohamed Mahmoud, Kevin Cohan Mitsubishi Tam Cao Motorola (Ron Werner) National Semiconductor Cheng-Yang Kao, John Goldie, Ikchang Song, Milt Schwartz* North East Systems Associates Edward Sayre, Kathy Breda, Michael Baxter, (NESA) Jon Green, Jinhua Chen NEC (Hiroshi Matsumoto) Quantic EMC (Mike Ventham) Texas Instruments Thomas Fisher, Harvey Stiegler, Vincent Chang, Jean-Claude Perrin, Peter Forstner Thomson-CSF Jean-Marc Claveau, Laurent Duzaic, Saverio Lerose, Benoit Meyniel, Jean Lefebvre Viewlogic Jon Powell, Chris Rokusek, Guy de Burgh, Gary Mandel VeriBest Ian Dodd*, David Weins, Ian Gabbitas VLSI Technology D.C. Sessions* Zuken-Redac (John Berrie) OTHER PARTICIPANTS IN 1998: 3Com Steve Miller 3Dfx Interactive Ken Wu A.T.Sinker Tony Sinker Actel Eric Tardif, Emmonvelle Gaudin Aerospatiale Lionel Dreux, Claude Huet Alcatel (Bell, Espace, etc.) John Fitzpatrick, W. Temmerman, Laure Bessettes, Jean-Claude Pourtau, Daniel Peron ALS Design Yves Mouquet Ansoft Eric Bogatin Apple Fred Floresca, Danny Itani Apteq Design Systems Dan FitzPatrick Atmel Ali Baktashian Avanti Nik Bannov CERN Olivier Clere, Jean-Michel Sainson, Rudi Zurbroken Corning John Nieznanski Crucial Technology Rathna Reddy DIVA Corp Tieng Nguyen Dynamic Research Corporation Mike Walsh EIA Patti Rusher EMC Fawn Engelmann, Fabrizio Zanella ENST, Paris Jean-Jacques Charlot European CAD Standardization Adam Morawiec Intitiative (ECSI) Fairchild Semiconductor Peter LaFlamme Focus Technology John Salzillo, Gary Brophy, Mike Arieta, Jim Skane IBM Richard Steinle, Kevin Jackson, Greg Edlund* InRange Elliot Lipin Intracon Design Ltd. Derek Laidlaw Molex Gus Panella* Philips Semiconductor Todd Andersen Rockwell Semiconductor Tim Gilbert Scottish Electronics Robert Easson Manufacturing Center (SEMC) Seagate Vanessa Howard Signal Integrity Software Barry Katz SGS-Thomson Philippe Lefevre Siemens Gerald Bannert, Bernhard Unger, Christian Marot, Miguel Hernandez, Gil Russell SSEI Tom Hawkins Stratus Bruce Heilbrunn, Steve Mango, Lewis Steiner, Karla Eignor, Rich Newell Summit Computer Systems Bob Davis Sun Microsystems Lam Dong, Kevin Ko, Tay Ansari, Ken Weiss Symmetry Andy Hughes Tektronix Nassrin Ghahyasi, Tom Brinkoetter, Brad Weber, John Rettig Teradyne Michael Khusid Time Domain Analysis Systems Dima Smolyansky* TranSwitch Bill Todd TRILOGIC Joe Socha Ultratest International Chris O'Connor Xilinx Susan Wu In the list above, attendees at the meeting are indicated by *. Principal members or other active members who have not attended are in parentheses. Participants who no longer are in the organization are in square brackets. Upcoming Meetings: The bridge numbers for future IBIS teleconferences are as follows: Date Bridge Number Reservation # Passcode Monday, December 7, 1998 IBIS Summit Meeting - No Teleconference December 18, 1998 (916) 356-9200 3-241993 1195347 All meetings are 8:00 AM to 9:55 AM Pacific Time. We try to have agendas out 7 days before each Open Forum and meeting minutes out within 7 days after. When you call into the meeting, ask for the IBIS Open Forum hosted by Will Hobbs and give the reservation number and passcode. NOTE: "AR" = Action Required. -------------------------------- MINUTES ------------------------------------- INTRODUCTIONS AND MEETING QUORUM Dima Smolyansky of Time Domain Analysis Systems (TDASystems) produces software which does model extraction from time domain reflectometry measurement. He sees interest in IBIS and is interested in extending the equipment for IBIS model applications. Gus Panella of Molex is active in the IBIS Users Group working of IBIS extensions for coupled connector models. MEMBERSHIP UPDATE AND TREASURER'S REPORT No Report. REVIEW OF MINUTES AND AR'S Bob Ross reported some minor text corrections. Under Tektronix, Brad Webb is corrected to Brad Weber in the Participation list and in the text. Under Intel, Lynn Dell is corrected to Lyndell Asbenson. Bob also made corrections sent by Bob Haller who noted that he had made some statements attributed to Greg Edlund. The uploaded minutes have been revised to show the corrections and to distinguish comments made by Bob Ross and Bob Haller: Under IBISEAST OCTOBER 15, 1998 SUMMIT FEEDBACK: "Greg also noted that they appreciated Will Hobbs' presentation to move forward rapidly and to have the IBIS document keep pace with technology." Has been corrected to: "Bob Haller also noted that they appreciated Will Hobbs' presentation to move forward rapidly and to have the IBIS document keep pace with technology." Under DESIGNCON99 FEBRUARY 1, 1998 SUMMIT MEETING: "Greg Edlund noted that the Accuracy Committee has arranged for more Hewlett-Packard equipment than at the October 15, 1998 Summit meeting and is planning to use the booth. Greg asked if a CAE vendor could also be in the booth to show simulations that correlate with measurement." has been corrected to: "Bob Haller noted that the Accuracy Committee has arranged for more Hewlett-Packard equipment than at the October 15, 1998 Summit meeting and is planning to use the booth. Bob Haller asked if a CAE vendor could also be in the booth to show simulations that correlate with measurement." The ARs will be discussed during the meeting. MISCELLANY/ANNOUNCEMENTS None. PRESS AND WEB PAGE UPDATES Syed Huq reported that there have been some roster additions and updates. NEW MODELS AVAILABLE, LIBRARY UPDATE No report. Added note: Jon Powell sent out a message that the Models page has been updated. OPENS FOR NEW ISSUES None. INTERNATIONAL/EXTERNAL PROGRESS - IEC 62014-1 (IBIS Version 2.1) - No report. - pr EIAJ ED-5302 Standard for I/O Interface Model for Integrated Circuits (IMIC) - Bob Ross reported, as previously discussed that he, Stephen Peters, and Raj Raghuram will interface with the I/O Interface Model group. Norio Matsui will also participate. Raj is working on an accuracy test comparing a table Spice simulation with the silicon model simulations. He may report his results at the December 7, 1998 IBIS Summit Meeting. - IEC 93/67/NP IBIS and EMC Simulation - No report. Bob Ross will drop this item as an agenda topic since the task group is operating at a zero level. - JC-16.2 Subcommittee: Modeling and Test - Bob Ross noted that the co-located JEDEC JC-16.2 and IBIS Meeting will be discussed below. - IEEE P1537 Electronic Data Format Project (Previously listed as the Standard Component Data Sheet) - Stephen Peters stated that a meeting had occurred where the group is attempting to understand what data to put into the document. Contact Stephen if you need more information. IBIS (EAST) USERS GROUP MEETINGS Gus Panella stated that the Connector Group's goal is to produce a document by January 1, 1999. JEDEC/IBIS DECEMBER 7, 1998 SUMMIT MEETING Bob Ross estimated that about 10 participants have signed up so far to the IBIS meeting to be held in San Diego, California on Monday, December 7, 1998. However, he does not have the most recent report. So he estimates about 15 to 20 people - a smaller group for more interactive discussion. Apparently word has not gone out to the JEDEC group about the meeting. Bob and D.C. Sessions will investigate. While much of the discussion will be interactive, the planned agenda will include the following: Input Threshold Modeling - D.C. Sessions IMIC Discussions - Bob Ross IMIC Accuracy Report - Tentatively Raj Raghuram Overview of JEDEC JC16.2 Activities on Modeling and Test - ? Bob will formalize the Agenda and have it available a week before the IBIS meeting. On the next day Bob and Stephen Peters (along with D.C. Sessions) plan to participate at the JEDEC JC-16.2 Meeting on Tuesday, December 8, 1998. Stephen Plans to give a top-level overview of IBIS at that meeting. Added Note: The IBIS Summit Meeting co-located with the JEDEC meetings is scheduled in San Diego, California on Monday, December 7, 1998 from 12 Noon to 5 PM at the Kona Kai Continental Hotel (renamed the Shelter Pointe Hotel and Marina). The meeting will start with a free buffet lunch. Contact Patti Rusher (pattir@eia.org) or through the EIA IBIS home page Upcoming Events link to register for either or both the IBIS Summit meeting and any JEDEC meeting. DESIGNCON99 FEBRUARY 1, 1999 SUMMIT MEETING Milt Schwartz indicated that National Semiconductor is planning to sponsor the buffet lunch. Milt will also be handling the local logistics including signup and collecting and copying presentations for the IBIS Summit meeting. Bob Ross stated that the IBIS Open Forum is an Associate Sponsor of DesignCon99 and that DesignCon99 will be providing the meeting room and other refreshments. A mailing concerning DesignCon99 should appear on the IBIS reflectors. The latest DesignCon99 literature now shows the spelled out IBIS logo. Bob reported that DesignCon99 is also providing a booth with electricity and will cover any setup charges. Jon Powell will be handling the logistics of the booth. The plans are to host the IBIS User's Group with a hardware demonstration of the Accuracy Specification. Currently Jon is planning a poster with company logos and possibly pointers to their booth numbers at the show. VERSION 3.2 PARSER DEVELOPMENT Matthew Flora has sent the fix to BUG33 to Atul Agarwal. Bob Ross stated that he reviewed the latest Version 3.2.1 parser and checked that the fixes had been done. It included BUG30 additional tests for [Pin Mapping] and BUG32 changes related to BIRD54 to correct an unintended IBIS Specification misinterpretation forcing a matrix format for single line package models. Bob anticipates another version of ibischk3 pending resolution of the technical discussion below. VERSION 3.2 RATIFICATION Bob Ross indicated that he would like to plan the December 18, 1998 meeting for IBIS ratification discussion and vote. He had uploaded the document ver3_2c.ibs as previously reported and will plan a ver3_2d.ibs document and a clean version for ratification review. Bob plans to drop the long standing AR to produce BNF of the IBIS Version 3.0 specification. D.C. Sessions asked if anyone else would be willing to produce the BNF syntax. No one volunteered. TEKTRONIX IPA 510 SOFTWARE DISTRIBUTION PROPOSAL Bob Ross introduced the subject by noting at the last meeting Bob, Syed Huq and Patti Rusher were to work together to implement the software license transfer of the Tektronix IPA 510 software executable to the IBIS Open Forum and to work out the details for source code transfer and distribution. Bob reported that he had contacted Ed Sayre for advice, and Ed joined the committee. As a result of discussions in the group, some new issues and concerns were raised. A long discussion was held at this meeting relating to some of the aspects of the transfer terms and whether the IBIS committee should be doing this. The general concerns were whether this software was significantly relevant to the IBIS community and whether the IBIS committee needed to supply free software that may compete with some possible commercial offerings. Some of the points are documented here. Syed Huq briefly cited some background and initially proposed that the IPA 510 executable be offered from the IBIS Web site for a 6 month trial period to test whether it is applicable to IBIS users. Matthew Flora and others argued that we should be able to do this since we have links to free executables from other commercial sources. Bob Ross was more concerned about resolving the source code distribution problem first. Dima Smolyansky shared his experiences with this type of product and stressed that users would need to be supported. The need for and degree of support was debated, but it was noted that the software transfer proposal was motivated by the Tektronix decision not to support for the product. Matthew argued that people needing support would still go to the commercial operations, even with free software available. Arpad Muranyi cited the commercial Spice business as an example even with virtually free Spice available. Matthew stated that free software can have a positive effect of raising the bar for competitive products. Bob Ross expressed concern regarding having the IBIS committee deal with the source code management issue. A dedicated volunteer would be needed to manage the source code and its improvements. Other IBIS activities had a higher priority. D.C. Sessions stated that this was a copy-left situation. However, a gate keeper is required to manage the changes, and support is needed for new users. Bob called for a vote on whether the Tektronix proposal should be rejected (no) or whether discussion of the subject should be continued (yes) since we had to move onto other issues. The vote was 4 yes to 2 no to continue the discussion. Bob stated that the discussion will be continued as an agenda item at the December 18, 1998 meeting. COOKBOOK STATUS (Not Discussed) IBIS MODEL REVIEW COMMITTEE DISCUSSION (Not Discussed) AR - Matthew Flora issue to the IBIS reflector a short write-up on the IBIS Model Review Committee. BIRD55 - [Model Spec] Vmeas Addition Bob Ross stated that the planned PCI66 discussion would be combined with the BIRD55 discussion. The PCI66 discussion had occurred on the IBIS reflector regarding some test load enhancements to support the PCI Specification. The question raised privately by Kellee Crisafulli was whether BIRD55 was compatible with possible extensions that might be done as an outcome of the PCI66 discussion. Bob summarized the PCI66 issue that Greg Edlund had asked whether IBIS could handle a separate rising waveform and falling waveform test load (and a possibly different Vmeas value. Some other products specify two different timing test loads. This includes an older version of the PCI specification. The merits of doing this were discussed on the reflector with respect to better matching some best case and worst case loading conditions. However, Greg and others still advocated a simpler, one-test load approach for models. Bob noted that BIRD55 did not deal with these issues. Rather, it provided for a minimum and maximum value of Vmeas when needed by certain technologies. IBIS models for PECL technology need Vmeas to shift for min and max columns to preserve the constant offset from the min and max values of the positive voltage rail. IBIS models for ECL configurations (with the positive reference at ground) would have the same Vmeas values for min and max columns. To a lesser extent the CMOS technology with test points referenced to a percentage of Vcc would also need min and max column Vmeas values. Bob stated that multiple test loads could be specified using the [Model Selector] keyword. It would be up to the simulator and user to process this information. Bob also suggested that even with an approved BIRD55, the IBIS Open Forum could still decide on handling rising edge and falling edge specifications separately. Bob would propose adding, for example the [Model] subparameters Vref_f, Rref_f, Cref_f, and Vmeas_f to add the falling information if it is different to the existing Vref, Rref, Cref and Vmeas. In this case, the later parameters would be used only for the rising edge, and the *_f parameters would be used for the falling edge. The Vmeas_f would also have an optional [Model Spec] entry with min and max entries. After some questions and more discussion, Bob called for a vote. BIRD55 was approved with 3 abstentions. BUG31 - Error for [Pulldown] Decreasing Current Should be Warning Bob Ross noted that we did not have time to discuss this. However, he was leaning to close it out with no change. SERIES ELEMENTS RESTRICTION Bob Ross stated that the Series element restriction had indirectly become an IBIS reflector discussion. The initial discussion was based on a question on whether differential pins could be specified when attached to Series elements. Chris Rokusek had interpreted the specification as indirectly prohibiting such a connection. However he would support a BIRD allowing such an extension. Arpad Muranyi had motivated the initial reflector question when dealing with a specific input/output configuration spanning two pins. At the meeting, Bob and D.C. Sessions noted that differential source and load terminators within a component were common practice in some devices. Bob thought the restriction was based on the fact that the [Series Pin Mapping] itself contained the restriction that limited Series elements to NC and Terminator connections. Bob had initially wanted a limited usage of the Series element in order to be consistent with the more limited usage of the Terminator element. Some mentioned on the reflector the Electrical Board Description format could be used as a workaround. Arpad argued at the meeting that the EBD approach provides an unnecessary complication. He would prefer no restrictions and cited allowing, for example, decoupling capacitors between supplies. After more general discussions, Bob proposed issuing a BIRD to continue the discussion on the IBIS reflector. A BIRD removing the restrictive sections in the [Series Pin Mapping] keyword would satisfy all concerns. AR - Bob Ross issue a BIRD removing the [Series Pin Mapping] connection restrictions allowing it to be used for only NC and Terminator models. 100 POINT BIRD? (No discussion) EIAJ IMIC TECHNICAL DISCUSSION (No Discussion) NEXT MEETING: The next meeting is the IBIS Summit Meeting on December 7, 1988 in San Diego, California. There will not be any teleconference connection. The following meeting will be on Friday, December 18, 1998 from 8:00 AM to 10:00 AM. IBIS Version 3.2 Ratification Vote is planned. Ibischk3 parser acceptance vote is planned. Votes on any new BIRDs are planned. ============================================================================== NOTES IBIS CHAIR: Bob Ross (503) 685-0732, Fax (503) 685-4897 bob_ross@mentorg.com Modeling Engineer, Interconnectix BU of Mentor Graphics 8005 S.W. Boeckman Road, Wilsonville, OR 97070 VICE CHAIR: Stephen Peters (503) 264-4108, Fax: (503) 264-4515 sjpeters@ichips.intel.com Senior Hardware Engineer, Intel Corporation M/S JF1-56 2111 NE 25th Ave. Hillsboro, Oregon 97124-5961 SECRETARY: Matthew Flora (425) 869-2320, Fax: (425) 881-1008 mbflora@hyperlynx.com Senior Engineer, HyperLynx, Inc. 17641 NE 67th Court Redmond, WA 98052 LIBRARIAN: Jon Powell (805) 988-8250, Fax: (805) 988-8259 jonp@qdt.com Senior Scientist, Viewlogic Systems(formerly Quad Design) 1385 Del Norte Rd., Camarillo, CA 93010 This meeting was conducted in accordance with the EIA Legal Guides and EIA Manual of Organization and Procedure. The following e-mail addresses are used: ibis-request@eda.org To join, change, or drop from either the IBIS Open Forum Reflector (ibis@eda.org), the IBIS Users' Group Reflector (ibis-users@eda.org) or both. State your request. ibis-info@eda.org To obtain general information about IBIS, to ask specific questions for individual response, and to inquire about joining the EIA-IBIS Open Forum as a full Member. ibis@eda.org To send a message to the general IBIS Open Forum Reflector. This is used mostly for IBIS Standardization business and future IBIS technical enhancements. Job posting information is not permitted. ibis-users@eda.org To send a message to the IBIS Users' Group Reflector. This is used mostly for IBIS clarification, current modeling issues, and general user concerns. Job posting information is not permitted. ibischk-bug@eda.org To report ibischk2 parser bugs. The Bug Report Form Resides on eda.org in /pub/ibis/bugs/ibischk/bugform.txt along with reported bugs. To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt, /pub/ibis/bugs/s2ibis2/bugs2i2.txt, & /pub/ibis/bugs/s2iplt/bugsplt.txt respectively. Information on IBIS technical contents, IBIS participants, and actual IBIS models are available on the IBIS Home page found by selecting the Electronic Information Group under: http://www.eia.org Check the pub/ibis directory on eda.org for more information on previous discussions and results. You can get on via FTP anonymous. ============================================================================== From owner-ibis Wed Nov 25 09:00:46 1998 Received: from mail-gw2.pacbell.net (mail-gw2.pacbell.net [206.13.28.53]) by server.eda.org (8.8.5/8.8.3) with ESMTP id JAA09935 for ; Wed, 25 Nov 1998 09:00:46 -0800 (PST) Received: from pacbell.net (ppp-209-79-182-14.vntrcs.pacbell.net [209.79.182.14]) by mail-gw2.pacbell.net (8.8.8/8.7.1+antispam) with ESMTP id IAA28214; Wed, 25 Nov 1998 08:55:10 -0800 (PST) Message-ID: <365C1DC5.A190B648@pacbell.net> Date: Wed, 25 Nov 1998 07:09:57 -0800 From: Jon Powell Reply-To: jonp@qdt.com Organization: Viewlogic Consulting Services X-Mailer: Mozilla 4.04 [en]C-PBI-NC404 (Win95; I) MIME-Version: 1.0 To: Gary Templeton CC: ibis@vhdl.org Subject: Re: VOH as a function of Iout References: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Gary, The Altera IBIS models are very good. They follow the spec. as exactly as their available data could. I do not know of any VOH/IOH mapping in IBIS but I do think that the Altera models will give correct voltages no matter what load you attach. Can you provide more information on your problem? Jon Powell From owner-ibis Wed Nov 25 13:36:38 1998 Received: from relay1.wv.mentorg.com (relay1.mentorg.com [192.94.38.42]) by server.eda.org (8.8.5/8.8.3) with ESMTP id NAA10547 for ; Wed, 25 Nov 1998 13:36:38 -0800 (PST) Received: from em-wv03.wv.mentorg.com by relay1.wv.mentorg.com (8.8.8/CF5.40F) id NAA23988; Wed, 25 Nov 1998 13:31:29 -0800 (PST) Received: from bob by em-wv03.wv.mentorg.com (8.8.8/CF5.40R) id NAA01048; Wed, 25 Nov 1998 13:31:30 -0800 (PST) From: bob_ross@mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA08712; Wed, 25 Nov 98 13:31:28 PST Date: Wed, 25 Nov 98 13:31:28 PST Message-Id: <9811252131.AA08712@bob> To: ibis@eda.org Subject: BIRD56 - Relaxation of [Series Pin Mapping] Restriction IBIS folks: As an action item in the November 20, 1998 meeting, BIRD56 is issued to remove a restriction in the [Series Pin Mapping] keyword that prevented using the Series models for some practical applications. We plan to discuss and possibly vote on BIRD56 at the next teleconference IBIS Open Forum meeting. Bob Ross Interconnectix/Mentor Graphics ****************************************************************************** ****************************************************************************** BIRD ID#: 56 ISSUE TITLE: Relaxation of [Series Pin Mapping] Restriction REQUESTER: Bob Ross, Mentor Graphics DATE SUBMITTED: November 25, 1998 DATE ACCEPTED BY IBIS OPEN FORUM: Pending ****************************************************************************** ****************************************************************************** STATEMENT OF THE ISSUE: [Series Pin Mapping] specifies connection only to Terminator or NC pins. This restricts using the Series elements for other purposes such as providing an internal differential termination to a differential input or output. ****************************************************************************** STATEMENT OF THE RESOLVED SPECIFICATIONS: In the [Series Pin Mapping] keyword below, the suggested change is shown in the revised paragraph that is bracketed by |* lines: |============================================================================= | Keyword: [Series Pin Mapping] | Required: No | Description: Used to associate two pins joined by a series model. | Sub-Params: pin_2, model_name, function_table_group | Usage Rules: Enter only series pin pairs. The first column, [Series Pin | Mapping], contains the series pin for which input impedances | are measured. The second column, pin_2, contains the other | connection of the series model. Each pin must match the pin | names declared previously in the [Pin] section of the IBIS | file. The third column, model_name, associates the Series or | Series_switch model for the pair of pins in the first two | columns. The fourth column, function_table_group, contains | an alphanumeric designator string to associate those sets of | Series_switch pins that are switched together. | | Each line must contain either three or four columns. When | using four columns, the header function_table_group must be | listed. | | One possible application is to model crossbar switches where | the straight through On paths are indicated by one designator | and the cross over On paths are indicated by another | designator. If the model referenced is a Series model, then | the function_table_group entry is omitted. | | Column length limits are: | [Series Pin Mapping] 5 characters max | pin_2 5 characters max | model_name 20 characters max | function_table_group 20 characters max | | Other Notes: If the model_name is for a non-symmetrical series model, | then the order of the pins is important. The [Series Pin | Mapping] and pin_2 entries must be in the columns that | correspond with Pin 1 and Pin 2 of the referenced model. | | This mapping covers only the series paths between pins. The | package parasitics and any other elements such as additional | capacitance or clamping circuitry are defined by the | model_name that is referenced in the [Pin] keyword. The | model_names under the [Pin] keyword that are also referenced | by the [Series Pin Mapping] keyword must be either 'NC' or | reference a [Model] whose Model_type is 'Terminator'. Thus. | for example, a Series_switch model may contain Terminator | models on EACH of the pins to describe both the capacitance | on each pin and some clamping circuitry that may exist on | each pin. | | |* Replace the above Paragraph with this Paragraph: | This mapping covers only the series paths between pins. The | package parasitics and any other elements such as additional | capacitance or clamping circuitry are defined by the | model_name that is referenced in the [Pin] keyword. The | model_names under the [Pin] keyword that are also referenced | by the [Series Pin Mapping] keyword may include any legal | model or reserved word except for Series and Series_switch | models. Normally the pins will reference a [Model] whose | Model_type is 'Terminator'. For example, a Series_switch | model may contain Terminator models on EACH of the pins to | describe both the capacitance on each pin and some clamping | circuitry that may exist on each pin. In a similar manner, | Input, I/O or Output models may exist on each pin of a Series | model that is serving as a differential termination. |* End of Revised Paragraph. |----------------------------------------------------------------------------- [Series Pin Mapping] pin_2 model_name function_table_group | 2 3 CBTSeries 1 | Four independent groups 5 6 CBTSeries 2 9 8 CBTSeries 3 12 11 CBTSeries 4 | 22 23 CBTSeries 5 | Straight through path 25 26 CBTSeries 5 22 26 CBTSeries 6 | Cross over path 25 23 CBTSeries 6 | 32 33 Fixed_series | No group needed | ****************************************************************************** ANALYSIS PATH/DATA THAT LED TO SPECIFICATION: BIRD41.8 discusses some background for the initial restriction in its ANALYSIS ... section. In particular, the evolution through BIRD41.3 and BIRD41.4 documents that simplicity was the original reason for restricting the connecting pins of [Series Pin Mapping] to Terminators and NC. It was also left as a simulator specific extension that POWER or GND Pins could also be used. (See http://www.eda.org/pub/ibis/birds and select BIRD41.8.) The fact that Input, Output, and I/O pins were excluded meant that the series element could not be used to provide differential connections between pins. BIRD56 fixes this problem. Because legal reserved words are permitted, any of the pins may be connected to POWER, GND or NC pins, as needed. The major argument for relaxing the restriction is that some of these extended cases permit additional practical connection configurations. There was not a technical reason for maintaining the restriction. ****************************************************************************** ANY OTHER BACKGROUND INFORMATION: IBIS reflector discussion between October 7 - 12, 1998 discussed this issue. Chris Rokusek in response to some discussions with Arpad Muranyi raised the original clarification question and also supported a BIRD which would relax the restriction. At the November 20, 1998 IBIS meeting, this issue was discussed. The action was to issue this BIRD for further discussion and resolution. ****************************************************************************** From owner-ibis Mon Nov 30 13:24:54 1998 Received: from relay1.wv.mentorg.com (relay1.mentorg.com [192.94.38.42]) by server.eda.org (8.8.5/8.8.3) with ESMTP id NAA22941 for ; Mon, 30 Nov 1998 13:24:54 -0800 (PST) Received: from em-wv03.wv.mentorg.com by relay1.wv.mentorg.com (8.8.8/CF5.40F) id NAA03148; Mon, 30 Nov 1998 13:19:44 -0800 (PST) Received: from bob by em-wv03.wv.mentorg.com (8.8.8/CF5.40R) id NAA16405; Mon, 30 Nov 1998 13:19:46 -0800 (PST) From: bob_ross@mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA11398; Mon, 30 Nov 98 13:19:43 PST Date: Mon, 30 Nov 98 13:19:43 PST Message-Id: <9811302119.AA11398@bob> To: ibis@eda.org Subject: IBIS SUMMIT MEETING AGENDA 12/7/98 I B I S S U M M I T M E E T I N G A G E N D A 12:00 PM - 5:00 PM, Monday, December 7, 1998 Shelter Pointe Hotel and Marina (formerly Kona Kai Continental Hotel) 1551 Shelter Island Drive San Diego, CA 92106-3102 12:00 Noon BUFFET LUNCH (Free to Participants) 1:00 PM INTRODUCTIONS - BUSINESS - Business Items, Next Meeting, etc. - Added Discussions/Presentations for Agenda 1:30 PM INPUT THRESHOLD MODELING D.C. Sessions, VLSI Logic 2:00 PM IBIS FUTURE NEEDS DISCUSSION Stephen Peters, Intel Corporation 2:30 PM OVERVIEW OF JEDEC JC16.2 ACTIVITIES ON MODELING AND TEST JEDEC Representative 3:00 PM BREAK 3:15 PM IMIC DISCUSSION Bob Ross, Mentor Graphics 3:45 PM IMIC ACCURACY REPORT Raj Raghuram, Applied Simulation Technology 4:15 PM GENERAL MODELING AND TECHNOLOGY DISCUSSION 4:45 PM GENRERAL WRAP-UP 5:00 PM ADJOURN I B I S S U M M I T M E E T I N G F I N A L S I G N U P SIGNUP: IBIS MEETING DEADLINE, THURSDAY, DECEMBER 3, 1998 CO-LOCATED WITH JEDEC JC-16.2 ON MODELING AND TEST CONTACT: (For both IBIS and JEDEC Meetings) Patti Rusher pattir@eia.org CALL FOR PRESENTATIONS: We are seeking presentations from individuals who have IBIS experiences or issues. Format of Presentation: Overhead Projections Time: 15-30 Minutes Electronic Archival: We request electronic versions so that the presentations can be archived and also made available to non-attendees. Formats used in the past have been text, Power Point, Word, Postscript, and Acrobat. Plan to bring about 20 copies for distribution at the meeting. If you plan a presentation, please supply Title: Presenter: E-mail address: Company: Telephone: Estimate Time: Send this to: Bob Ross bob_ross@mentorg.com