From: owner-ibis-users@ (ibis-users) To: ibis-users-digest@eda.org Subject: ibis-users V1 #7 Reply-To: Sender: owner-ibis-users@ Errors-To: owner-ibis-users@ Precedence: bulk ibis-users Tuesday, July 23 2002 Volume 01 : Number 007 ---------------------------------------------------------------------- Date: Mon, 1 Jul 2002 09:22:50 -0700 From: "Dagostino, Tom" Subject: RE: [IBIS-Users] Rising/Falling Waveform generation The "problem" you are seeing is in fact not and issue at all. All buffers have a finite output impedance. For a logic gate the output impedance will range from about an Ohm to well over 50 Ohms. The output impedance forms a voltage divided between the open circuit output voltage and the load (50 Ohms in this case). True, you gate will swing 0 to Vdd open circuit but it will not swing the same range with 1 Ohm or 10 Ohms or even a 50 Ohm load. Even Bonneville Dam has a finite output impedance. Tom Dagostino Modeling Manager Mentor Graphics Corp. SAS tom_dagostino@mentor.com 503-685-1613 - -----Original Message----- From: John Phillippe [mailto:ra6314@email.sps.mot.com] Sent: Friday, June 28, 2002 3:43 PM To: Scott McMorrow Cc: John Phillippe; ibis-users@server.eda.org Subject: Re: [IBIS-Users] Rising/Falling Waveform generation Scott McMorrow wrote: > > John, > > My guess is there is something wrong with your simulation deck setup. > Rfixture and Vfixture is simple load placed on the output of your > buffer during VT table extraction. It is no different than setting up > your spice deck by hand, attaching a pulse source to the input of the > buffer and a resistive load to the output of the buffer and simulating. > If your buffer is capable of driving a 50 ohm load, then there should > not be a problem with spice2ibis. If there is, it would be generally a > setup or connectivity problem. > > An Rfixture of 100K would be useless to an ibis simulator, since the > simulator will attempt to scale the rising and falling waveforms to the > actual load impedance of 50 to 75 ohms in system. This scaling would > cause significant waveform errors. > > My suggestion is to setup the buffer independently of spice2ibis and > verify that it actually is capable of driving a standard load. If it > is, then you have an issue with the connections in the decks used for > ibis extraction. > > Regards, > > Scott > > John Phillippe wrote: > > >Dear Everyone, > > I can't seem to generate decent rising and falling waveforms in IBIS. > >After looking at the generated spice files, I found that the problem was > >with the Rfixture and Vfixture. I found that if I didn't use a test > >fixture of any kind, then the waveforms came out correct. However I had > >to manually generate them. So I went back and tried monkeying with the > >Rfixture values, and found that a 100K resistor seems to allow IBIS to > >generate a good waveform. > > I've never used an IBIS model in a simulation environment before, and > >so I guess my question is regarding the Rfixture, and what it is used > >for. Could I manually generate my edges and then specify an Rfixture of > >0 ohms in the ibis file? Is having an Rfixture of 100k going to cause > >any problems for the end users? Scott, When I setup the rising/falling test with a 50ohm load, and let s2ibis do it's runs, I get corresponding rising and falling waveforms, my problems lie in the fact that my waveforms never go from gnd to Vdd. The following 4 lines are taken from one of my .s2i files. [Rising waveform] 50 5.0 4.75 5.25 NA 50pF 233.0m 9.35nH 0.87pF [Falling waveform] 50 5.0 4.75 5.25 NA 50pF 233.0m 9.35nH 0.87pF [Rising waveform] 50 0 NA NA NA 50pF 233.0m 9.35nH 0.87pF [Falling waveform] 50 0 NA NA NA 50pF 233.0m 9.35nH 0.87pF When looking at the results, the rising and falling waveforms with a Vfixture of 5V, have a rising waveform starting at a value above 0V, and ending at 5V. The falling waveform starts at 5V, and ends above 0V. The waveforms with a Vfixture of 0V have a bottom of 0V, but a ceiling of less than 5V. It doesn't "seem right." If this is how it should be however, someone please let me know! I would expect voltage range of between 0V and 5V. Thanks. - -- John Phillippe SPS, 32 Bit Embedded Controller Division, IC Creation Motorola - 512-895-1835 Austin, TX - ra6314@email.sps.mot.com |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 1 Jul 2002 18:13:04 -0400 From: "Lynne Green" Subject: RE: [IBIS-Users] Rising/Falling Waveform generation Hello, John, When driving a 50-Ohm load, the swing is not 0-Vcc. (One only gets full swing when driving a capacitive load.) If you draw a load line for your driver FET and 50-ohm load, the two intersection points should match the endpoints in your SPICE simulation. (One load line for rising and one for falling, since the two FETs probably do not have perfectly matched I-V curves.) The value for Rfixture should be near the typical transmission line load. The designed transmission line impedance (load) varies with logic family, but values are typically between 50 and 150 Ohms. Best regards, Lynne Dr. Lynne Green Senior Member of Consulting Staff Cadence Design Systems, Inc. "All the world's an analog stage, whereon digital plays bit parts." - -----Original Message----- From: John Phillippe [mailto:ra6314@email.sps.mot.com] Sent: Thursday, June 27, 2002 9:28 AM To: ibis-users@eda.org Subject: [IBIS-Users] Rising/Falling Waveform generation Dear Everyone, I can't seem to generate decent rising and falling waveforms in IBIS. After looking at the generated spice files, I found that the problem was with the Rfixture and Vfixture. I found that if I didn't use a test fixture of any kind, then the waveforms came out correct. However I had to manually generate them. So I went back and tried monkeying with the Rfixture values, and found that a 100K resistor seems to allow IBIS to generate a good waveform. I've never used an IBIS model in a simulation environment before, and so I guess my question is regarding the Rfixture, and what it is used for. Could I manually generate my edges and then specify an Rfixture of 0 ohms in the ibis file? Is having an Rfixture of 100k going to cause any problems for the end users? - -- John Phillippe SPS, 32 Bit Embedded Controller Division, IC Creation Motorola - 512-895-1835 Austin, TX - ra6314@email.sps.mot.com |------------------------------------------------------------------ |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 09 Jul 2002 10:21:23 -0700 From: "Senthilkumar.Kalidoss" Subject: [IBIS-Users] Multiple Supply voltages in IBIS - --------------F0ED636C40C163ECD7C80509 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit I have IOs working with two different supply voltages. I could specify only one sweep voltage in one xxxx.s2i file. I use s2ibis2.1 to generate IBIS model. Can you please suggest me whether it is possible to create only one IBIS model and how?. Or is it better to create two models for two different voltages? Thank you, - ------- Senthil Integrated Device Technology. Inc - --------------F0ED636C40C163ECD7C80509 Content-Type: text/html; charset=us-ascii Content-Transfer-Encoding: 7bit   I  have IOs  working with two different supply voltages. I could specify only one sweep voltage in one xxxx.s2i file.
I use s2ibis2.1 to generate IBIS model.  Can you please  suggest me whether it is possible to create  only one IBIS model and how?.  Or is it better to create two models for two different voltages?

Thank you,      

-------
Senthil  
Integrated Device Technology. Inc
  - --------------F0ED636C40C163ECD7C80509-- |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 9 Jul 2002 14:15:55 -0400 From: "Lynne Green" Subject: RE: [IBIS-Users] Multiple Supply voltages in IBIS Hello, Senthil, It is necessary to make two different models. The two models will have different values for some of the voltage keywords. The related keywords are [Voltage Range], [Pullup Reference], [Pulldown Reference], [POWER Clamp Reference], and [GND Clamp Reference]. Best regards, Lynne Dr. Lynne Green Senior Member of Consulting Staff Cadence Design Systems, Inc. "All the world's an analog stage, whereon digital plays bit parts." - -----Original Message----- From: Senthilkumar.Kalidoss [mailto:skalidas@idt.com] Sent: Tuesday, July 09, 2002 10:21 AM To: ibis-users@eda.org Subject: [IBIS-Users] Multiple Supply voltages in IBIS I have IOs working with two different supply voltages. I could specify only one sweep voltage in one xxxx.s2i file. I use s2ibis2.1 to generate IBIS model. Can you please suggest me whether it is possible to create only one IBIS model and how?. Or is it better to create two models for two different voltages? Thank you, - ------- Senthil Integrated Device Technology. Inc |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 9 Jul 2002 14:19:53 -0500 From: "Stacy L Gore" Subject: RE: [IBIS-Users] Multiple Supply voltages in IBIS On a related subject--- Does anyone know what the future intent of the [Model Selector] section? I was hoping that the tool vendors had some plans to utilize this with some external trigger to use different I/O models within the same IBIS model based on circuit configuration (like supply voltage). I am really not sure what the section was ever intended to be used for. Stacy Gore Raytheon "Lynne Green" To: "Senthilkumar.Kalidoss" , Sent by: cc: owner-ibis-users@ser Subject: RE: [IBIS-Users] Multiple Supply voltages in IBIS ver.eda.org 07/09/2002 01:15 PM Hello, Senthil, It is necessary to make two different models. The two models will have different values for some of the voltage keywords. The related keywords are [Voltage Range], [Pullup Reference], [Pulldown Reference], [POWER Clamp Reference], and [GND Clamp Reference]. Best regards, Lynne Dr. Lynne Green Senior Member of Consulting Staff Cadence Design Systems, Inc. "All the world's an analog stage, whereon digital plays bit parts." - -----Original Message----- From: Senthilkumar.Kalidoss [mailto:skalidas@idt.com] Sent: Tuesday, July 09, 2002 10:21 AM To: ibis-users@eda.org Subject: [IBIS-Users] Multiple Supply voltages in IBIS I have IOs working with two different supply voltages. I could specify only one sweep voltage in one xxxx.s2i file. I use s2ibis2.1 to generate IBIS model. Can you please suggest me whether it is possible to create only one IBIS model and how?. Or is it better to create two models for two different voltages? Thank you, - ------- Senthil Integrated Device Technology. Inc |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 9 Jul 2002 13:10:41 -0700 (PDT) From: Syed Huq Subject: Re: [IBIS-Users] Multiple Supply voltages in IBIS Since you have two Vddq, you could create two IBIS models. One for each Vddq and use the [Model Selector] to let the user choose which one to use.. Both models will reside within ONE IBIS file. Syed >Date: Tue, 09 Jul 2002 10:21:23 -0700 >From: "Senthilkumar.Kalidoss" >X-Accept-Language: en >MIME-Version: 1.0 >To: ibis-users@eda.org >Subject: [IBIS-Users] Multiple Supply voltages in IBIS > > I have IOs working with two different supply voltages. I could >specify only one sweep voltage in one xxxx.s2i file. >I use s2ibis2.1 to generate IBIS model. Can you please suggest me >whether it is possible to create only one IBIS model and how?. Or is >it better to create two models for two different voltages? > >Thank you, > >------- >Senthil >Integrated Device Technology. Inc > > |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 9 Jul 2002 16:20:39 -0400 From: Matthew Flora Subject: RE: [IBIS-Users] Multiple Supply voltages in IBIS Dear Stacy Gore, As I understand it, the [Model Selector] was meant to be used on components with configurable pins. For example, a processor with selectable bus speeds or an FPGA that allow a choice of buffers to be used with a pin. Best regards, Matthew Flora > -----Original Message----- > From: Stacy L Gore [mailto:Stacy_L_Gore@raytheon.com] > Sent: Tuesday, July 09, 2002 12:20 PM > To: Lynne Green > Cc: ibis-users@server.eda.org; owner-ibis-users@server.eda.org; > skalidas@idt.com > Subject: RE: [IBIS-Users] Multiple Supply voltages in IBIS > > > > On a related subject--- > Does anyone know what the future intent of the [Model > Selector] section? > I was hoping that the tool vendors had some plans to utilize > this with some > external trigger to use different I/O models within the same > IBIS model > based on circuit configuration (like supply voltage). > I am really not sure what the section was ever intended to be > used for. > > Stacy Gore > Raytheon > > > > > > > > "Lynne Green" > > > To: > "Senthilkumar.Kalidoss" , > > Sent by: cc: > > > owner-ibis-users@ser Subject: > RE: [IBIS-Users] Multiple Supply voltages in IBIS > > ver.eda.org > > > > > > > > > 07/09/2002 01:15 PM > > > > > > > > > > > > > Hello, Senthil, > > It is necessary to make two different models. The two models will > have different values for some of the voltage keywords. > > The related keywords are [Voltage Range], [Pullup Reference], > [Pulldown Reference], [POWER Clamp Reference], and > [GND Clamp Reference]. > > Best regards, > Lynne > > Dr. Lynne Green > Senior Member of Consulting Staff > Cadence Design Systems, Inc. > > "All the world's an analog stage, whereon digital plays bit parts." > > > -----Original Message----- > From: Senthilkumar.Kalidoss [mailto:skalidas@idt.com] > Sent: Tuesday, July 09, 2002 10:21 AM > To: ibis-users@eda.org > Subject: [IBIS-Users] Multiple Supply voltages in IBIS > > > I have IOs working with two different supply voltages. I > could specify > only one sweep voltage in one xxxx.s2i file. > I use s2ibis2.1 to generate IBIS model. Can you please > suggest me whether > it is possible to create only one IBIS model and how?. Or > is it better to > create two models for two different voltages? > Thank you, > ------- > Senthil > Integrated Device Technology. Inc > > > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > > > > > > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 09 Jul 2002 17:53:41 -0700 From: "Senthilkumar.Kalidoss" Subject: Re: [IBIS-Users] Multiple Supply voltages in IBIS - --------------89C93FAF0ECEF0F322C9509E Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Thanking you all for your responses. In the [Pin] section of IBIS model, we have only one pair of POWER/GND recognized/present and i was wondering how the tool which uses IBIS model file, can supply two different voltages for two different IO cells. Senthil Lynne Green wrote: > Hello, Senthil, > > It is necessary to make two different models. The two models will > have different values for some of the voltage keywords. > > The related keywords are [Voltage Range], [Pullup Reference], > [Pulldown Reference], [POWER Clamp Reference], and > [GND Clamp Reference]. > > Best regards, > Lynne > > Dr. Lynne Green > Senior Member of Consulting Staff > Cadence Design Systems, Inc. > > "All the world's an analog stage, whereon digital plays bit parts." > > -----Original Message----- > From: Senthilkumar.Kalidoss [mailto:skalidas@idt.com] > Sent: Tuesday, July 09, 2002 10:21 AM > To: ibis-users@eda.org > Subject: [IBIS-Users] Multiple Supply voltages in IBIS > > I have IOs working with two different supply voltages. I could specify only one sweep voltage in one xxxx.s2i file. > I use s2ibis2.1 to generate IBIS model. Can you please suggest me whether it is possible to create only one IBIS model and how?. Or is it better to create two models for two different voltages? > Thank you, > ------- > Senthil > Integrated Device Technology. Inc > > - -- Senthil Internet Products Division Integrated Device Technology. Inc Work:408-654-6579 - --------------89C93FAF0ECEF0F322C9509E Content-Type: text/html; charset=us-ascii Content-Transfer-Encoding: 7bit  
    Thanking you all for your responses.  In the [Pin] section of IBIS model, we have only one pair of POWER/GND recognized/present and i was wondering how the tool which uses IBIS model file, can supply two different voltages for two different IO cells.

Senthil

Lynne Green wrote:

Hello, Senthil,

It is necessary to make two different models.  The two models will
have different values for some of the voltage keywords.

The related keywords are [Voltage Range], [Pullup Reference],
[Pulldown Reference], [POWER Clamp Reference], and
[GND Clamp Reference].

Best regards,
Lynne

Dr. Lynne Green
Senior Member of Consulting Staff
Cadence Design Systems, Inc.

"All the world's an analog stage, whereon digital plays bit parts."

-----Original Message-----
From: Senthilkumar.Kalidoss [mailto:skalidas@idt.com]
Sent: Tuesday, July 09, 2002 10:21 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] Multiple Supply voltages in IBIS

  I  have IOs  working with two different supply voltages. I could specify only one sweep voltage in one xxxx.s2i file.
I use s2ibis2.1 to generate IBIS model.  Can you please  suggest me whether it is possible to create  only one IBIS model and how?.  Or is it better to create two models for two different voltages?
Thank you,
-------
Senthil
Integrated Device Technology. Inc
 
 

-- 
Senthil
Internet Products Division  
Integrated Device Technology. Inc
Work:408-654-6579
  - --------------89C93FAF0ECEF0F322C9509E-- |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 9 Jul 2002 21:02:16 -0400 From: John Angulo Subject: [IBIS-Users] FW: Extreme currents???? The following is forwarded on behalf of Chris DeWitt at Motorola TCG. Please send all private replies to Chris.Dewitt@motorola.com. John Angulo IBIS Open Forum Postmaster - ----------------------------------- If I run IBISCHK3 on many models I download I get an "Extreme currents present" warning. What are the limits on currents in the VI tables? I can't find it documented anywhere. Thanks Chris DeWitt Principal Staff Engineer Motorola TCG |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Jul 2002 18:19:19 -0400 From: "Lynne Green" Subject: re: [IBIS-Users] FW: Extreme currents???? Hello, Chris, Different EDA tools have different upper limits on currents that can be handled by the simulator. The warning is needed because "Spice" models that use the default series resistance (0.0 ohms) for diodes and junction leakage currents result in large IBIS table currents (often above 1 MegAmp). Most EDA tools don't go quite _that_ high. Best regards, Lynne - -----Original Message----- From: John Angulo [mailto:jangulo@innoveda.com] Sent: Tuesday, July 09, 2002 6:02 PM To: ibis-users@eda.org Subject: [IBIS-Users] FW: Extreme currents???? The following is forwarded on behalf of Chris DeWitt at Motorola TCG. Please send all private replies to Chris.Dewitt@motorola.com. John Angulo IBIS Open Forum Postmaster - ----------------------------------- If I run IBISCHK3 on many models I download I get an "Extreme currents present" warning. What are the limits on currents in the VI tables? I can't find it documented anywhere. Thanks Chris DeWitt Principal Staff Engineer Motorola TCG |------------------------------------------------------------------ |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Jul 2002 15:32:32 -0700 From: "Muranyi, Arpad" Subject: RE: [IBIS-Users] FW: Extreme currents???? I don't think this is so much of an issue of how high the tools can go as Lynne stated. A number is a number, regardless of how high it is... (Aside from the precision variations you run into depending on the number of bytes used for the numbers). The real problem in my opinion is that if you have a diode that does this, it will clip an overshoot, which may be different from what a real device does, and you will see waveforms that are incorrect. Arpad Muranyi Intel Corporation ============================================================= - -----Original Message----- From: Lynne Green [mailto:lgreen@cadence.com] Sent: Wednesday, July 10, 2002 3:19 PM To: Chris.Dewitt@motorola.com; ibis-users@eda.org Subject: re: [IBIS-Users] FW: Extreme currents???? Hello, Chris, Different EDA tools have different upper limits on currents that can be handled by the simulator. The warning is needed because "Spice" models that use the default series resistance (0.0 ohms) for diodes and junction leakage currents result in large IBIS table currents (often above 1 MegAmp). Most EDA tools don't go quite _that_ high. Best regards, Lynne - -----Original Message----- From: John Angulo [mailto:jangulo@innoveda.com] Sent: Tuesday, July 09, 2002 6:02 PM To: ibis-users@eda.org Subject: [IBIS-Users] FW: Extreme currents???? The following is forwarded on behalf of Chris DeWitt at Motorola TCG. Please send all private replies to Chris.Dewitt@motorola.com. John Angulo IBIS Open Forum Postmaster - ----------------------------------- If I run IBISCHK3 on many models I download I get an "Extreme currents present" warning. What are the limits on currents in the VI tables? I can't find it documented anywhere. Thanks Chris DeWitt Principal Staff Engineer Motorola TCG |------------------------------------------------------------------ |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Jul 2002 15:49:49 -0700 From: Kim Helliwell Subject: Re: [IBIS-Users] FW: Extreme currents???? Frankly, I wish that suppliers of models (whether IBIS or SPICE) would stop using these "ideal" diodes that allow such large currents. I don't understand how anyone can look at such results and think that's OK to ship to customers! Maybe they just don't look, but that's hardly an acceptable excuse, either. There, I feel better now! Kim On Wednesday, July 10, 2002, at 03:19 PM, Lynne Green wrote: > Hello, Chris, > > Different EDA tools have different upper limits on currents that can be > handled > by the simulator. > > The warning is needed because "Spice" models that use the default series > resistance (0.0 ohms) for diodes and junction leakage currents result > in large > IBIS table currents (often above 1 MegAmp). Most EDA tools don't go > quite > _that_ high. > > Best regards, > Lynne > > > > -----Original Message----- > From: John Angulo [mailto:jangulo@innoveda.com] > Sent: Tuesday, July 09, 2002 6:02 PM > To: ibis-users@eda.org > Subject: [IBIS-Users] FW: Extreme currents???? > > > The following is forwarded on behalf of Chris DeWitt at Motorola TCG. > Please send all private replies to Chris.Dewitt@motorola.com. > > John Angulo > IBIS Open Forum Postmaster > ----------------------------------- > > If I run IBISCHK3 on many models I download I get an "Extreme currents > present" warning. > > What are the limits on currents in the VI tables? I can't find it > documented anywhere. > > Thanks > > Chris DeWitt > Principal Staff Engineer > Motorola TCG > |------------------------------------------------------------------ > > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > > Kim Helliwell Apple Computer kimgh@apple.com 408 974 9936 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Jul 2002 18:56:42 -0400 From: Jon Powell Subject: RE: [IBIS-Users] FW: Extreme currents???? I agree with everybody, That warning is primarily there to let you know that you have an ideal diode and not a physical one (that has some resistance and so will current limit itself). Most simulators do pretty much the right thing when the see this, though I am sure the "right thing" is slightly different in all cases. jon > -----Original Message----- > From: Muranyi, Arpad [mailto:arpad.muranyi@intel.com] > Sent: Wednesday, July 10, 2002 3:33 PM > To: ibis-users@server.eda.org > Subject: RE: [IBIS-Users] FW: Extreme currents???? > > > I don't think this is so much of an issue of how high the > tools can go as Lynne stated. A number is a number, > regardless of how high it is... (Aside from the precision > variations you run into depending on the number of bytes > used for the numbers). > > The real problem in my opinion is that if you have a diode > that does this, it will clip an overshoot, which may be > different from what a real device does, and you will see > waveforms that are incorrect. > > Arpad Muranyi > Intel Corporation > ============================================================= > > -----Original Message----- > From: Lynne Green [mailto:lgreen@cadence.com] > Sent: Wednesday, July 10, 2002 3:19 PM > To: Chris.Dewitt@motorola.com; ibis-users@eda.org > Subject: re: [IBIS-Users] FW: Extreme currents???? > > > Hello, Chris, > > Different EDA tools have different upper limits on currents > that can be > handled > by the simulator. > > The warning is needed because "Spice" models that use the > default series > resistance (0.0 ohms) for diodes and junction leakage > currents result in > large > IBIS table currents (often above 1 MegAmp). Most EDA tools > don't go quite > _that_ high. > > Best regards, > Lynne > > > > -----Original Message----- > From: John Angulo [mailto:jangulo@innoveda.com] > Sent: Tuesday, July 09, 2002 6:02 PM > To: ibis-users@eda.org > Subject: [IBIS-Users] FW: Extreme currents???? > > > The following is forwarded on behalf of Chris DeWitt at Motorola TCG. > Please send all private replies to Chris.Dewitt@motorola.com. > > John Angulo > IBIS Open Forum Postmaster > ----------------------------------- > > If I run IBISCHK3 on many models I download I get an "Extreme currents > present" warning. > > What are the limits on currents in the VI tables? I can't find it > documented anywhere. > > Thanks > > Chris DeWitt > Principal Staff Engineer > Motorola TCG > |------------------------------------------------------------------ > > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Jul 2002 16:22:51 -0700 From: Scott McMorrow Subject: Re: [IBIS-Users] FW: Extreme currents???? Kim and all, In many cases these are not ideal diodes. The IBIS spec suggests that the input voltage for model creation be swept from -Vcc to 2Vcc. It turns out that for many real devices of small geometry that the Spice simulation accurately predicts extremely high currents. The real device would have blown up in a lab, which I know that Tom Dagastino of Mentor can attest to in creating models from measurement. Spice to ibis does not allow the user to change the input voltage sweep range. These excessive voltages, especially on devices with low core voltages, will cause all sorts of problems in I/V curve extraction. The least of which is excessive currents. I have had a wonderful time with convergence issues under curve extraction, too. The solution I found was to write a bit of script code to place a limiting amplifier in the path of the voltage sweep for spice to ibis. (This was much easier than going into the spice to ibis code, finding the many offending sections and assumptions, and fixing it.) Generally one can remove the offending high current table entries from the IBIS file and perform the limiting yourself with no ill effect in the actual active region of the device. Besides, in IBIS simulators that use a universal "perfect ground" (which doesn't exist in reality) reference, the reference for the clamp diode (and output I/V curves) on the silicon is all wrong anyway. Packages and boards are much more perverse than we like to imagine. And with high enough clamping currents, the simultaneous switching input (SSI) power/ground rail bounce can be quite significant. My best advise to all, after a couple years of experience, is to never count on device clamp diodes, unless you are willing to perform some substantial Spice simulation runs, including power and ground rail package modeling ... or are prepared for some interesting surprises in the actual system. Best regards, Scott - -- Scott McMorrow Teraspeed Consulting Group LLC 2926 SE Yamhill St. Portland, OR 97214 (503) 239-5536 http://www.teraspeed.com Kim Helliwell wrote: > Frankly, I wish that suppliers of models (whether IBIS > or SPICE) would stop using these "ideal" diodes that > allow such large currents. I don't understand how anyone > can look at such results and think that's OK to ship to > customers! > > Maybe they just don't look, but that's hardly an acceptable > excuse, either. > > There, I feel better now! > > Kim > > > On Wednesday, July 10, 2002, at 03:19 PM, Lynne Green wrote: > >> Hello, Chris, >> >> Different EDA tools have different upper limits on currents that can >> be handled >> by the simulator. >> >> The warning is needed because "Spice" models that use the default series >> resistance (0.0 ohms) for diodes and junction leakage currents result >> in large >> IBIS table currents (often above 1 MegAmp). Most EDA tools don't go >> quite >> _that_ high. >> >> Best regards, >> Lynne >> >> >> >> -----Original Message----- >> From: John Angulo [mailto:jangulo@innoveda.com] >> Sent: Tuesday, July 09, 2002 6:02 PM >> To: ibis-users@eda.org >> Subject: [IBIS-Users] FW: Extreme currents???? >> >> >> The following is forwarded on behalf of Chris DeWitt at Motorola TCG. >> Please send all private replies to Chris.Dewitt@motorola.com. >> >> John Angulo >> IBIS Open Forum Postmaster >> ----------------------------------- >> >> If I run IBISCHK3 on many models I download I get an "Extreme currents >> present" warning. >> >> What are the limits on currents in the VI tables? I can't find it >> documented anywhere. >> >> Thanks >> >> Chris DeWitt >> Principal Staff Engineer >> Motorola TCG >> |------------------------------------------------------------------ >> >> |------------------------------------------------------------------ >> |For help or to subscribe/unsubscribe, email majordomo@eda.org >> |with just the appropriate command message(s) in the body: >> | >> | help >> | subscribe ibis >> | subscribe ibis-users >> | unsubscribe ibis >> | unsubscribe ibis-users >> | >> |or email a written request to ibis-request@eda.org. >> | >> |IBIS reflector archives exist under: >> | >> | http://www.eda.org/pub/ibis/email_archive/ Recent >> | http://www.eda.org/pub/ibis/users_archive/ Recent >> | http://www.eda.org/pub/ibis/email/ E-mail since 1993 >> >> > Kim Helliwell > Apple Computer > kimgh@apple.com > 408 974 9936 > > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > > |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Jul 2002 20:25:41 -0400 From: John Angulo Subject: [IBIS-Users] FW: Convergence problem The following is posted on behalf of Ambrish Varma at NC State University, Raleigh, NC. Please send all private replies to akvarma@ncsu.edu. John Angulo IBIS Open Forum Postmaster - -----Original Message----- From: "Ambrish Varma" Hi, I am trying out the s2ibis2 examples that illustrate the use of S2IBIS2 -but having convergence problems with all of the examples. Each time I am running hspice on the *.spi files(which are generated after I run S2IBIS2 on the *.s2i file), I am getting an error 'time step too small in pseudo tran., delta = xyz' 'no convergence in dc sweep curves at -3.300' I am using Hspice and doing a DC sweep from-3.3 to 6.6 . I notice that at -3.3 v, the current is shown as 1.704s+17 - which is absurd. Also, the ibs value of the mosfets is of the order of e+16. What am I doing wrong? or am I missing something crucial? Thanks for your help in advance. Ambrish Varma NC State University, Raleigh, NC. |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Jul 2002 18:28:51 -0700 From: AC Subject: Re: [IBIS-Users] FW: Extreme currents???? Hello: Although Spice may predict extremely high currents, I doubt whether they are predicted accurately. I've seen IBIS models with 1.0E25 diode currents, from big manufacturers; a quick sanity check indicates that such a diode would dissipate more power than the sun puts out! And it probably doesn't take much current to blow up a small diode, so blowing one up in the lab doesn't really prove that the high currents were accurate - I think a little more "physicality" in these models would be desireable - - AC Scott McMorrow wrote: > > Kim and all, > > In many cases these are not ideal diodes. The IBIS spec suggests that > the input voltage for model creation be swept from -Vcc to 2Vcc. It > turns out that for many real devices of small geometry that the Spice > simulation accurately predicts extremely high currents. The real device > would have blown up in a lab, which I know that Tom Dagastino of Mentor > can attest to in creating models from measurement. > > Spice to ibis does not allow the user to change the input voltage sweep > range. These excessive voltages, especially on devices with low core > voltages, will cause all sorts of problems in I/V curve extraction. The > least of which is excessive currents. I have had a wonderful time with > convergence issues under curve extraction, too. The solution I found > was to write a bit of script code to place a limiting amplifier in the > path of the voltage sweep for spice to ibis. (This was much easier than > going into the spice to ibis code, finding the many offending sections > and assumptions, and fixing it.) > > Generally one can remove the offending high current table entries from > the IBIS file and perform the limiting yourself with no ill effect in > the actual active region of the device. > > Besides, in IBIS simulators that use a universal "perfect ground" (which > doesn't exist in reality) reference, the reference for the clamp diode > (and output I/V curves) on the silicon is all wrong anyway. Packages > and boards are much more perverse than we like to imagine. And with > high enough clamping currents, the simultaneous switching input (SSI) > power/ground rail bounce can be quite significant. > > My best advise to all, after a couple years of experience, is to never > count on device clamp diodes, unless you are willing to perform some > substantial Spice simulation runs, including power and ground rail > package modeling ... or are prepared for some interesting surprises in > the actual system. > > Best regards, > > Scott > > -- > Scott McMorrow > Teraspeed Consulting Group LLC > 2926 SE Yamhill St. > Portland, OR 97214 > (503) 239-5536 > http://www.teraspeed.com > > Kim Helliwell wrote: > > > Frankly, I wish that suppliers of models (whether IBIS > > or SPICE) would stop using these "ideal" diodes that > > allow such large currents. I don't understand how anyone > > can look at such results and think that's OK to ship to > > customers! > > > > Maybe they just don't look, but that's hardly an acceptable > > excuse, either. > > > > There, I feel better now! > > > > Kim > > > > > > On Wednesday, July 10, 2002, at 03:19 PM, Lynne Green wrote: > > > >> Hello, Chris, > >> > >> Different EDA tools have different upper limits on currents that can > >> be handled > >> by the simulator. > >> > >> The warning is needed because "Spice" models that use the default series > >> resistance (0.0 ohms) for diodes and junction leakage currents result > >> in large > >> IBIS table currents (often above 1 MegAmp). Most EDA tools don't go > >> quite > >> _that_ high. > >> > >> Best regards, > >> Lynne > >> > >> > >> > >> -----Original Message----- > >> From: John Angulo [mailto:jangulo@innoveda.com] > >> Sent: Tuesday, July 09, 2002 6:02 PM > >> To: ibis-users@eda.org > >> Subject: [IBIS-Users] FW: Extreme currents???? > >> > >> > >> The following is forwarded on behalf of Chris DeWitt at Motorola TCG. > >> Please send all private replies to Chris.Dewitt@motorola.com. > >> > >> John Angulo > >> IBIS Open Forum Postmaster > >> ----------------------------------- > >> > >> If I run IBISCHK3 on many models I download I get an "Extreme currents > >> present" warning. > >> > >> What are the limits on currents in the VI tables? I can't find it > >> documented anywhere. > >> > >> Thanks > >> > >> Chris DeWitt > >> Principal Staff Engineer > >> Motorola TCG > >> |------------------------------------------------------------------ > >> > >> |------------------------------------------------------------------ > >> |For help or to subscribe/unsubscribe, email majordomo@eda.org > >> |with just the appropriate command message(s) in the body: > >> | > >> | help > >> | subscribe ibis > >> | subscribe ibis-users > >> | unsubscribe ibis > >> | unsubscribe ibis-users > >> | > >> |or email a written request to ibis-request@eda.org. > >> | > >> |IBIS reflector archives exist under: > >> | > >> | http://www.eda.org/pub/ibis/email_archive/ Recent > >> | http://www.eda.org/pub/ibis/users_archive/ Recent > >> | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > >> > >> > > Kim Helliwell > > Apple Computer > > kimgh@apple.com > > 408 974 9936 > > > > |------------------------------------------------------------------ > > |For help or to subscribe/unsubscribe, email majordomo@eda.org > > |with just the appropriate command message(s) in the body: > > | > > | help > > | subscribe ibis > > | subscribe ibis-users > > | unsubscribe ibis > > | unsubscribe ibis-users > > | > > |or email a written request to ibis-request@eda.org. > > | > > |IBIS reflector archives exist under: > > | > > | http://www.eda.org/pub/ibis/email_archive/ Recent > > | http://www.eda.org/pub/ibis/users_archive/ Recent > > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > > > > > > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Jul 2002 19:06:24 -0700 From: Scott McMorrow Subject: [IBIS-Users] diode modeling in ibis vs other modeling issues All, About once every 3 months someone comes up and complains that in many spice decks the clamp diodes are not correctly modeled. At that point, others jump onto the pile and add their comments which generally amount to "how could anyone put out such an obiviously bad model? Look, even the ibis checker can find it." The sad truth is that about 70% of all IBIS models available on the web have serious flaws and about half of those are so serious as to render the models worthless. However, this is not the total story. Those are the models which could be checked by the ibis checker and validated as having errors. IBIS models suffer from an extreme flaw in the modeling of packages. There is only one method to model package coupling. No one that I know of has created a model that uses it. 95% or more of all IBIS models have fatal flaws in the modeling of the package. Many are only a guess and not supported by any measurement or simulation data whatsoever. Unfortunately, no "checker" in the world can check whether a package has been correctly modeled. We in the signal integrity world go to great lengths to characterize the crosstalk and coupling that occurs on a printed circuit board. Yet no one stands up to complain that there is virtually no data on this available within the ibis model, and the package has the greatest routing density of any object in an electronic system (except for the silicon itself ... which is yet another issue.) Those of us that have looked at this extensively have concluded that the greatest single impediment to good signal integrity on a board is, in fact, the package. Trust me, there is a legacy of failed designs out there where the package is the culprit. Designs fail because they were simulated with IBIS simulators, using a perfect ground reference and flawed package modeling. The modeling of clamp diodes is the least of your concerns ... but it is an easy target. regards, Scott - -- Scott McMorrow Teraspeed Consulting Group LLC 2926 SE Yamhill St. Portland, OR 97214 (503) 239-5536 http://www.teraspeed.com |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Jul 2002 19:28:49 -0700 (PDT) From: whiz kid Subject: [IBIS-Users] IBIS model Question. Hi Folks, I am running some simulations on a interface whose swing is 800mv. when I simulate the wave forms that I get have a swing from -400 mv to 400mv which obviously is not correct. I was wondering as to what might be the source of the problem in the IBIS models. 2) The other question is pertaining to the IBIS model convention. The signs for the current values in power and gnd clamps. I see that the current values for the Pwr clamp is positive and negative for gnd clamp. does it mean that pwr clamp sources current and sinking current for gnd clamp. I would be really thankful if you folks can provide any insight. Thanks, Rahul. __________________________________________________ Do You Yahoo!? Sign up for SBC Yahoo! Dial - First Month Free http://sbc.yahoo.com |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 11 Jul 2002 13:59:50 -0400 From: "Ingraham, Andrew" Subject: RE: [IBIS-Users] IBIS model Question. > I am running some simulations on a interface whose > swing is 800mv. when I simulate the wave forms that I > get have a swing from -400 mv to 400mv which obviously > is not correct. Why is it not correct? It sounds like the swing is what it's supposed to be. I'll guess that what you find wrong about it, is that the signal is symmetrical around 0V. > I was wondering as to what might be > the source of the problem in the IBIS models. Is there an AC coupling capacitor anywhere in your circuit? All SPICE-like simulators give misleading (but correct) initial results when doing TRANsient analysis of digital circuits with AC coupling capacitors. What the simulator simulated, is that the signal was inactive (at its t=0 state) for all negative time, then it suddenly starts switching. Thus, the charge across the capacitor might be different after a very long time of normal switching. If that is the case here, there is probably nothing wrong with your IBIS models. You can correct this by controlling the initial conditions, or by running the simulation for a very long time until the bias voltage across the capacitor can re-establish itself. > 2) The other question is pertaining to the IBIS model > convention. The signs for the current values in power > and gnd clamps. I see that the current values for the > Pwr clamp is positive and negative for gnd clamp. does > it mean that pwr clamp sources current and sinking > current for gnd clamp. IBIS current is positive when the direction is into the component. This is the standard in electrical engineering. When the applied voltage goes below Vss, the GND Clamp conducts and current flows out of the component, so the polarity of this current is negative. The GND Clamp sources current to the external circuit. When the applied voltage goes above Vdd, the POWER Clamp conducts and current flows into the component, so the polarity of this current is positive. The POWER Clamp sinks current from the external circuit. Regards, Andy |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 11 Jul 2002 13:52:12 -0400 From: "Hassan Ali" Subject: [IBIS-Users] Looking for an IBIS model This is a multi-part message in MIME format. - ------_=_NextPart_001_01C22903.AF8FF039 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi All, =20 Does anyone happen to have the IBIS model for Pericom PI74FCT2253CTW 4-to-1 Multiplexer? The link to Pericom Semiconductor (http://www.pericom.com) seems to be dead. =20 Thanks. =20 Hassan. =20 Hassan Ali, Ph.D. =20 Signal Integrity Specialist - Talented, innovative designers Fidus Systems Inc. - Highly competitive rates Tel: (613) 828-0063 Ext.342 - Fixed-price business model Fax: (613) 828-3113 - State-of-the-art design tools http://www.fidus.ca - Customer-friendly attitude =20 - ------_=_NextPart_001_01C22903.AF8FF039 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hi All,

 

Does anyone happen to have the IBIS model for Pericom PI74FCT2253CTW 4-to-1 Multiplexer? The link to Pericom Semiconductor (http://www.pericom.com) seems to be dead.

 

Thanks.

 

Hassan.

 

Hassan Ali, Ph.D.           &n= bsp; 

Signal Integrity = Specialist        - Talented, = innovative designers

Fidus Systems = Inc.           &nb= sp;     - Highly competitive rates

Tel: (613) 828-0063 Ext.342     - = Fixed-price business model

Fax: (613) = 828-3113           = ;     - State-of-the-art design tools

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=00 - ------_=_NextPart_001_01C22903.AF8FF039-- |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 11 Jul 2002 12:59:07 -0600 From: dbcox Subject: RE: [IBIS-Users] FW: Extreme currents???? Well it looks like everyone has put in their 2 cents worth on this subject. For what it is worth I loved the model that had 900 AMPS at -3.3V. It was my favorite. Aside from all the other obvious comments that have been made How wide would the trace on the PCB have to be to carry this type of load? Would this device be classified as a fuseable lead frame? It is obvious that model makers could do a better job in QA'ing their data. There is something to be said also about ibis itself here. If the specification allows unrealistic data to be acceptable then model makers will continue to provide it. Perhaps extremely high currents should be changed to an error instead of a warning. This would force correction to this issue at the source. Couldn't resist commenting on this issue it is one of my favorites........BC - -----Original Message----- From: Kim Helliwell [mailto:kimgh@apple.com] Sent: Wednesday, July 10, 2002 4:50 PM To: Lynne Green Cc: Chris.Dewitt@motorola.com; ibis-users@eda.org Subject: Re: [IBIS-Users] FW: Extreme currents???? Frankly, I wish that suppliers of models (whether IBIS or SPICE) would stop using these "ideal" diodes that allow such large currents. I don't understand how anyone can look at such results and think that's OK to ship to customers! Maybe they just don't look, but that's hardly an acceptable excuse, either. There, I feel better now! Kim On Wednesday, July 10, 2002, at 03:19 PM, Lynne Green wrote: > Hello, Chris, > > Different EDA tools have different upper limits on currents that can be > handled > by the simulator. > > The warning is needed because "Spice" models that use the default series > resistance (0.0 ohms) for diodes and junction leakage currents result > in large > IBIS table currents (often above 1 MegAmp). Most EDA tools don't go > quite > _that_ high. > > Best regards, > Lynne > > > > -----Original Message----- > From: John Angulo [mailto:jangulo@innoveda.com] > Sent: Tuesday, July 09, 2002 6:02 PM > To: ibis-users@eda.org > Subject: [IBIS-Users] FW: Extreme currents???? > > > The following is forwarded on behalf of Chris DeWitt at Motorola TCG. > Please send all private replies to Chris.Dewitt@motorola.com. > > John Angulo > IBIS Open Forum Postmaster > ----------------------------------- > > If I run IBISCHK3 on many models I download I get an "Extreme currents > present" warning. > > What are the limits on currents in the VI tables? I can't find it > documented anywhere. > > Thanks > > Chris DeWitt > Principal Staff Engineer > Motorola TCG > |------------------------------------------------------------------ > > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > > Kim Helliwell Apple Computer kimgh@apple.com 408 974 9936 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 11 Jul 2002 13:14:43 -0700 From: "Dagostino, Tom" Subject: RE: [IBIS-Users] FW: Extreme currents???? We've made models from measurements and from SPICE. When doing measurement based models we try, note, try to turn on the protection devices to at least 1.2 volts. Most part can handle this and most will have less than 1 Ampere at this voltage. We have seen some that will turn on at very low voltages, around 0.4 to 0.5 V. These parts have almost a zero resistance and the currents can exceed 1 amp with just 100 mV of forward voltage past the knee. I would expect these parts to easily get to 100 or more Amperes by the time -Vdd was reached given the slope at low voltages. For SPICE based modeling we have been told by some of our customers that the "excess currents" we see in the simulations are real and please don't "fix" it. In other cases the diode model is just not complete thus causing over 10^9 Amperes to appear in the model. So I agree with Scott McMorrow that you cannot just say, "Oh, that is wrong" by looking at the currents in the model. Given that the maximum current you would expect to see in a signal trace on a PCB is 100 mA (5 Volts/50 Ohms), the simulations will probably not see the high current areas of the model. This is not to say that some simulators will not like the model at all. And yes, I did accidentally forward bias a diode once with 5 Volts, the smell of burning plastic was awful and immediate. Tom Dagostino Modeling Manager Mentor Graphics Corp. SAS tom_dagostino@mentor.com 503-685-1613 - -----Original Message----- From: dbcox [mailto:dbcox@micron.com] Sent: Thursday, July 11, 2002 11:59 AM To: 'Kim Helliwell'; Lynne Green Cc: Chris.Dewitt@motorola.com; ibis-users@server.eda.org Subject: RE: [IBIS-Users] FW: Extreme currents???? Well it looks like everyone has put in their 2 cents worth on this subject. For what it is worth I loved the model that had 900 AMPS at -3.3V. It was my favorite. Aside from all the other obvious comments that have been made How wide would the trace on the PCB have to be to carry this type of load? Would this device be classified as a fuseable lead frame? It is obvious that model makers could do a better job in QA'ing their data. There is something to be said also about ibis itself here. If the specification allows unrealistic data to be acceptable then model makers will continue to provide it. Perhaps extremely high currents should be changed to an error instead of a warning. This would force correction to this issue at the source. Couldn't resist commenting on this issue it is one of my favorites........BC - -----Original Message----- From: Kim Helliwell [mailto:kimgh@apple.com] Sent: Wednesday, July 10, 2002 4:50 PM To: Lynne Green Cc: Chris.Dewitt@motorola.com; ibis-users@eda.org Subject: Re: [IBIS-Users] FW: Extreme currents???? Frankly, I wish that suppliers of models (whether IBIS or SPICE) would stop using these "ideal" diodes that allow such large currents. I don't understand how anyone can look at such results and think that's OK to ship to customers! Maybe they just don't look, but that's hardly an acceptable excuse, either. There, I feel better now! Kim On Wednesday, July 10, 2002, at 03:19 PM, Lynne Green wrote: > Hello, Chris, > > Different EDA tools have different upper limits on currents that can be > handled > by the simulator. > > The warning is needed because "Spice" models that use the default series > resistance (0.0 ohms) for diodes and junction leakage currents result > in large > IBIS table currents (often above 1 MegAmp). Most EDA tools don't go > quite > _that_ high. > > Best regards, > Lynne > > > > -----Original Message----- > From: John Angulo [mailto:jangulo@innoveda.com] > Sent: Tuesday, July 09, 2002 6:02 PM > To: ibis-users@eda.org > Subject: [IBIS-Users] FW: Extreme currents???? > > > The following is forwarded on behalf of Chris DeWitt at Motorola TCG. > Please send all private replies to Chris.Dewitt@motorola.com. > > John Angulo > IBIS Open Forum Postmaster > ----------------------------------- > > If I run IBISCHK3 on many models I download I get an "Extreme currents > present" warning. > > What are the limits on currents in the VI tables? I can't find it > documented anywhere. > > Thanks > > Chris DeWitt > Principal Staff Engineer > Motorola TCG > |------------------------------------------------------------------ > > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > > Kim Helliwell Apple Computer kimgh@apple.com 408 974 9936 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 11 Jul 2002 17:15:13 -0400 From: "Ingraham, Andrew" Subject: RE: [IBIS-Users] FW: Extreme currents???? > For what it is worth I loved the model that had 900 AMPS at -3.3V. 900 amps ain't so bad, is it? It's not nearly as unrealistic as 1e25 amps. Do you think that 900 amps is the wrong number? > How wide would the trace on the PCB have to be to carry this type of load? ... > It is obvious that > model makers could do a better job in QA'ing their data. ... > Perhaps > extremely high currents should be changed to an error instead of a warning. > This would force correction to this issue at the source. Folks, don't forget, these values in the models are supposed to accurately represent the characteristics of the device; they are NOT supposed to describe how you USE the device. I would hope no normal user ever actually applies -3.3V with no current limiting to it. If you did, you deserve the puff of smoke you get. Just because a short wire is capable of momentarily carrying 20,000 amps when you put 5 volts across it, doesn't mean that you can or should actually use it that way. Or that you can only connect them to enormously wide board traces. Nor does it mean that you need to model every darn wire as a 10 ohm resistor just to make sure the simulator can't possibly see that it's capable of 20,000 amps. If the SPICE model is correct (no unrealistic Rs=0 diodes, nothing omitted, etc.) and it says 900 amps at -3.3V, then I claim the data isn't unrealistic at all. It's just that the part can't support it for long without vaporizing. But that's another issue entirely. If measurements show that you can get huge currents before the part blows up, then that data isn't unrealistic either. Part of the purpose of having IBIS data that extends from -Vcc to +2*Vcc, is to make sure the simulator can't possibly "fall off" the end of the I-V table to where there is no more data, which may give it nothing to force it back to normal voltages! It's not uncommon for a circuit simulator to momentarily try outlandish voltages. It just doesn't converge there. But it needs some data there, to tell it which way to go. If the I-V data says only 300mA, because the IBIS model creator doctored it, thinking that anything more than that was abnormal, then the simulator may not have what it needs to nudge it back to where it belongs. Worse, it might even falsely converge there. We've been using SPICE models for ages. The SPICE model for my 1K resistor says that it would conduct 1000 amps if I put a million volts across it. Guess what? It's right. (A real resistor just won't do it for long without blowing up.) The SPICE model for my diode or transistor says that it would conduct 1000 amps if I put 5V across it. Guess what? It's right too. The only thing that makes IBIS models different, is that IBIS lists these big currents in a table where you can see them. SPICE puts them in equations, where we can't examine them as easily to discover that, by golly, there might be some Really Big Currents if you apply unusual voltages. > There is something > to > be said also about ibis itself here. If the specification allows unrealistic > data to be acceptable then model makers will continue to provide it. So should we condemn SPICE too because it uses equations ... which give you even bigger currents than the IBIS models do (because you can stress the SPICE model well beyond -Vcc to +2Vcc)? Finally, don't forget that those ideal wires we use all the time in our simulations, would have infinite current if you put a voltage source across them. The morale is just that you don't go putting voltage sources across them. But those little 0.1 inch long ideal wires really don't hurt our simulations, simply by being capable of such enormous currents. Regards, Andy |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 11 Jul 2002 18:01:40 -0700 From: "Mohan, Prabhu" Subject: RE: [IBIS-Users] FW: Extreme currents???? Hi all, I've come across a few kilo Amps(!) in the -3.3V region while generating IBIS models. In all the cases the reason was the clamp-diodes (with zero R). Here is what I do. For all the transistors that are directly connected to the PAD, I just stick a resistor (say 5ohms) between substrate and ground (or power). This brings the current down to "reasonable" levels. Once some silicon measurements are done I just tune the resistors that I inserted. Please tell me if there is anything wrong with the above method. Ofcourse, this means sifting through the spice netlist but it has worked quite well so far. Prabhu/~ - -----Original Message----- From: dbcox [mailto:dbcox@micron.com] Sent: Thursday, July 11, 2002 11:59 AM To: 'Kim Helliwell'; Lynne Green Cc: Chris.Dewitt@motorola.com; ibis-users@eda.org Subject: RE: [IBIS-Users] FW: Extreme currents???? Well it looks like everyone has put in their 2 cents worth on this subject. For what it is worth I loved the model that had 900 AMPS at -3.3V. It was my favorite. Aside from all the other obvious comments that have been made How wide would the trace on the PCB have to be to carry this type of load? Would this device be classified as a fuseable lead frame? It is obvious that model makers could do a better job in QA'ing their data. There is something to be said also about ibis itself here. If the specification allows unrealistic data to be acceptable then model makers will continue to provide it. Perhaps extremely high currents should be changed to an error instead of a warning. This would force correction to this issue at the source. Couldn't resist commenting on this issue it is one of my favorites........BC - -----Original Message----- From: Kim Helliwell [mailto:kimgh@apple.com] Sent: Wednesday, July 10, 2002 4:50 PM To: Lynne Green Cc: Chris.Dewitt@motorola.com; ibis-users@eda.org Subject: Re: [IBIS-Users] FW: Extreme currents???? Frankly, I wish that suppliers of models (whether IBIS or SPICE) would stop using these "ideal" diodes that allow such large currents. I don't understand how anyone can look at such results and think that's OK to ship to customers! Maybe they just don't look, but that's hardly an acceptable excuse, either. There, I feel better now! Kim On Wednesday, July 10, 2002, at 03:19 PM, Lynne Green wrote: > Hello, Chris, > > Different EDA tools have different upper limits on currents that can be > handled > by the simulator. > > The warning is needed because "Spice" models that use the default series > resistance (0.0 ohms) for diodes and junction leakage currents result > in large > IBIS table currents (often above 1 MegAmp). Most EDA tools don't go > quite > _that_ high. > > Best regards, > Lynne > > > > -----Original Message----- > From: John Angulo [mailto:jangulo@innoveda.com] > Sent: Tuesday, July 09, 2002 6:02 PM > To: ibis-users@eda.org > Subject: [IBIS-Users] FW: Extreme currents???? > > > The following is forwarded on behalf of Chris DeWitt at Motorola TCG. > Please send all private replies to Chris.Dewitt@motorola.com. > > John Angulo > IBIS Open Forum Postmaster > ----------------------------------- > > If I run IBISCHK3 on many models I download I get an "Extreme currents > present" warning. > > What are the limits on currents in the VI tables? I can't find it > documented anywhere. > > Thanks > > Chris DeWitt > Principal Staff Engineer > Motorola TCG > |------------------------------------------------------------------ > > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > > Kim Helliwell Apple Computer kimgh@apple.com 408 974 9936 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 11 Jul 2002 19:13:07 -0700 (PDT) From: whiz kid Subject: RE: [IBIS-Users] IBIS model Question. Hi Andy, Thanks for the reply. In my case there is no AC coupling capacitor. Its a point to point topology. I simulated this with two different tools and I got the same result. Rahul. - --- "Ingraham, Andrew" wrote: > > I am running some simulations on a interface whose > > swing is 800mv. when I simulate the wave forms > that I > > get have a swing from -400 mv to 400mv which > obviously > > is not correct. > > Why is it not correct? It sounds like the swing is > what it's supposed to be. > > I'll guess that what you find wrong about it, is > that the signal is symmetrical around 0V. > > > I was wondering as to what might be > > the source of the problem in the IBIS models. > > Is there an AC coupling capacitor anywhere in your > circuit? All SPICE-like simulators give misleading > (but correct) initial results when doing TRANsient > analysis of digital circuits with AC coupling > capacitors. What the simulator simulated, is that > the signal was inactive (at its t=0 state) for all > negative time, then it suddenly starts switching. > Thus, the charge across the capacitor might be > different after a very long time of normal > switching. > > If that is the case here, there is probably nothing > wrong with your IBIS models. You can correct this > by controlling the initial conditions, or by running > the simulation for a very long time until the bias > voltage across the capacitor can re-establish > itself. > > > > 2) The other question is pertaining to the IBIS > model > > convention. The signs for the current values in > power > > and gnd clamps. I see that the current values for > the > > Pwr clamp is positive and negative for gnd clamp. > does > > it mean that pwr clamp sources current and sinking > > current for gnd clamp. > > IBIS current is positive when the direction is into > the component. This is the standard in electrical > engineering. > > When the applied voltage goes below Vss, the GND > Clamp conducts and current flows out of the > component, so the polarity of this current is > negative. The GND Clamp sources current to the > external circuit. > > When the applied voltage goes above Vdd, the POWER > Clamp conducts and current flows into the component, > so the polarity of this current is positive. The > POWER Clamp sinks current from the external circuit. > > Regards, > Andy > > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email > majordomo@eda.org > |with just the appropriate command message(s) in the > body: > | > | help > | subscribe ibis if different> > | subscribe ibis-users if different> > | unsubscribe ibis if different> > | unsubscribe ibis-users if different> > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ > Recent > | http://www.eda.org/pub/ibis/users_archive/ > Recent > | http://www.eda.org/pub/ibis/email/ > E-mail since 1993 __________________________________________________ Do You Yahoo!? Sign up for SBC Yahoo! Dial - First Month Free http://sbc.yahoo.com |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 12 Jul 2002 08:11:17 -0700 From: "Muranyi, Arpad" Subject: RE: [IBIS-Users] FW: Extreme currents???? Parabhu, Your solutions is close but not quite perfect... The problem is that if you put a resistor between the source and GND, you actually alter the channel currents also, which usually are fairly accurate. What you should do instead is connect the resistor between the substrate and GND. This would only limit the diode currents but would not effect the channel currents. The problem is that not all SPICE tools have or give access to the fourth node of the transistor, so you may not be able to do this with every tool. An then there are other higher order effects which involve the currents and voltages of the substrate which may get effected by this additional resistance, but these may be negligible in terms of making IBIS models. Arpad Muranyi Intel Corporation ================================================================ - -----Original Message----- From: Mohan, Prabhu [mailto:Prabhu.Mohan@actel.com] Sent: Thursday, July 11, 2002 6:02 PM To: 'dbcox'; 'Kim Helliwell' Cc: ibis-users@eda.org Subject: RE: [IBIS-Users] FW: Extreme currents???? Hi all, I've come across a few kilo Amps(!) in the -3.3V region while generating IBIS models. In all the cases the reason was the clamp-diodes (with zero R). Here is what I do. For all the transistors that are directly connected to the PAD, I just stick a resistor (say 5ohms) between substrate and ground (or power). This brings the current down to "reasonable" levels. Once some silicon measurements are done I just tune the resistors that I inserted. Please tell me if there is anything wrong with the above method. Ofcourse, this means sifting through the spice netlist but it has worked quite well so far. Prabhu/~ |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 12 Jul 2002 10:19:16 -0700 From: "Mohan, Prabhu" Subject: RE: [IBIS-Users] FW: Extreme currents???? Hi Arpad, I did say between 'substrate' and 'ground'. But its good to know I'm not too far off. Thanks Prabhu - -----Original Message----- From: Muranyi, Arpad [mailto:arpad.muranyi@intel.com] Sent: Friday, July 12, 2002 8:11 AM To: ibis-users@eda.org Subject: RE: [IBIS-Users] FW: Extreme currents???? Parabhu, Your solutions is close but not quite perfect... The problem is that if you put a resistor between the source and GND, you actually alter the channel currents also, which usually are fairly accurate. What you should do instead is connect the resistor between the substrate and GND. This would only limit the diode currents but would not effect the channel currents. The problem is that not all SPICE tools have or give access to the fourth node of the transistor, so you may not be able to do this with every tool. An then there are other higher order effects which involve the currents and voltages of the substrate which may get effected by this additional resistance, but these may be negligible in terms of making IBIS models. Arpad Muranyi Intel Corporation ================================================================ - -----Original Message----- From: Mohan, Prabhu [mailto:Prabhu.Mohan@actel.com] Sent: Thursday, July 11, 2002 6:02 PM To: 'dbcox'; 'Kim Helliwell' Cc: ibis-users@eda.org Subject: RE: [IBIS-Users] FW: Extreme currents???? Hi all, I've come across a few kilo Amps(!) in the -3.3V region while generating IBIS models. In all the cases the reason was the clamp-diodes (with zero R). Here is what I do. For all the transistors that are directly connected to the PAD, I just stick a resistor (say 5ohms) between substrate and ground (or power). This brings the current down to "reasonable" levels. Once some silicon measurements are done I just tune the resistors that I inserted. Please tell me if there is anything wrong with the above method. Ofcourse, this means sifting through the spice netlist but it has worked quite well so far. Prabhu/~ |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 12 Jul 2002 10:56:33 -0700 From: "Muranyi, Arpad" Subject: RE: [IBIS-Users] FW: Extreme currents???? Sorry, I misread your words... Arpad ============================== - -----Original Message----- From: Mohan, Prabhu [mailto:Prabhu.Mohan@actel.com] Sent: Friday, July 12, 2002 10:19 AM To: 'Muranyi, Arpad' Cc: 'ibis-users@eda.org' Subject: RE: [IBIS-Users] FW: Extreme currents???? Hi Arpad, I did say between 'substrate' and 'ground'. But its good to know I'm not too far off. Thanks Prabhu - -----Original Message----- From: Muranyi, Arpad [mailto:arpad.muranyi@intel.com] Sent: Friday, July 12, 2002 8:11 AM To: ibis-users@eda.org Subject: RE: [IBIS-Users] FW: Extreme currents???? Parabhu, Your solutions is close but not quite perfect... The problem is that if you put a resistor between the source and GND, you actually alter the channel currents also, which usually are fairly accurate. What you should do instead is connect the resistor between the substrate and GND. This would only limit the diode currents but would not effect the channel currents. The problem is that not all SPICE tools have or give access to the fourth node of the transistor, so you may not be able to do this with every tool. An then there are other higher order effects which involve the currents and voltages of the substrate which may get effected by this additional resistance, but these may be negligible in terms of making IBIS models. Arpad Muranyi Intel Corporation ================================================================ - -----Original Message----- From: Mohan, Prabhu [mailto:Prabhu.Mohan@actel.com] Sent: Thursday, July 11, 2002 6:02 PM To: 'dbcox'; 'Kim Helliwell' Cc: ibis-users@eda.org Subject: RE: [IBIS-Users] FW: Extreme currents???? Hi all, I've come across a few kilo Amps(!) in the -3.3V region while generating IBIS models. In all the cases the reason was the clamp-diodes (with zero R). Here is what I do. For all the transistors that are directly connected to the PAD, I just stick a resistor (say 5ohms) between substrate and ground (or power). This brings the current down to "reasonable" levels. Once some silicon measurements are done I just tune the resistors that I inserted. Please tell me if there is anything wrong with the above method. Ofcourse, this means sifting through the spice netlist but it has worked quite well so far. Prabhu/~ |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 15 Jul 2002 18:41:58 -0700 From: "Ross, Bob" Subject: [IBIS-Users] IBISCHK3.2.9 Executables To All: Executables for an upgraded ibischk3.2.9 have been uploaded under the ibischk3 links or http://www.eda.org/pub/ibis/ibischk3/ The Linux executable is expected to be uploaded when available. This release contains fixes to BUGS57 - BUG67 according to: http://www.eda.org/pub/ibis/bugs/ibischk/bugdir.txt and http://www.eda.org/pub/ibis/bugs/ibischk/ Bob Ross Mentor Graphics |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 18 Jul 2002 08:37:57 -0500 From: Steven_McKinney@Dell.com Subject: [IBIS-Users] Searching for a JEDEC Specification IBIS Model for DDR I'm trying to find an IBIS model that covers the complete spectrum of the JEDEC specification for DDR memory. Individual companies have thier own models but this limits a design to a specific memory product. To be more versitile, wouldn't it be great if there was a model out there that was generic and covered the whole specification?? Before I went and created my own, I just wanted to know if any one in the group might have access to one. Regards, Steven McKinney Signal Integrity Engineering Group Dell Computer Corp. Steven_McKinney@Dell.com 512.728.7359 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 19 Jul 2002 10:42:10 -0700 (PDT) From: "Peters, Stephen" Subject: [IBIS-Users] Date: Fri, 19 Jul 2002 10:40:37 -0700 Greetings: Below is BIRD 76.1, as voted on at todays IBIS Open Forum teleconference meeting. Regards, Stephen Peters Intel Corp. Chair, EIA/IBIS Open Forum **************************************************************************** **************************************************************************** BIRD ID#: 76.1 ISSUE TITLE: Additional Information Related to C_comp Refinements REQUESTER: Arpad Muranyi and Stephen Peters, Intel Corp. DATE SUBMITTED: June 28, 2002, July 19,2002 DATE ACCEPTED BY IBIS OPEN FORUM: July 19, 2002 **************************************************************************** **************************************************************************** STATEMENT OF THE ISSUE: During the review of IBIS 4.0, several documentation issues were raised with the original BIRD 65.2. Important information was only documented in the "Statement of the issue", "Statement of the resolved specifications" and "Analysis data/path that led to specification" sections of the BIRD. Specifically, there was no text added to the specification that described how the additional distributed capacitances created by BIRD65 were to be applied to the prototype simulation model. In addition, some of the usage rules did not distinguish between use of a subparameter and use of its value. Therefore, this BIRD is proposed. This new version contains only editorial changes and additions to the current text. Changes are indicated by "****" at the beginning of the changed lines. **************************************************************************** STATEMENT OF THE RESOLVED SPECIFICATIONS: Four new subparameters shall be introduced in the IBIS specification under the [Model] keyword to provide means for a more detailed description for the die capacitance. These new subparameters, C_comp_pullup, C_comp_pulldown, C_comp_power, and C_comp_gnd are associated with the corresponding voltage reference keywords, [Pullup Reference], [Pulldown Reference], [Power Clamp Reference], and [GND Clamp Reference], respectively. This mechanism allows the association of a specific capacitance between the I/O node and the four possible supply nodes without disturbing the submodel syntax. The syntax of these four new subparameters are identical to the existing C_comp subparameter. |=========================================================================== | Keyword: [Model] | Required: Yes. | Description: Used to define a model, and its attributes. | Sub-Params: Model_type, Polarity, Enable, Vinl, Vinh, C_comp, | C_comp_pullup, C_comp_pulldown, C_comp_power_clamp, | C_comp_gnd_clamp, Vmeas, Cref, Rref, Vref | Usage Rules: Each model type must begin with the keyword [Model]. The | model name must match the one that is listed under a [Pin], | [Model Selector] or [Series Pin Mapping] keyword and must | not contain more than 20 characters. A .ibs file must | contain enough [Model] keywords to cover all of the model | names specified under the [Pin], [Model Selector] and [Series | Pin Mapping] keywords, except for those model names that use | reserved words (POWER, GND and NC). | | Model_type must be one of the following: | | Input, Output, I/O, 3-state, Open_drain, I/O_open_drain, | Open_sink, I/O_open_sink, Open_source, I/O_open_source, | Input_ECL, Output_ECL, I/O_ECL, 3-state_ECL, Terminator, | Series, and Series_switch. | | Special usage rules apply to the following. Some | definitions are included for clarification: | | Input These model types must have Vinl and Vinh | I/O defined. If they are not defined, the | I/O_open_drain parser issues a warning and the default | I/O_open_sink values of Vinl = 0.8 V and Vinh = 2.0 V | I/O_open_source are assumed. | | Input_ECL These model types must have Vinl and Vinh | I/O_ECL defined. If they are not defined, the | parser issues a warning and the default | values of Vinl = -1.475 V and Vinh = | -1.165 V are assumed. | | Terminator This model type is an input-only model | that can have analog loading effects on the | circuit being simulated but has no digital | logic thresholds. Examples of Terminators | are: capacitors, termination diodes, and | pullup resistors. | | Output This model type indicates that an output | always sources and/or sinks current and | cannot be disabled. | | 3-state This model type indicates that an output | can be disabled, i.e. put into a high | impedance state. | | Open_sink These model types indicate that the output | Open_drain has an OPEN side (do not use the [Pullup] | keyword, or if it must be used, set I = | 0 mA for all voltages specified) and the | output SINKS current. Open_drain model | type is retained for backward | compatibility. | | Open_source This model type indicates that the output | has an OPEN side (do not use the [Pulldown] | keyword, or if it must be used, set I = | 0 mA for all voltages specified) and the | output SOURCES current. | | Input_ECL These model types specify that the model | Output_ECL represents an ECL type logic that follows | I/O_ECL different conventions for the [Pulldown] | 3-state_ECL keyword. | | Series This model type is for series models that | can be described by [R Series], [L Series], | [Rl Series], [C Series], [Lc Series], | [Rc Series], [Series Current] and [Series | MOSFET] keywords | | Series_switch This model type is for series switch | models that can be described by [On], | [Off], [R Series], [L Series], [Rl Series], | [C Series], [Lc Series], [Rc Series], | [Series Current] and [Series MOSFET] | keywords | | The Model_type subparameter is required. | | The C_comp subparameter is required only when C_comp_pullup, | C_comp_pulldown, C_comp_power_clamp, and C_comp_gnd_clamp are | not present. If the C_comp subparameter is not present, at | least one of the C_comp_pullup, C_comp_pulldown, | C_comp_power_clamp, or C_comp_gnd_clamp subparameters is | required. It is not illegal to include the C_comp subparameter | together with one or more of the remaining C_comp* |* subparameters, but in that case the EDA tool will have to | make a decision whether to use C_comp or the C_comp_pullup, | C_comp_pulldown, C_comp_power_clamp, and C_comp_gnd_clamp |* subparameters. Under no circumstances should the EDA tool use | the value of C_comp simultaneously with the values of other | C_comp* subparameters. | | C_comp_pullup, C_comp_pulldown, C_comp_power_clamp, and | C_comp_gnd_clamp are intended to represent the parasitic | capacitances of those structures who's I-V characteristics | are described by the [Pullup], [Pulldown], [POWER Clamp] and |* [GND Clamp] I-V tables. For this reason, the EDA tool | should generate a circuit netlist so that, if defined, each of |* the C_comp* capacitors are connected in parallel with their |* corresponding I-V tables, whether or not the I-V table exists. |* That is, the C_comp* capacitors are positioned between the signal | pad and the nodes defined by the [Pullup Reference], | [Pulldown Reference], [POWER Clamp Reference] and [GND Clamp | Reference] keywords, or the [Voltage Range] keyword and GND. | | The C_comp and C_comp* subparameters define die capacitance. These | values should not include the capacitance of the package. | C_comp and C_comp* are allowed to use "NA" for the min and max | values only. | | The Polarity, Enable, Vinl, Vinh, Vmeas, Cref, Rref, and Vref | subparameters are optional. The Polarity subparameter can be | defined as either Non-Inverting or Inverting, and the Enable | subparameter can be defined as either Active-High or | Active-Low. | | The Cref and Rref subparameters correspond to the test load | that the semiconductor vendor uses when specifying the | propagation delay and/or output switching time of the model. | The Vmeas subparameter is the reference voltage level that the | semiconductor vendor uses for the model. Include Cref, Rref, | Vref, and Vmeas information to facilitate board-level timing | simulation. The assumed connections for Cref, Rref, and Vref | are shown in the following diagram: | | _________ | | | | | |\ | Rref | |Driver| \|------o----/\/\/\----o Vref | | | /| | | | |/ | === Cref | |_________| | | | | GND | | Other Notes: A complete [Model] description normally contains the following | keywords: [Voltage Range], [Pullup], [Pulldown], [GND Clamp], | [POWER Clamp], and [Ramp]. A Terminator model uses one or | more of the [Rgnd], [Rpower], [Rac], and [Cac] keywords. | However, some models may have only a subset of these keywords. | For example, an input structure normally only needs the | [Voltage Range], [GND Clamp], and possibly the [POWER Clamp] | keywords. If one or more of [Rgnd], [Rpower], [Rac], and [Cac] | keywords are used, then the Model_type must be Terminator. |--------------------------------------------------------------------------- | Signals CLK1, CLK2,... | Optional signal list, if desired [Model] Clockbuffer Model_type I/O Polarity Non-Inverting Enable Active-High Vinl = 0.8V | input logic "low" DC voltage, if any Vinh = 2.0V | input logic "high" DC voltage, if any Vmeas = 1.5V | Reference voltage for timing measurements Cref = 50pF | Timing specification test load capacitance value Rref = 500 | Timing specification test load resistance value Vref = 0 | Timing specification test load voltage | variable typ min max C_comp 12.0pF 10.0pF 15.0pF | |=========================================================================== | [Model] Clockbuffer Model_type I/O Vinl = 0.8V | input logic "low" DC voltage, if any Vinh = 2.0V | input logic "high" DC voltage, if any | | variable typ min max C_comp_pullup 3.0pF 2.5pF 3.5pF C_comp_pulldown 2.0pF 1.5pF 2.5pF C_comp_power 1.0pF 0.5pF 1.5pF C_comp_gnd 1.0pF 0.5pF 1.5pF | The last paragraph of the Usage Rules section of the [Rising Waveform], [Falling Waveform] keyword description is changed as follows: | All tables assume that the die capacitance is included. | Potential numerical problems associated with processing the | data using the effective C_comp (C_comp or C_comp* as | appropriate) for effective die capacitance may be handled |* differently among EDA tools. **************************************************************************** ANALYSIS PATH/DATA THAT LED TO SPECIFICATION: Needed information on where the distributed capacitance went, thus the addition of a paragraph to explain this. Also, the names of two of the original subparameters, "C_comp_power" and "C_comp_gnd", were changed to "C_comp_power_clamp" and "C_comp_gnd_clamp" respectively to better reflect their purpose. Some minor wording changes to the current draft text were also done. Finally, updated a bit of text in the waveform keywords, per John Angulo's suggestion. BIRD 76.1 changes are marked by a single asterisk in the margin. The changes include: 1. Under sub-params: remove the word "and" from the list and add a missing comma 2. In the third change paragraph, change 'parameters' to 'subparameters' 3. In the second change paragraph, change references from I-V curves to I-V tables. 4. Change wording to clarify that use of a C_comp* subparameter does not imply that the corresponding I-V table must exist. 5. changed references "simulator" to "EDA". **************************************************************************** ANY OTHER BACKGROUND INFORMATION: **************************************************************************** |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 23 Jul 2002 09:01:27 -0400 From: Peter LaFlamme Subject: [IBIS-Users] LVDS RECEIVER TERMINATION Question Hi All, I am tasked with creating an IBIS model for an LVDS receiver cell that has an internal 100 ohm termination between the P and N nodes. I had asked Bob Ross about this a while ago and as usual he was very helpful. From his response I used the following implementation: |**************************************************************** | Component: LVDSRCV |**************************************************************** | [Component] LVDSRCV [Manufacturer] AMCC | | | [Package] | variable typ min max R_pkg 1E-3 NA NA L_pkg 1E-9 NA NA C_pkg 1E-12 NA NA | [Pin] signal_name model_name R_pin L_pin C_pin 1 PAD lvdsrcv NA NA NA 2 PADN lvdsrcv NA NA NA | [Series Pin Mapping] pin_2 model_name function_table_group 1 2 rterm_100 | [Diff_pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max | 1 2 0.2 0 0 0 [Model] rterm_100 C_comp 0.1pF 0.1pF 0.1pF Model_type Series |variable R(typ) R(min) R(max) [R Series] 100 80 120 [Temperature Range] 25.00 125.00 0.00 [Voltage Range] 1.800 1.650 1.950 **************************************************************************************** I was able to get the model past the IBIS checker but my simulations did not show the 100 ohm terminator. I was using a tool which I believe does not support this implementation (no need to mention names). I have seen other implementations where I believe a "Dynamic clamp" is used to model the termination behavior, but I am unsure. Can anyone guide me to some reference material or weigh in with your experience or help. Thanks alot, Peter - -- Peter LaFlamme Applied Micro Circuits Corp. System Applications Engineer 200 Minuteman Rd, 3rd Floor Andover, MA 01810 978-247-8470 phone 978-623-0055 Fax |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 23 Jul 2002 09:23:58 -0400 From: Adam.Tambone@fairchildsemi.com Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question Hello Peter, I have an additional question regarding what you have described below. If the LVDS receiver has an internal 100 Ohm termination across two LVDS inputs, then when the I-V measurements are taken for one input, how is the partner input being treated? Is it left floating? Thaks, Adam |---------+---------------------------> | | Peter LaFlamme | | | | | | Sent by: | | | owner-ibis-users| | | @eda.org | | | | | | | | | 07/23/02 09:01 | | | AM | | | | |---------+---------------------------> >-------------------------------------------------------------------------------------------------------------------------------| | | | To: ibis-users@eda.org | | cc: | | Subject: [IBIS-Users] LVDS RECEIVER TERMINATION Question | >-------------------------------------------------------------------------------------------------------------------------------| Hi All, I am tasked with creating an IBIS model for an LVDS receiver cell that has an internal 100 ohm termination between the P and N nodes. I had asked Bob Ross about this a while ago and as usual he was very helpful. From his response I used the following implementation: |**************************************************************** | Component: LVDSRCV |**************************************************************** | [Component] LVDSRCV [Manufacturer] AMCC | | | [Package] | variable typ min max R_pkg 1E-3 NA NA L_pkg 1E-9 NA NA C_pkg 1E-12 NA NA | [Pin] signal_name model_name R_pin L_pin C_pin 1 PAD lvdsrcv NA NA NA 2 PADN lvdsrcv NA NA NA | [Series Pin Mapping] pin_2 model_name function_table_group 1 2 rterm_100 | [Diff_pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max | 1 2 0.2 0 0 0 [Model] rterm_100 C_comp 0.1pF 0.1pF 0.1pF Model_type Series |variable R(typ) R(min) R(max) [R Series] 100 80 120 [Temperature Range] 25.00 125.00 0.00 [Voltage Range] 1.800 1.650 1.950 **************************************************************************************** I was able to get the model past the IBIS checker but my simulations did not show the 100 ohm terminator. I was using a tool which I believe does not support this implementation (no need to mention names). I have seen other implementations where I believe a "Dynamic clamp" is used to model the termination behavior, but I am unsure. Can anyone guide me to some reference material or weigh in with your experience or help. Thanks alot, Peter - -- Peter LaFlamme Applied Micro Circuits Corp. System Applications Engineer 200 Minuteman Rd, 3rd Floor Andover, MA 01810 978-247-8470 phone 978-623-0055 Fax |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 23 Jul 2002 09:46:04 -0400 From: Peter LaFlamme Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question Hi Adam, Thanks for the interest and response. In regards to your question, one of the inputs can be left floating to get the pwr/gnd clamp info. The other part of the model will take care of the resistor termination and its variation over process. Regards, Peter - -- Peter LaFlamme Applied Micro Circuits Corp. System Applications Engineer 200 Minuteman Rd, 3rd Floor Andover, MA 01810 978-247-8470 phone 978-623-0055 Fax Adam.Tambone@fairchildsemi.com wrote: > > Hello Peter, > > I have an additional question regarding what you have described below. If > the LVDS receiver has an internal 100 Ohm termination across two LVDS > inputs, then when the I-V measurements are taken for one input, how is the > partner input being treated? Is it left floating? > > Thaks, > Adam > > |---------+---------------------------> > | | Peter LaFlamme | > | | | | om> | > | | Sent by: | > | | owner-ibis-users| > | | @eda.org | > | | | > | | | > | | 07/23/02 09:01 | > | | AM | > | | | > |---------+---------------------------> > >-------------------------------------------------------------------------------------------------------------------------------| > | | > | To: ibis-users@eda.org | > | cc: | > | Subject: [IBIS-Users] LVDS RECEIVER TERMINATION Question | > >-------------------------------------------------------------------------------------------------------------------------------| > > Hi All, > I am tasked with creating an IBIS model for an LVDS receiver cell that has > an internal 100 ohm termination between the P and N nodes. I had asked Bob > Ross about this a while ago and as usual he was very helpful. From his > response I used the following > implementation: > > |**************************************************************** > | Component: LVDSRCV > |**************************************************************** > | > [Component] LVDSRCV > [Manufacturer] AMCC > | > | > | > [Package] > | variable typ min max > R_pkg 1E-3 NA NA > L_pkg 1E-9 NA NA > C_pkg 1E-12 NA NA > | > [Pin] signal_name model_name R_pin L_pin C_pin > 1 PAD lvdsrcv NA NA NA > 2 PADN lvdsrcv NA NA NA > | > [Series Pin Mapping] pin_2 model_name function_table_group > 1 2 rterm_100 > > | > [Diff_pin] inv_pin vdiff tdelay_typ tdelay_min > tdelay_max > | > 1 2 0.2 0 0 0 > > [Model] rterm_100 > C_comp 0.1pF 0.1pF 0.1pF > > Model_type Series > |variable R(typ) R(min) R(max) > [R Series] 100 80 120 > > [Temperature Range] 25.00 125.00 0.00 > [Voltage Range] 1.800 1.650 1.950 > > **************************************************************************************** > > I was able to get the model past the IBIS checker but my simulations did > not show the 100 ohm terminator. I was using a tool which I believe does > not support this implementation (no need to mention names). I have seen > other implementations where I believe > a "Dynamic clamp" is used to model the termination behavior, but I am > unsure. Can anyone guide me to some reference material or weigh in with > your experience or help. > > Thanks alot, > Peter > > -- > Peter LaFlamme > > Applied Micro Circuits Corp. > System Applications Engineer > 200 Minuteman Rd, 3rd Floor > Andover, MA 01810 > > 978-247-8470 phone > 978-623-0055 Fax > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 23 Jul 2002 10:01:17 -0400 From: Adam.Tambone@fairchildsemi.com Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question Hello Peter, Yes, I am wondering if there is a method where the pwr/gnd clamping curve can also account for the termination since it appears that simulation tools do not recognize the series model. Adam |---------+---------------------------> | | Peter LaFlamme | | | | | | Sent by: | | | owner-ibis-users| | | @eda.org | | | | | | | | | 07/23/02 09:46 | | | AM | | | | |---------+---------------------------> >-------------------------------------------------------------------------------------------------------------------------------| | | | To: Adam Tambone/SouthPortland/Fairchild@Fairchild | | cc: ibis-users@eda.org | | Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question | >-------------------------------------------------------------------------------------------------------------------------------| Hi Adam, Thanks for the interest and response. In regards to your question, one of the inputs can be left floating to get the pwr/gnd clamp info. The other part of the model will take care of the resistor termination and its variation over process. Regards, Peter - -- Peter LaFlamme Applied Micro Circuits Corp. System Applications Engineer 200 Minuteman Rd, 3rd Floor Andover, MA 01810 978-247-8470 phone 978-623-0055 Fax Adam.Tambone@fairchildsemi.com wrote: > > Hello Peter, > > I have an additional question regarding what you have described below. If > the LVDS receiver has an internal 100 Ohm termination across two LVDS > inputs, then when the I-V measurements are taken for one input, how is the > partner input being treated? Is it left floating? > > Thaks, > Adam > > |---------+---------------------------> > | | Peter LaFlamme | > | | | | om> | > | | Sent by: | > | | owner-ibis-users| > | | @eda.org | > | | | > | | | > | | 07/23/02 09:01 | > | | AM | > | | | > |---------+---------------------------> > > - -------------------------------------------------------------------------------------------------------------------------------| > | | > | To: ibis-users@eda.org | > | cc: | > | Subject: [IBIS-Users] LVDS RECEIVER TERMINATION Question | > > - -------------------------------------------------------------------------------------------------------------------------------| > > Hi All, > I am tasked with creating an IBIS model for an LVDS receiver cell that has > an internal 100 ohm termination between the P and N nodes. I had asked Bob > Ross about this a while ago and as usual he was very helpful. From his > response I used the following > implementation: > > |**************************************************************** > | Component: LVDSRCV > |**************************************************************** > | > [Component] LVDSRCV > [Manufacturer] AMCC > | > | > | > [Package] > | variable typ min max > R_pkg 1E-3 NA NA > L_pkg 1E-9 NA NA > C_pkg 1E-12 NA NA > | > [Pin] signal_name model_name R_pin L_pin C_pin > 1 PAD lvdsrcv NA NA NA > 2 PADN lvdsrcv NA NA NA > | > [Series Pin Mapping] pin_2 model_name function_table_group > 1 2 rterm_100 > > | > [Diff_pin] inv_pin vdiff tdelay_typ tdelay_min > tdelay_max > | > 1 2 0.2 0 0 0 > > [Model] rterm_100 > C_comp 0.1pF 0.1pF 0.1pF > > Model_type Series > |variable R(typ) R(min) R(max) > [R Series] 100 80 120 > > [Temperature Range] 25.00 125.00 0.00 > [Voltage Range] 1.800 1.650 1.950 > > **************************************************************************************** > > I was able to get the model past the IBIS checker but my simulations did > not show the 100 ohm terminator. I was using a tool which I believe does > not support this implementation (no need to mention names). I have seen > other implementations where I believe > a "Dynamic clamp" is used to model the termination behavior, but I am > unsure. Can anyone guide me to some reference material or weigh in with > your experience or help. > > Thanks alot, > Peter > > -- > Peter LaFlamme > > Applied Micro Circuits Corp. > System Applications Engineer > 200 Minuteman Rd, 3rd Floor > Andover, MA 01810 > > 978-247-8470 phone > 978-623-0055 Fax > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 23 Jul 2002 10:12:28 -0400 From: Peter LaFlamme Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question Hi Adam, I am sorry. I guess I misunderstood what your question was. I believe that some people use a "dynamic clamp" to implement the resistor termination. I am unsure how valid this approach is, based on some of the models that I have tested. Regards, Peter - -- Peter LaFlamme Applied Micro Circuits Corp. System Applications Engineer 200 Minuteman Rd, 3rd Floor Andover, MA 01810 978-247-8470 phone 978-623-0055 Fax Adam.Tambone@fairchildsemi.com wrote: > > Hello Peter, > > Yes, I am wondering if there is a method where the pwr/gnd clamping curve > can also account for the termination since it appears that simulation tools > do not recognize the series model. > > Adam > > |---------+---------------------------> > | | Peter LaFlamme | > | | | | om> | > | | Sent by: | > | | owner-ibis-users| > | | @eda.org | > | | | > | | | > | | 07/23/02 09:46 | > | | AM | > | | | > |---------+---------------------------> > >-------------------------------------------------------------------------------------------------------------------------------| > | | > | To: Adam Tambone/SouthPortland/Fairchild@Fairchild | > | cc: ibis-users@eda.org | > | Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question | > >-------------------------------------------------------------------------------------------------------------------------------| > > Hi Adam, > Thanks for the interest and response. In regards to your question, one of > the inputs can be left floating to get the pwr/gnd clamp info. The other > part of the model will take care of the resistor termination and its > variation over process. > > Regards, > Peter > > -- > Peter LaFlamme > > Applied Micro Circuits Corp. > System Applications Engineer > 200 Minuteman Rd, 3rd Floor > Andover, MA 01810 > > 978-247-8470 phone > 978-623-0055 Fax > > Adam.Tambone@fairchildsemi.com wrote: > > > > Hello Peter, > > > > I have an additional question regarding what you have described below. > If > > the LVDS receiver has an internal 100 Ohm termination across two LVDS > > inputs, then when the I-V measurements are taken for one input, how is > the > > partner input being treated? Is it left floating? > > > > Thaks, > > Adam > > > > |---------+---------------------------> > > | | Peter LaFlamme | > > | | > | | om> | > > | | Sent by: | > > | | owner-ibis-users| > > | | @eda.org | > > | | | > > | | | > > | | 07/23/02 09:01 | > > | | AM | > > | | | > > |---------+---------------------------> > > > > -------------------------------------------------------------------------------------------------------------------------------| > > > | > | > > | To: ibis-users@eda.org > | > > | cc: > | > > | Subject: [IBIS-Users] LVDS RECEIVER TERMINATION Question > | > > > > -------------------------------------------------------------------------------------------------------------------------------| > > > > > Hi All, > > I am tasked with creating an IBIS model for an LVDS receiver cell that > has > > an internal 100 ohm termination between the P and N nodes. I had asked > Bob > > Ross about this a while ago and as usual he was very helpful. From his > > response I used the following > > implementation: > > > > |**************************************************************** > > | Component: LVDSRCV > > |**************************************************************** > > | > > [Component] LVDSRCV > > [Manufacturer] AMCC > > | > > | > > | > > [Package] > > | variable typ min max > > R_pkg 1E-3 NA NA > > L_pkg 1E-9 NA NA > > C_pkg 1E-12 NA NA > > | > > [Pin] signal_name model_name R_pin L_pin C_pin > > 1 PAD lvdsrcv NA NA NA > > 2 PADN lvdsrcv NA NA NA > > | > > [Series Pin Mapping] pin_2 model_name function_table_group > > 1 2 rterm_100 > > > > | > > [Diff_pin] inv_pin vdiff tdelay_typ tdelay_min > > tdelay_max > > | > > 1 2 0.2 0 0 0 > > > > [Model] rterm_100 > > C_comp 0.1pF 0.1pF 0.1pF > > > > Model_type Series > > |variable R(typ) R(min) R(max) > > [R Series] 100 80 120 > > > > [Temperature Range] 25.00 125.00 0.00 > > [Voltage Range] 1.800 1.650 1.950 > > > > > **************************************************************************************** > > > > > I was able to get the model past the IBIS checker but my simulations did > > not show the 100 ohm terminator. I was using a tool which I believe does > > not support this implementation (no need to mention names). I have seen > > other implementations where I believe > > a "Dynamic clamp" is used to model the termination behavior, but I am > > unsure. Can anyone guide me to some reference material or weigh in with > > your experience or help. > > > > Thanks alot, > > Peter > > > > -- > > Peter LaFlamme > > > > Applied Micro Circuits Corp. > > System Applications Engineer > > 200 Minuteman Rd, 3rd Floor > > Andover, MA 01810 > > > > 978-247-8470 phone > > 978-623-0055 Fax > > |------------------------------------------------------------------ > > |For help or to subscribe/unsubscribe, email majordomo@eda.org > > |with just the appropriate command message(s) in the body: > > | > > | help > > | subscribe ibis > > | subscribe ibis-users > > | unsubscribe ibis > > | unsubscribe ibis-users > > | > > |or email a written request to ibis-request@eda.org. > > | > > |IBIS reflector archives exist under: > > | > > | http://www.eda.org/pub/ibis/email_archive/ Recent > > | http://www.eda.org/pub/ibis/users_archive/ Recent > > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 23 Jul 2002 10:32:38 -0400 From: Adam.Tambone@fairchildsemi.com Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question Hello Peter, No need for for an apology, you understood me correctly and answered my question. OK, so I think we are on the same page regarding a dynamic clamp accounting for the effect of the internal termination. I think the the LVDS driver must be included for the I-V measurements of the LVDS receiver. In other words, let the driver perform the DC sweep on the inputs : ) Adam |---------+---------------------------> | | Peter LaFlamme | | | | | | | | | 07/23/02 10:12 | | | AM | | | | |---------+---------------------------> >-------------------------------------------------------------------------------------------------------------------------------| | | | To: Adam Tambone/SouthPortland/Fairchild@Fairchild | | cc: ibis-users@eda.org | | Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question | >-------------------------------------------------------------------------------------------------------------------------------| Hi Adam, I am sorry. I guess I misunderstood what your question was. I believe that some people use a "dynamic clamp" to implement the resistor termination. I am unsure how valid this approach is, based on some of the models that I have tested. Regards, Peter - -- Peter LaFlamme Applied Micro Circuits Corp. System Applications Engineer 200 Minuteman Rd, 3rd Floor Andover, MA 01810 978-247-8470 phone 978-623-0055 Fax Adam.Tambone@fairchildsemi.com wrote: > > Hello Peter, > > Yes, I am wondering if there is a method where the pwr/gnd clamping curve > can also account for the termination since it appears that simulation tools > do not recognize the series model. > > Adam > > |---------+---------------------------> > | | Peter LaFlamme | > | | | | om> | > | | Sent by: | > | | owner-ibis-users| > | | @eda.org | > | | | > | | | > | | 07/23/02 09:46 | > | | AM | > | | | > |---------+---------------------------> > > - -------------------------------------------------------------------------------------------------------------------------------| > | | > | To: Adam Tambone/SouthPortland/Fairchild@Fairchild | > | cc: ibis-users@eda.org | > | Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question | > > - -------------------------------------------------------------------------------------------------------------------------------| > > Hi Adam, > Thanks for the interest and response. In regards to your question, one of > the inputs can be left floating to get the pwr/gnd clamp info. The other > part of the model will take care of the resistor termination and its > variation over process. > > Regards, > Peter > > -- > Peter LaFlamme > > Applied Micro Circuits Corp. > System Applications Engineer > 200 Minuteman Rd, 3rd Floor > Andover, MA 01810 > > 978-247-8470 phone > 978-623-0055 Fax > > Adam.Tambone@fairchildsemi.com wrote: > > > > Hello Peter, > > > > I have an additional question regarding what you have described below. > If > > the LVDS receiver has an internal 100 Ohm termination across two LVDS > > inputs, then when the I-V measurements are taken for one input, how is > the > > partner input being treated? Is it left floating? > > > > Thaks, > > Adam > > > > |---------+---------------------------> > > | | Peter LaFlamme | > > | | > | | om> | > > | | Sent by: | > > | | owner-ibis-users| > > | | @eda.org | > > | | | > > | | | > > | | 07/23/02 09:01 | > > | | AM | > > | | | > > |---------+---------------------------> > > > > - -------------------------------------------------------------------------------------------------------------------------------| > > > | > | > > | To: ibis-users@eda.org > | > > | cc: > | > > | Subject: [IBIS-Users] LVDS RECEIVER TERMINATION Question > | > > > > - -------------------------------------------------------------------------------------------------------------------------------| > > > > > Hi All, > > I am tasked with creating an IBIS model for an LVDS receiver cell that > has > > an internal 100 ohm termination between the P and N nodes. I had asked > Bob > > Ross about this a while ago and as usual he was very helpful. From his > > response I used the following > > implementation: > > > > |**************************************************************** > > | Component: LVDSRCV > > |**************************************************************** > > | > > [Component] LVDSRCV > > [Manufacturer] AMCC > > | > > | > > | > > [Package] > > | variable typ min max > > R_pkg 1E-3 NA NA > > L_pkg 1E-9 NA NA > > C_pkg 1E-12 NA NA > > | > > [Pin] signal_name model_name R_pin L_pin C_pin > > 1 PAD lvdsrcv NA NA NA > > 2 PADN lvdsrcv NA NA NA > > | > > [Series Pin Mapping] pin_2 model_name function_table_group > > 1 2 rterm_100 > > > > | > > [Diff_pin] inv_pin vdiff tdelay_typ tdelay_min > > tdelay_max > > | > > 1 2 0.2 0 0 0 > > > > [Model] rterm_100 > > C_comp 0.1pF 0.1pF 0.1pF > > > > Model_type Series > > |variable R(typ) R(min) R(max) > > [R Series] 100 80 120 > > > > [Temperature Range] 25.00 125.00 0.00 > > [Voltage Range] 1.800 1.650 1.950 > > > > > **************************************************************************************** > > > > > I was able to get the model past the IBIS checker but my simulations did > > not show the 100 ohm terminator. I was using a tool which I believe does > > not support this implementation (no need to mention names). I have seen > > other implementations where I believe > > a "Dynamic clamp" is used to model the termination behavior, but I am > > unsure. Can anyone guide me to some reference material or weigh in with > > your experience or help. > > > > Thanks alot, > > Peter > > > > -- > > Peter LaFlamme > > > > Applied Micro Circuits Corp. > > System Applications Engineer > > 200 Minuteman Rd, 3rd Floor > > Andover, MA 01810 > > > > 978-247-8470 phone > > 978-623-0055 Fax > > |------------------------------------------------------------------ > > |For help or to subscribe/unsubscribe, email majordomo@eda.org > > |with just the appropriate command message(s) in the body: > > | > > | help > > | subscribe ibis > > | subscribe ibis-users > > | unsubscribe ibis > > | unsubscribe ibis-users > > | > > |or email a written request to ibis-request@eda.org. > > | > > |IBIS reflector archives exist under: > > | > > | http://www.eda.org/pub/ibis/email_archive/ Recent > > | http://www.eda.org/pub/ibis/users_archive/ Recent > > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 23 Jul 2002 12:31:13 -0400 From: "Hassan Ali" Subject: RE: [IBIS-Users] LVDS RECEIVER TERMINATION Question Hi Peter, I had the same situation a few months ago and I only had to go with an adhoc solution. Yes indeed most simulators do not have good support for differential models with [R Series] termination. I ended up creating a single-ended input buffer model (same for the P and N side) with no termination between P and N sides. This only captured the clamping function. In my simulation I had to recreate the terminated differential input buffer by using two single-ended buffers (one for the P and one for the N pin) with a termination resistor tied between them. The package parasitics were also tied to the two pins. I manually changed the values of the termination resistor and package parasitics to cover their variation in the typical, minimum and maximum corners. Probably there is a better solution, but that's what I did as a quick-and-dirty work-around. Regards. Hassan. Hassan Ali, Ph.D. Signal Integrity Specialist -Talented, innovative designers Fidus Systems Inc. -Highly competitive rates Tel: (613) 828-0063 Ext.342 -Fixed-price business model Fax: (613) 828-3113 -State-of-the-art design tools http://www.fidus.ca -Customer-friendly attitude - -----Original Message----- From: Peter LaFlamme [mailto:plaflamm@amcc.com] Sent: Tuesday, July 23, 2002 9:01 AM To: ibis-users@eda.org Subject: [IBIS-Users] LVDS RECEIVER TERMINATION Question Hi All, I am tasked with creating an IBIS model for an LVDS receiver cell that has an internal 100 ohm termination between the P and N nodes. I had asked Bob Ross about this a while ago and as usual he was very helpful. From his response I used the following implementation: |**************************************************************** | Component: LVDSRCV |**************************************************************** | [Component] LVDSRCV [Manufacturer] AMCC | | | [Package] | variable typ min max R_pkg 1E-3 NA NA L_pkg 1E-9 NA NA C_pkg 1E-12 NA NA | [Pin] signal_name model_name R_pin L_pin C_pin 1 PAD lvdsrcv NA NA NA 2 PADN lvdsrcv NA NA NA | [Series Pin Mapping] pin_2 model_name function_table_group 1 2 rterm_100 | [Diff_pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max | 1 2 0.2 0 0 0 [Model] rterm_100 C_comp 0.1pF 0.1pF 0.1pF Model_type Series |variable R(typ) R(min) R(max) [R Series] 100 80 120 [Temperature Range] 25.00 125.00 0.00 [Voltage Range] 1.800 1.650 1.950 ************************************************************************ **************** I was able to get the model past the IBIS checker but my simulations did not show the 100 ohm terminator. I was using a tool which I believe does not support this implementation (no need to mention names). I have seen other implementations where I believe a "Dynamic clamp" is used to model the termination behavior, but I am unsure. Can anyone guide me to some reference material or weigh in with your experience or help. Thanks alot, Peter - -- Peter LaFlamme Applied Micro Circuits Corp. System Applications Engineer 200 Minuteman Rd, 3rd Floor Andover, MA 01810 978-247-8470 phone 978-623-0055 Fax |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 23 Jul 2002 13:52:47 -0400 From: Peter LaFlamme Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question Hi Hassan, Thanks alot for the comments and information. I have done the same thing previously in simulations. I have also received input models that had the internal termination modeled as a dynamic clamp. In comparisons between dynamic clamp modeled terminations and your method, I found that (just in my case) there was not real good correlation. Regards, Peter Peter LaFlamme Applied Micro Circuits Corp. System Applications Engineer 200 Minuteman Rd, 3rd Floor Andover, MA 01810 978-247-8470 phone 978-623-0055 Fax Hassan Ali wrote: > > Hi Peter, > > I had the same situation a few months ago and I only had to go with an > adhoc solution. > > Yes indeed most simulators do not have good support for differential > models with [R Series] termination. I ended up creating a single-ended > input buffer model (same for the P and N side) with no termination > between P and N sides. This only captured the clamping function. > > In my simulation I had to recreate the terminated differential input > buffer by using two single-ended buffers (one for the P and one for the > N pin) with a termination resistor tied between them. The package > parasitics were also tied to the two pins. I manually changed the values > of the termination resistor and package parasitics to cover their > variation in the typical, minimum and maximum corners. > > Probably there is a better solution, but that's what I did as a > quick-and-dirty work-around. > > Regards. > > Hassan. > > Hassan Ali, Ph.D. > Signal Integrity Specialist -Talented, innovative designers > Fidus Systems Inc. -Highly competitive rates > Tel: (613) 828-0063 Ext.342 -Fixed-price business model > Fax: (613) 828-3113 -State-of-the-art design tools > http://www.fidus.ca -Customer-friendly attitude > > -----Original Message----- > From: Peter LaFlamme [mailto:plaflamm@amcc.com] > Sent: Tuesday, July 23, 2002 9:01 AM > To: ibis-users@eda.org > Subject: [IBIS-Users] LVDS RECEIVER TERMINATION Question > > Hi All, > I am tasked with creating an IBIS model for an LVDS receiver cell that > has an internal 100 ohm termination between the P and N nodes. I had > asked Bob Ross about this a while ago and as usual he was very helpful. > >From his response I used the following > implementation: > > |**************************************************************** > | Component: LVDSRCV > |**************************************************************** > | > [Component] LVDSRCV > [Manufacturer] AMCC > | > | > | > [Package] > | variable typ min max > R_pkg 1E-3 NA NA > L_pkg 1E-9 NA NA > C_pkg 1E-12 NA NA > | > [Pin] signal_name model_name R_pin L_pin C_pin > 1 PAD lvdsrcv NA NA NA > 2 PADN lvdsrcv NA NA NA > | > [Series Pin Mapping] pin_2 model_name function_table_group > 1 2 rterm_100 > > | > [Diff_pin] inv_pin vdiff tdelay_typ tdelay_min > tdelay_max > | > 1 2 0.2 0 0 0 > > [Model] rterm_100 > C_comp 0.1pF 0.1pF 0.1pF > > Model_type Series > |variable R(typ) R(min) R(max) > [R Series] 100 80 120 > > [Temperature Range] 25.00 125.00 0.00 > [Voltage Range] 1.800 1.650 1.950 > > ************************************************************************ > **************** > > I was able to get the model past the IBIS checker but my simulations did > not show the 100 ohm terminator. I was using a tool which I believe does > not support this implementation (no need to mention names). I have seen > other implementations where I believe > > a "Dynamic clamp" is used to model the termination behavior, but I am > unsure. Can anyone guide me to some reference material or weigh in with > your experience or help. > > Thanks alot, > Peter > > > > -- > Peter LaFlamme > > Applied Micro Circuits Corp. > System Applications Engineer > 200 Minuteman Rd, 3rd Floor > Andover, MA 01810 > > 978-247-8470 phone > 978-623-0055 Fax > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 - -- |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 24 Jul 2002 00:01:58 +0300 From: "Hegazy, Hazem" Subject: RE: [IBIS-Users] LVDS RECEIVER TERMINATION Question This message is in MIME format. Since your mail reader does not understand this format, some or all of this message may not be legible. - ------_=_NextPart_001_01C2328C.16E9B695 Content-Type: text/plain Hi, I've a solution...I didn't test it yet but, I suggest that based on an old solution of mine for 100 terminated LVDS DRIVERS in IBIS summit Jan 2001 "hegazy.pdf or zip on IBIS home page". In the driver case, I consider the internal termination as a part of the buffer itself, I could not take it away "In some cases we can" so, I want to get the I-V characteristics based on this. What are the I-V characteristics? Simply, it's the steady state solution of the voltage and current at all possible loads. So, I put a resistor between P node and N node and measure "steady state voltage and current" now, vary the resistor value from zero to infinity (open circuit) and do the same extraction to complete your I-V table. You will have the actual behavior of the buffer (Interactive) on all possible loading conditions. This is verified with a lot of LVDS buffers for very famous customer. For the receiver we can't do that as there is no source of current like in the driver case to measure the I and V. So, my suggestion is to put a voltage source between the p and n nodes (differential voltage source). Vary the voltage source value in normal DC analysis and measure the P voltage with the current through the voltage source to form the I-V table with the interaction of the n node inherited inside it. I'll try this solution with some validation and keep you all informed. I might have goofed!! BR, - -----Original Message----- From: Peter LaFlamme To: Hassan Ali Cc: ibis-users@server.eda.org Sent: 7/23/02 6:52 PM Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION Question Hi Hassan, Thanks alot for the comments and information. I have done the same thing previously in simulations. I have also received input models that had the internal termination modeled as a dynamic clamp. In comparisons between dynamic clamp modeled terminations and your method, I found that (just in my case) there was not real good correlation. Regards, Peter Peter LaFlamme Applied Micro Circuits Corp. System Applications Engineer 200 Minuteman Rd, 3rd Floor Andover, MA 01810 978-247-8470 phone 978-623-0055 Fax Hassan Ali wrote: > > Hi Peter, > > I had the same situation a few months ago and I only had to go with an > adhoc solution. > > Yes indeed most simulators do not have good support for differential > models with [R Series] termination. I ended up creating a single-ended > input buffer model (same for the P and N side) with no termination > between P and N sides. This only captured the clamping function. > > In my simulation I had to recreate the terminated differential input > buffer by using two single-ended buffers (one for the P and one for the > N pin) with a termination resistor tied between them. The package > parasitics were also tied to the two pins. I manually changed the values > of the termination resistor and package parasitics to cover their > variation in the typical, minimum and maximum corners. > > Probably there is a better solution, but that's what I did as a > quick-and-dirty work-around. > > Regards. > > Hassan. > > Hassan Ali, Ph.D. > Signal Integrity Specialist -Talented, innovative designers > Fidus Systems Inc. -Highly competitive rates > Tel: (613) 828-0063 Ext.342 -Fixed-price business model > Fax: (613) 828-3113 -State-of-the-art design tools > http://www.fidus.ca -Customer-friendly attitude > > -----Original Message----- > From: Peter LaFlamme [mailto:plaflamm@amcc.com] > Sent: Tuesday, July 23, 2002 9:01 AM > To: ibis-users@eda.org > Subject: [IBIS-Users] LVDS RECEIVER TERMINATION Question > > Hi All, > I am tasked with creating an IBIS model for an LVDS receiver cell that > has an internal 100 ohm termination between the P and N nodes. I had > asked Bob Ross about this a while ago and as usual he was very helpful. > >From his response I used the following > implementation: > > |**************************************************************** > | Component: LVDSRCV > |**************************************************************** > | > [Component] LVDSRCV > [Manufacturer] AMCC > | > | > | > [Package] > | variable typ min max > R_pkg 1E-3 NA NA > L_pkg 1E-9 NA NA > C_pkg 1E-12 NA NA > | > [Pin] signal_name model_name R_pin L_pin C_pin > 1 PAD lvdsrcv NA NA NA > 2 PADN lvdsrcv NA NA NA > | > [Series Pin Mapping] pin_2 model_name function_table_group > 1 2 rterm_100 > > | > [Diff_pin] inv_pin vdiff tdelay_typ tdelay_min > tdelay_max > | > 1 2 0.2 0 0 0 > > [Model] rterm_100 > C_comp 0.1pF 0.1pF 0.1pF > > Model_type Series > |variable R(typ) R(min) R(max) > [R Series] 100 80 120 > > [Temperature Range] 25.00 125.00 0.00 > [Voltage Range] 1.800 1.650 1.950 > > ************************************************************************ > **************** > > I was able to get the model past the IBIS checker but my simulations did > not show the 100 ohm terminator. I was using a tool which I believe does > not support this implementation (no need to mention names). I have seen > other implementations where I believe > > a "Dynamic clamp" is used to model the termination behavior, but I am > unsure. Can anyone guide me to some reference material or weigh in with > your experience or help. > > Thanks alot, > Peter > > > > -- > Peter LaFlamme > > Applied Micro Circuits Corp. > System Applications Engineer > 200 Minuteman Rd, 3rd Floor > Andover, MA 01810 > > 978-247-8470 phone > 978-623-0055 Fax > |------------------------------------------------------------------ > |For help or to subscribe/unsubscribe, email majordomo@eda.org > |with just the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or email a written request to ibis-request@eda.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda.org/pub/ibis/email_archive/ Recent > | http://www.eda.org/pub/ibis/users_archive/ Recent > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 - -- |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 - ------_=_NextPart_001_01C2328C.16E9B695 Content-Type: text/html Content-Transfer-Encoding: quoted-printable RE: [IBIS-Users] LVDS RECEIVER TERMINATION Question

 Hi,
I've a solution...I didn't test it yet but, I = suggest that based on an old solution of mine for 100 terminated LVDS = DRIVERS in IBIS summit Jan 2001 "hegazy.pdf or zip on IBIS home = page".

In the driver case, I consider the internal = termination as a part of the buffer itself, I could not take it away = "In some cases we can" so, I want to get the I-V characteristics based = on this.

What are the I-V characteristics? Simply, it's the = steady state solution of the voltage and current at all possible = loads.

So, I put a resistor between P node and N node and = measure "steady state voltage and current" now, vary the resistor value = from zero to infinity (open circuit) and do the same extraction to = complete your I-V table. You will have the actual behavior of the = buffer (Interactive) on all possible loading conditions. This is = verified  with a lot of LVDS buffers for very famous = customer.

For the receiver we can't do that as there is no = source of current like in the driver case to measure the I and V. =
So, my suggestion is to put a voltage source between = the p and n nodes (differential voltage source). Vary the voltage = source value in normal DC analysis and measure the P voltage with the = current through the voltage source to form the I-V table with the = interaction of the n node inherited inside it.

I'll try this solution with some validation and keep = you all informed.
I might have goofed!!

BR,


-----Original Message-----
From: Peter LaFlamme
To: Hassan Ali
Cc: ibis-users@server.eda.org
Sent: 7/23/02 6:52 PM
Subject: Re: [IBIS-Users] LVDS RECEIVER TERMINATION = Question

Hi Hassan,
Thanks alot for the comments and information. I have = done the same thing
previously in simulations. I have also received = input models that had
the internal termination modeled as a dynamic clamp. = In comparisons
between dynamic clamp modeled terminations
and your method, I found that (just in my case) = there was not real good
correlation. 

Regards,
Peter

Peter LaFlamme

Applied Micro Circuits Corp.
System Applications Engineer
200 Minuteman Rd, 3rd Floor
Andover, MA 01810

978-247-8470 phone
978-623-0055 Fax


Hassan Ali wrote:
>
> Hi Peter,
>
> I had the same situation a few months ago and I = only had to go with an
> adhoc solution.
>
> Yes indeed most simulators do not have good = support for differential
> models with [R Series] termination. I ended up = creating a single-ended
> input buffer model (same for the P and N side) = with no termination
> between P and N sides. This only captured the = clamping function.
>
> In my simulation I had to recreate the = terminated differential input
> buffer by using two single-ended buffers (one = for the P and one for
the
> N pin) with a termination resistor tied between = them. The package
> parasitics were also tied to the two pins. I = manually changed the
values
> of the termination resistor and package = parasitics to cover their
> variation in the typical, minimum and maximum = corners.
>
> Probably there is a better solution, but that's = what I did as a
> quick-and-dirty work-around.
>
> Regards.
>
> Hassan.
>
> Hassan Ali, Ph.D.
> Signal Integrity Specialist   = - -Talented, innovative designers
> Fidus Systems = Inc.           &n= bsp;   -Highly competitive rates
> Tel: (613) 828-0063 Ext.342   = - -Fixed-price business model
> Fax: (613) = 828-3113          &nbs= p;   -State-of-the-art design tools
> http://www.fidus.ca     &= nbsp;          = - -Customer-friendly attitude
>
> -----Original Message-----
> From: Peter LaFlamme [mailto:plaflamm@amcc.com]
> Sent: Tuesday, July 23, 2002 9:01 AM
> To: ibis-users@eda.org
> Subject: [IBIS-Users] LVDS RECEIVER TERMINATION = Question
>
> Hi All,
> I am tasked with creating an IBIS model for an = LVDS receiver cell that
> has an internal 100 ohm termination between the = P and N nodes. I had
> asked Bob Ross about this a while ago and as = usual he was very
helpful.
> >From his response I used the = following
> implementation:
>
> = |****************************************************************=
> = |            = ;           = Component:  LVDSRCV
> = |****************************************************************=
> |
> [Component]      = LVDSRCV
> [Manufacturer]   AMCC
> |
> |
> |
> [Package]
> |  = variable       = typ          = min           = max
> = R_pkg            = 1E-3          = NA            = NA
> L_pkg       &= nbsp;    = 1E-9          = NA            = NA
> = C_pkg            = 1E-12          = NA            = NA
> |
> [Pin]        = signal_name     = model_name         = R_pin   L_pin   C_pin
>   = 1            = ; PAD          = lvdsrcv           = ; NA      NA      = NA
>   = 2            = ; PADN         = lvdsrcv           = ; NA      NA      = NA
> |
> [Series Pin Mapping]    = pin_2   model_name      = function_table_group
> = 1            = ;         = 2           = rterm_100
>
> |
> [Diff_pin]      = inv_pin     vdiff     = tdelay_typ    tdelay_min
> tdelay_max
> |
>    = 1            = ;   2          = 0.2          = 0            = ; 0
0
>
> [Model]  rterm_100
> = C_comp           =         0.1pF   = 0.1pF  0.1pF
>
> Model_type  Series
> = |variable        R(typ)  = R(min)  R(max)
> [R Series]      = 100     80      120
>
> [Temperature Range]     = 25.00    125.00    0.00
> [Voltage = Range]         = 1.800    1.650   1.950
>
>
***************************************************************= *********
> ****************
>
> I was able to get the model past the IBIS = checker but my simulations
did
> not show the 100 ohm terminator. I was using a = tool which I believe
does
> not support this implementation (no need to = mention names). I have
seen
> other implementations where I believe
>
> a "Dynamic clamp" is used to model = the termination behavior, but I am
> unsure. Can anyone guide me to some reference = material or weigh in
with
> your experience or help.
>
> Thanks alot,
> Peter
>
>
>
> --
> Peter LaFlamme
>
> Applied Micro Circuits Corp.
> System Applications Engineer
> 200 Minuteman Rd, 3rd Floor
> Andover, MA 01810
>
> 978-247-8470 phone
> 978-623-0055 Fax
> = |------------------------------------------------------------------
> |For help or to subscribe/unsubscribe, email = majordomo@eda.org
> |with just the appropriate command message(s) = in the body:
> |
> |  help
> |  subscribe   = ibis       <optional e-mail address, = if different>
> |  subscribe   ibis-users = <optional e-mail address, if different>
> |  unsubscribe = ibis       <optional e-mail address, = if different>
> |  unsubscribe ibis-users <optional = e-mail address, if different>
> |
> |or email a written request to = ibis-request@eda.org.
> |
> |IBIS reflector archives exist under:
> |
> |  http://www.eda.org/pub/ibis/email_archive/  = Recent
> |  http://www.eda.org/pub/ibis/users_archive/  = Recent
> |  http://www.eda.org/pub/ibis/email/  &nbs= p;       E-mail since 1993

--
|--------------------------------------------------------------= - ----
|For help or to subscribe/unsubscribe, email = majordomo@eda.org
|with just the appropriate command message(s) in the = body:
|
|  help
|  subscribe   = ibis       <optional e-mail address, = if different>
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|
|or email a written request to = ibis-request@eda.org.
|
|IBIS reflector archives exist under:
|
|  http://www.eda.org/pub/ibis/email_archive/  = Recent
|  http://www.eda.org/pub/ibis/users_archive/  = Recent
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- ------_=_NextPart_001_01C2328C.16E9B695-- |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ End of ibis-users V1 #7 ***********************