From: owner-ibis-users@ (ibis-users) To: ibis-users-digest@eda.org Subject: ibis-users V1 #35 Reply-To: Sender: owner-ibis-users@ Errors-To: owner-ibis-users@ Precedence: bulk ibis-users Monday, February 23 2004 Volume 01 : Number 035 ---------------------------------------------------------------------- Date: Thu, 15 Jan 2004 13:29:45 -0800 From: Bob Ross Subject: [IBIS-Users] Re: [IBIS] ECL Termination Voltage Question Hi Tom: The preset Vtt is not a problem because it is for the [Ramp] only, and the [Ramp] is not used when you have V-T tables. The switching shape problem was based on another issue which we have been we been communicating with you privately. Since the application is differential with 100 ohms differential and 200 ohms to GND, a better V-T specification would still be using the single-ended V-fixture to some equivalent Vtt voltage and the R_fixture at around 50 ohms or lower. This will be closer to the actual differential switching conditions for the V-T waveform extractions and specifications. Bob Fisher, Thomas wrote: > Bob, thanks for the response. Do I understand you correctly in that the > Vtt is pre-set (base on Vcc) within the model type, ‘output_ECL?’ If > this is the case, then it creates a problem for this particular model. > > > > Secondly, I am using the [Rising Waveform] and [Falling Waveform] but it > does not correct this problem. The VT tables are created from Spice > with 200 ohm resistors to ground. If ‘output_ECL’ is wanting to use the > pre-set Vtt = Vcc - 2V with 50 ohm resistors, this is a problem. > > > > Who could I contact that could explain how the ‘output_ECL’ model type > is constructed? Thanks. –T- > > > > > > > > Regards, > > Thomas Fisher > > Senior Systems Engineer > > Texas Instruments, Inc. Business: 214 480-3736 > > P.O. Box 660199 MS8710 Fax: 214 480-3160 > > Dallas, TX 75266-0199 tomfisher@ti.com > > > > > > Tom: > > My responses are in your text. > > Bob > > Fisher, Thomas wrote: > >> All, > > > > I have a PECL driver that I am modeling that has a non-standard load (pi > > network to ground) which results in a larger Vod. (1.2-V vs. 800mV) > > What happens during simulation is the single-ended waveform depicts a > > slowness of the rising edge which results in a plateau effect on the > > rise/fall of the differential waveform. (It looks great when simulating > > in TISpice) Most (P)ECL termination is going to be 50 ohms to Vtt for > > both non-inverting and inverting outputs whereas Vtt = Vcc – 2-V. Under > > the load I am simulating we are using 200 ohms to ground. (customers’ > > request) > > > > > > > > Having said that, looking in the 3.2 spec on page 78 under ramp rates > > model_type for output_ECL it mentions 50 ohm resistor to the termination > > voltage (Vterm = Vcc – 2-V). Is this Vterm embedded into the > > specification? > > Yes > > Is there a way to specify that the load is 200 ohms to >> ground? > > Yes, but you must use the [Rising Waveform] and [Falling Waveform] > method and describe the waveform. This will override the [Ramp] > keyword, which cannot correctly specify the situation you describe. > > I believe this might be causing the abnormality. Any >> help/insight would be appreciated. Thanks in advance. >> >> >> >> Regards, >> >> Tom Fisher >> >> >> > > -- > > Bob Ross > > Teraspeed Consulting Group LLC Teraspeed Consulting Group LLC > > 2926 SE Yamhill St. Device Modeling Division > > Portland, OR 97214 13610 SW Harness Lane > > 503-239-5536 Beaverton, OR 97008 > > http://www.teraspeed.com 503-430-1065 > > bob@teraspeed.com 503-246-8048 Direct > > ----------------------------------------------------------------- > > |For help or to subscribe/unsubscribe, email majordomo@eda.org > > > |with the appropriate command message(s) in the body: > > | > > | help > > | subscribe ibis > > | subscribe ibis-users > > | unsubscribe ibis > > | unsubscribe ibis-users > > | > > |or email a request to ibis-request@eda.org. > > | > > |IBIS reflector archives exist under: > > | > > | http://www.eda.org/pub/ibis/email_archive/ Recent > > | http://www.eda.org/pub/ibis/users_archive/ Recent > > | http://www.eda.org/pub/ibis/email/ E-mail since 1993 > > > - -- Bob Ross Teraspeed Consulting Group LLC Teraspeed Consulting Group LLC 2926 SE Yamhill St. Device Modeling Division Portland, OR 97214 13610 SW Harness Lane 503-239-5536 Beaverton, OR 97008 http://www.teraspeed.com 503-430-1065 bob@teraspeed.com 503-246-8048 Direct |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 15 Jan 2004 15:04:51 -0700 From: rrwolff@micron.com Subject: [IBIS-Users] [IBIS] Open forum minutes (01/09/04) DATE: 01/15/04 SUBJECT: January 9, 2004 EIA IBIS Open Forum Meeting Minutes VOTING MEMBERS AND 2004 PARTICIPANTS Ansoft Corporation (Eric Bracken) Apple Computer (To Be Determined) Applied Simulation Technology (Fred Balistreri) Cadence Design Systems Lance Wang* Cisco Systems Syed Huq* Fairchild Semiconductor (Graham Connolly) Hitachi ULSI Systems (Kazuyoshi Shoji) Huawei Technologies (Jiang Xiang Zhong) Intel Corporation Michael Mirmak*, Arpad Muranyi* LSI Logic Frank Gasparik* Matsushita (Panasonic) (Atsuji Ito) Mentor Graphics Guy de Burgh*, Ian Dodd* John Angulo* Micron Technology Randy Wolff* Molex Incorporated (Gus Panella) Motorola (Rick Kingen) National Semiconductor (Lee Sledjeski) NEC Electric Corporation (Itsuki Yamada) North East Systems Associates (Edward Sayre) Philips Semiconductor (D.C. Sessions) Samtec (Corey Kimble) Siemens AG (Eckhard Lenski) Signal Integrity Software (Bob Haller) Sigrity (Raymond Chen) Sun Microsystems (Tim Coyle) Synopsys (Hailong Wang) Texas Instruments (Thomas Fisher) Teraspeed Bob Ross* Time Domain Analysis Systems (Dima Smolyansky) Zuken (& Incases) (Michael Schaeder) OTHER PARTICIPANTS IN 2004: GEIA (Chris Denham) Green Streak Programs Lynne Green* In the list above, attendees at the meeting are indicated by *. Principal members or other active members who have not attended are in parentheses. Participants who no longer are in the organization are in square brackets. UPCOMING MEETINGS The bridge numbers for future IBIS teleconferences are as follows: Date Telephone Number Bridge # Passcode January 30, 2004 1-916-356-2663 3 588-9637 February 2, 2004 DesignCon SUMMIT, Santa Clara, CA NO PHONE BRIDGE February 20, 2004 European SUMMIT, Paris, France NO PHONE BRIDGE February 20, 2004 1-916-356-3663 Numbers to be determined All meetings are 8:00 AM to 9:55 AM US Pacific Time. Meeting agendas are typically distributed seven days before each Open Forum. Minutes are typically distributed within seven days of the corresponding meeting. When calling into the meeting, provide the bridge number and passcode at the automated prompts. If asked by an operator, please request to join the IBIS Open Forum hosted by Michael Mirmak. For international dial-in numbers, please contact Michael Mirmak. NOTE: "AR" = Action Required. - -------------------------------- MINUTES----------------------------------- INTRODUCTIONS AND MEETING QUORUM New participant Lance Wang of Cadence Design Systems introduced himself. While he has attended previous summit meetings, this meeting was his first Open Forum. CALL FOR PATENTS Michael Mirmak called for any patents or pending patents related to the IBIS Version 4.0, 4.1, or ICM 1.0 specifications. No patents were declared. MEMBERSHIP UPDATE AND TREASURER'S REPORT Michael Mirmak mentioned that Open Forum membership remained at 28 organizations through the end of 2003. He met personally with GEIA representatives at their headquarters in early January and confirmed that the 2004 membership invoices had been completed and mailed. The Open Forum is to expect the 2003 annual financial statement in mid February. Michael also reported that the 2004 membership drive has already resulted in several renewal commitments from current members and one new member. Bob Ross noted that Samtec has joined as a new member in 2004 and has a membership invoice in processing. Syed Huq reported that the IBIS roster listing has been updated and a Samtec logo is being added to the virtual poster. REVIEW OF MINUTES AND ARS The December 5, 2003 meeting minutes were approved with no changes. Michael Mirmak noted that the GEIA archives copies of the IBIS Open Forum minutes after approval by the GEIA counsel. MISCELLANY/ANNOUNCEMENTS No additional announcements were made. PRESS AND WEB PAGE UPDATES In response to a question, Syed Huq noted that the EIGROUP web site updates have not yet been posted, as the EIGROUP web administrator has recently changed. Bob Ross suggested that the new EIGROUP administrator be reminded that the IBIS Open Forum expects a one-day response on web site update requests. Bob also mentioned that Arpad Muranyi's latest IBIS training foils have been posted to the EDA site. Arpad Muranyi inquired about the format of the BIRD reports on the IBIS eda.org website. At present, none of the files has a .txt extension identifying as a text file to internet browsers. As a result, the files can cause a variety of inconvenient barriers to easy viewing. Ian Dodd noted that certain Mentor products use numerical file extension associations and often attempt to open BIRD reports viewed online. Michael Mirmak accepted the AR to add .txt extensions to the existing BIRD reports and to confirm with Arpad that the fix resolves the problem. NEW MODELS AVAILABLE, LIBRARY UPDATE No new models received. OPENS FOR NEW ISSUES No new issues. MAILING LIST ADMINISTRATION John Angulo reported that the ibis-request, ibis-info, ibis-bug and icm-bug mailing list reflectors are now handled entirely under majordomo. Passwords and other administrative details have been distributed appropriately. John also noted that Randy Harr of eda.org reported that the eda.org servers crashed on or about December 22. The archive used to restore the IBIS directories showed only a few differences due to recent reflector messages and HTML updates. In response to a question, Bob Ross observed that the reflectors have between 400 and 450 subscribers. INTERNATIONAL/EXTERNAL PROGRESS - - JEDEC Activity Report Lynne Green reported that she will present to the JEDEX conference on IBIS during the week of April 15, 2004. - - FSA Modeling Committee Lynne Green reported that she will present a talk on IBIS quality to the Fabless Semiconductor Association in San Jose during the week of April 15, 2004. The Fabless Semiconductor Association can be found at: http://www.fsa.org - - Other Activities No update DESIGNCON 2004 SUMMIT PLANNING Lynne Green reported that a draft agenda for the DesignCon Summit has been prepared and a third call for papers has been distributed. A fourth call will be issued during the week of January 12. Michael Mirmak reported that, thanks to the efforts of Syed Huq, Cisco has kindly agreed to provide refreshments for the summit. Michael thanked Syed and Cisco for their contribution. Bob Ross observed that Guy de Burgh may wish to send out another reminder to member organizations to provide logos for the display booth. In addition, Lynne Green reminded attendees to register with her for the summit if they had not already done so. Syed Huq confirmed that he will be making paper copies of presentations for distribution at the summit. Syed requests that all presentation materials be sent to him no later than one week before the summit. Paper copies will be printed two slides per double-sided page. EUROPEAN DATE SUMMIT PLANNING Bob Ross reported that a third DATE announcement has been distributed and six speakers are tentatively scheduled to present, on topics including ICEM and applications of multi-lingual technologies. Cadence Design Systems, Mentor Graphics and Zuken are collaborating to sponsor the IBIS Summit which will take place on Friday, February 20, 2004 in Paris. The summit will run from 9 AM to 2 PM Paris local time. Potential speakers and participants are welcome to contact Ralf Bruening of Zuken or Bob for further details. Thanks again to Ralf and to Eckhard Lenski of Siemens for arranging the summit. OTHER SUMMITS Bob Ross noted that the annual DAC meeting, at which IBIS officer elections have taken place in the past, will be held in San Diego in June 2004. Additionally, a DesignCon conference will be held in Manchester, New Hampshire on the US East Coast in April 2004. Bob suggested that a summit might be held during this DesignCon in a similar fashion to the summit held in October 2003. For such a summit, the logistics associated with a booth may be more profitably applied toward a teleconference bridge. East Coast organizations such as SiSoft, NESA or Cadence may be interested in hosting the meeting. Michael accepted the AR to investigate this further and to contact the appropriate organizations. Bob also noted that a DesignCon for Europe was being planned for October, most likely in Munich. IBIS VERSION 4.0 PARSER FUNDING AND STATUS Michael Mirmak reported that the invoice for the 4.0.1 parser has been received and filed for payment with the GEIA. The 4.0.1 parser executables were posted and distributed in December, 2003. IBIS 4.0 parser work is therefore considered closed until BUG reports, if any, are filed for the 4.0.1 version. IBIS QUALITY COMMITTEE Bob Ross reported that meetings continue every two weeks, with the next scheduled for January 13. A meeting was announced for December 30, but was quickly adjourned due to lack of attendance. Edits continue on the comprehensive quality guidelines and checklist document. No formal title has yet been assigned to the document. A report on the committee's progress will be delivered at the DesignCon summit. IBIS MODEL REVIEW COMMITTEE Lynne Green reported that no new models have been received by the committee since the last meeting. She noted that Lance Wang is the new model reviewer from Cadence Design Systems. Lynne accepted the AR to ensure that the website reflects this. S2IBIS3 Bob Ross reports no changes since the last meeting. S2IBIS3 beta executables can be downloaded from: http://www.ece.ncsu.edu/erl/ibis/s2ibis3/s2ibis3.htm Feedback on the current beta version is appreciated and encouraged. ICM SPECIFICATION AND PARSER STATUS Michael Mirmak again raised the issue of a specification change process for ICM, similar to the IBIS BIRD process. The BIRD (Buffer Issue Resolution Document) acronym, however, clearly cannot apply. The members present suggested a variety of names, including IIRD (ICM Issue Resolution Document), ICM-RD (ICM Resolution Document) and even ICHABOD. Lynne Green suggested, due to time constraints, that all suggestions be sent to Michael Mirmak for consideration. The new name will be announced by Michael at the next meeting. NEW ADMINISTRATIVE ISSUES No new issues. BIRD85.3: SLEW TIME CLARIFICATIONS John Angulo introduced BIRD85.3, an update to BIRD85. The revised text clearly states that the Rload subparameter is ignored if [Ramp] is used under an [External Model]. No additional comments or questions were raised. Michael Mirmak called for a formal vote. The BIRD was approved unanimously and will be included in the draft text of version 4.1 of the IBIS specification. BIRD86.1: CLARIFICATION OF SUBMODEL MODE Lynne Green introduced BIRD86.1, an update to BIRD86. The revised text adds a paragraph to explain the available Submodel modes, but now simply brings the specification into conformance with current parser behavior. No additional comments or questions were raised. Michael Mirmak called for a formal vote. The BIRD was approved unanimously and will be included in the draft text of version 4.1 of the IBIS specification. IBIS VERSION 4.1 FOURTH READING Michael Mirmak announced the fourth official "reading" of the IBIS 4.1 specification, and called for comments. Bob Ross volunteered to add the two approved BIRDs to the 4.1 draft and post the updated text. At present, a 4.1D edition is posted. Michael raised the issue of an approval vote. According to Open Forum bylaws, documents requiring approval votes must be publicly available for at least two weeks, to allow for adequate review. Lynne Green suggested that at least one meeting be held to discuss a stable version of the draft specification before any vote. Michael noted that a vote could take place at the IBIS Summit in February; Bob confirmed that at least one previous version of the specification was approved through a summit vote. Ian Dodd voiced the opinion that such face-to-face meetings may not be the best venue for deciding such issues, as discussions of relatively minor issues might prevent the vote from ever taking place. Bob and Arpad Muranyi suggested that a stable review draft, including the latest BIRDs, be posted within one week of this meeting. This would allow two weeks of review before the January 30 Open Forum. If issues arose at that meeting which would prevent an approval vote, further discussion could take place at the summit. This plan was adopted without objection. Draft copies of version 4.1 are available in a variety of formats at: http://www.eda.org/pub/ibis/ver4.1_wip/ BUG80 John Angulo summarized the current state of BUG80. The BUG applies a more strict interpretation of keyword hierarchies than is made explicit in the specification. In addition, the BUG error message could be clarified. Arpad noted that he was working on a clarification of [Model Selector] and series element keywords, as the [Series Pin Mapping] definition does not clearly state its relationship with [Model Selector]. Bob agreed that some sort of BIRD would be required to clarify many of the top-level keywords' scopes, including perhaps adding a hierarchy tree explicitly to the specification, as Michael has suggested in the past. The BUG report will remain open until one or more BIRDs are issued to clarify the affected keyword scopes. NEXT MEETING The next Open Forum teleconference has been scheduled for January 30, 2004 from 8:00 AM to 10:00 AM US Pacific Standard Time. A vote regarding the approval of IBIS 4.1 is scheduled. The next IBIS Summit will take place at DesignCon 2004 on February 2, 2004 at the Santa Clara Convention Center, California. ======================================================================== ==== NOTES IBIS CHAIR: Michael Mirmak (916) 356-4261, Fax: (916) 377-1046 michael.mirmak@intel.com Senior Analog Engineer, Intel Corporation M/S FM6-45 1900 Prairie City Rd. Folsom, CA 95630 VICE CHAIR: Lynne Green (425) 788-0412, Fax (425) 788-4289 lgreen22@mindspring.com Green Streak Programs 320 120th Ave NE, Suite B-103, Bellevue, WA 98005-3016 SECRETARY: Randy Wolff (208) 363-1764, Fax: (208) 368-3475 rrwolff@micron.com Simulation Engineer, Micron Technology, Inc. 8000 S. Federal Way Mail Stop: 1-711 Boise, ID 83707-0006 LIBRARIAN: Roy Leventhal (847) 590-9398 roy.leventhal@ieee.org Consultant, Leventhal Design and Communications 1924 North Burke Drive Arlington Heights, Illinois 60004 WEBMASTER: Syed Huq (408) 525-3399, Fax: (408) 526-5504 shuq@cisco.com Manager, Hardware Engineering, Cisco Systems 170 West Tasman Drive San Jose, CA 95134-1706 POSTMASTER: John Angulo (425) 497-5077, Fax: (425) 881-1008 John_angulo@mentor.com Development Engineer, Mentor Graphics 14715 N.E. 95th Street, Suite 200 Redmond, WA 98052 This meeting was conducted in accordance with the EIA Legal Guides and EIA Manual of Organization and Procedure. The following e-mail addresses are used: majordomo@eda.org In the body, for the IBIS Open Forum Reflector: subscribe ibis In the body, for the IBIS Users' Group Reflector: subscribe ibis-users Help and other commands: help ibis-request@eda.org To join, change, or drop from either the IBIS Open Forum Reflector (ibis@eda.org), the IBIS Users' Group Reflector (ibis-users@eda.org) or both. State your request. ibis-info@eda.org To obtain general information about IBIS, to ask specific questions for individual response, and to inquire about joining the EIA-IBIS Open Forum as a full Member. ibis@eda.org To send a message to the general IBIS Open Forum Reflector. This is used mostly for IBIS Standardization business and future IBIS technical enhancements. Job posting information is not permitted. ibis-users@eda.org To send a message to the IBIS Users' Group Reflector. This is used mostly for IBIS clarification, current modeling issues, and general user concerns. Job posting information is not permitted. ibis-bug@eda.org To report ibischk3 parser bugs. The Bug Report Form Resides on eda.org in /pub/ibis/bugs/ibis_bugs/bugform.txt along with reported bugs. icm-bug@eda.org To report icmchk1 parser bugs. The Bug Report Form Resides on eda.org in /pub/ibis/bugs/icm_bugs/icm_bugform.txt along with reported bugs. To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt, /pub/ibis/bugs/s2ibis2/bugs2i2.txt and /pub/ibis/bugs/s2iplt/bugsplt.txt respectively. Information on IBIS technical contents, IBIS participants and actual IBIS models are available on the IBIS Home page: http://www.eigroup.org/ibis/ibis.htm Check the IBIS file directory on eda.org for more information on previous discussions and results: http://www.eda.org/pub/ibis/directory.html Other brands and names are the property of their respective owners. |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 15 Jan 2004 17:01:22 -0800 From: Bob Ross Subject: [IBIS-Users] Re: [IBIS] ECL Termination Voltage Question Hi Mike: [Ramp] is required for the IBIS compliance even when V-T tables are provided. Most EDA tools rely on this requirement to make use of the ramp information. When V-T tables were added to IBIS we decided to continue requiring [Ramp] so that users had a backup method to use the model for EDA tools that had not yet implemented the V-T support. But we also chose to not add anymore features to [Ramp] because a "full featured" [Ramp] would still be less accurate than the corresponding V-T table information. My other responses are in your text. Bob Michael Sachtjen wrote: > Bob, > > You have a lot more experience with IBIS than I, but > your statement "[Ramp] is not used when you have V-T > tables" seem misleading. It's my understanding that > the simulators (Cadence at least) need to know the > switching time and dV from the [Ramp] even though > waveforms are provided? Please correct me if I'm > wrong. You are correct. Most EDA tools still used the [Ramp] information because it is a required keyword. > > I don't mean to confuse the issue; I know this thread > is not about the Ramp. I only want to clearify that > you can't just put 1/1 in for the ramp if you have V-T > tables. You are correct. Even if V-T tables are provided, the [Ramp] information still needs to be realistic. > > - Mike > [.... deleted messages ....] - -- Bob Ross Teraspeed Consulting Group LLC Teraspeed Consulting Group LLC 2926 SE Yamhill St. Device Modeling Division Portland, OR 97214 13610 SW Harness Lane 503-239-5536 Beaverton, OR 97008 http://www.teraspeed.com 503-430-1065 bob@teraspeed.com 503-246-8048 Direct |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 15 Jan 2004 16:23:59 -0800 (PST) From: Michael Sachtjen Subject: [IBIS-Users] Re: [IBIS] ECL Termination Voltage Question Bob, You have a lot more experience with IBIS than I, but your statement "[Ramp] is not used when you have V-T tables" seem misleading. It's my understanding that the simulators (Cadence at least) need to know the switching time and dV from the [Ramp] even though waveforms are provided? Please correct me if I'm wrong. I don't mean to confuse the issue; I know this thread is not about the Ramp. I only want to clearify that you can't just put 1/1 in for the ramp if you have V-T tables. - - Mike - --- Bob Ross wrote: > Hi Tom: > > The preset Vtt is not a problem because it is for > the [Ramp] > only, and the [Ramp] is not used when you have V-T > tables. > > The switching shape problem was based on another > issue which we > have been we been communicating with you privately. > > Since the application is differential with 100 ohms > differential > and 200 ohms to GND, a better V-T specification > would still > be using the single-ended V-fixture to some > equivalent Vtt > voltage and the R_fixture at around 50 ohms or > lower. This > will be closer to the actual differential switching > conditions > for the V-T waveform extractions and specifications. > > Bob > > > > > Fisher, Thomas wrote: > > > Bob, thanks for the response. Do I understand you > correctly in that the > > Vtt is pre-set (base on Vcc) within the model > type, ‘output_ECL?’ If > > this is the case, then it creates a problem for > this particular model. > > > > > > > > Secondly, I am using the [Rising Waveform] and > [Falling Waveform] but it > > does not correct this problem. The VT tables are > created from Spice > > with 200 ohm resistors to ground. If ‘output_ECL’ > is wanting to use the > > pre-set Vtt = Vcc - 2V with 50 ohm resistors, this > is a problem. > > > > > > > > Who could I contact that could explain how the > ‘output_ECL’ model type > > is constructed? Thanks. –T- > > > > > > > > > > > > > > > > Regards, > > > > Thomas Fisher > > > > Senior Systems Engineer > > > > Texas Instruments, Inc. Business: 214 > 480-3736 > > > > P.O. Box 660199 MS8710 Fax: 214 > 480-3160 > > > > Dallas, TX 75266-0199 tomfisher@ti.com > > > > > > > > > > > > > Tom: > > > > My responses are in your text. > > > > Bob > > > > Fisher, Thomas wrote: > > > >> All, > > > > > > I have a PECL driver that I am modeling that > has a non-standard load (pi > > > network to ground) which results in a larger > Vod. (1.2-V vs. 800mV) > > > What happens during simulation is the > single-ended waveform depicts a > > > slowness of the rising edge which results in a > plateau effect on the > > > rise/fall of the differential waveform. (It > looks great when simulating > > > in TISpice) Most (P)ECL termination is going to > be 50 ohms to Vtt for > > > both non-inverting and inverting outputs > whereas Vtt = Vcc – 2-V. Under > > > the load I am simulating we are using 200 ohms > to ground. (customers’ > > > request) > > > > > > > > > > > > Having said that, looking in the 3.2 spec on > page 78 under ramp rates > > > model_type for output_ECL it mentions 50 ohm > resistor to the termination > > > voltage (Vterm = Vcc – 2-V). Is this Vterm > embedded into the > > > specification? > > > > Yes > > > > Is there a way to specify that the load is 200 > ohms to > >> ground? > > > > Yes, but you must use the [Rising Waveform] and > [Falling Waveform] > > method and describe the waveform. This will > override the [Ramp] > > keyword, which cannot correctly specify the > situation you describe. > > > > I believe this might be causing the abnormality. > Any > >> help/insight would be appreciated. Thanks in > advance. > >> > >> > >> > >> Regards, > >> > >> Tom Fisher > >> > >> > >> > > > > -- > > > > Bob Ross > > > > Teraspeed Consulting Group LLC Teraspeed > Consulting Group LLC > > > > 2926 SE Yamhill St. Device Modeling > Division > > > > Portland, OR 97214 13610 SW > Harness Lane > > > > 503-239-5536 Beaverton, OR > 97008 > > > > http://www.teraspeed.com 503-430-1065 > > > > bob@teraspeed.com > > 503-246-8048 Direct > > > > > - ----------------------------------------------------------------- > > > > |For help or to subscribe/unsubscribe, email > majordomo@eda.org > > > > > > > |with the appropriate command message(s) in the > body: > > > > | > > > > | help > > > > | subscribe ibis address, if different> > > > > | subscribe ibis-users address, if different> > > > > | unsubscribe ibis address, if different> > > > > | unsubscribe ibis-users address, if different> > > > > | > > > > |or email a request to ibis-request@eda.org. > > > > | > > > > |IBIS reflector archives exist under: > > > === message truncated === __________________________________ Do you Yahoo!? Yahoo! Hotjobs: Enter the "Signing Bonus" Sweepstakes http://hotjobs.sweepstakes.yahoo.com/signingbonus |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 15 Jan 2004 18:50:26 -0800 From: "Tom Dagostino" Subject: [IBIS-Users] RE: [IBIS] ECL Termination Voltage Question If VT waveforms are present in the model the Ramp data is not used for the main simulation but is sometimes used by auxiliary functions in the simulator. Tom Dagostino Teraspeed Consulting Group LLC Device Modeling Division 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com Teraspeed Consulting Group LLC 2926 SE Yamhill St. Portland, OR 97214 http://www.teraspeed.com - -----Original Message----- From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org]On Behalf Of Michael Sachtjen Sent: Thursday, January 15, 2004 4:24 PM To: Bob Ross Cc: 'ibis@eda.org'; 'ibis-users@eda.org' Subject: Re: [IBIS] ECL Termination Voltage Question Bob, You have a lot more experience with IBIS than I, but your statement "[Ramp] is not used when you have V-T tables" seem misleading. It's my understanding that the simulators (Cadence at least) need to know the switching time and dV from the [Ramp] even though waveforms are provided? Please correct me if I'm wrong. I don't mean to confuse the issue; I know this thread is not about the Ramp. I only want to clearify that you can't just put 1/1 in for the ramp if you have V-T tables. - - Mike - --- Bob Ross wrote: > Hi Tom: > > The preset Vtt is not a problem because it is for > the [Ramp] > only, and the [Ramp] is not used when you have V-T > tables. > > The switching shape problem was based on another > issue which we > have been we been communicating with you privately. > > Since the application is differential with 100 ohms > differential > and 200 ohms to GND, a better V-T specification > would still > be using the single-ended V-fixture to some > equivalent Vtt > voltage and the R_fixture at around 50 ohms or > lower. This > will be closer to the actual differential switching > conditions > for the V-T waveform extractions and specifications. > > Bob > > > > > Fisher, Thomas wrote: > > > Bob, thanks for the response. Do I understand you > correctly in that the > > Vtt is pre-set (base on Vcc) within the model > type, output_ECL? If > > this is the case, then it creates a problem for > this particular model. > > > > > > > > Secondly, I am using the [Rising Waveform] and > [Falling Waveform] but it > > does not correct this problem. The VT tables are > created from Spice > > with 200 ohm resistors to ground. If output_ECL > is wanting to use the > > pre-set Vtt = Vcc - 2V with 50 ohm resistors, this > is a problem. > > > > > > > > Who could I contact that could explain how the > output_ECL model type > > is constructed? Thanks. T- > > > > > > > > > > > > > > > > Regards, > > > > Thomas Fisher > > > > Senior Systems Engineer > > > > Texas Instruments, Inc. Business: 214 > 480-3736 > > > > P.O. Box 660199 MS8710 Fax: 214 > 480-3160 > > > > Dallas, TX 75266-0199 tomfisher@ti.com > > > > > > > > > > > > > Tom: > > > > My responses are in your text. > > > > Bob > > > > Fisher, Thomas wrote: > > > >> All, > > > > > > I have a PECL driver that I am modeling that > has a non-standard load (pi > > > network to ground) which results in a larger > Vod. (1.2-V vs. 800mV) > > > What happens during simulation is the > single-ended waveform depicts a > > > slowness of the rising edge which results in a > plateau effect on the > > > rise/fall of the differential waveform. (It > looks great when simulating > > > in TISpice) Most (P)ECL termination is going to > be 50 ohms to Vtt for > > > both non-inverting and inverting outputs > whereas Vtt = Vcc  2-V. Under > > > the load I am simulating we are using 200 ohms > to ground. (customers > > > request) > > > > > > > > > > > > Having said that, looking in the 3.2 spec on > page 78 under ramp rates > > > model_type for output_ECL it mentions 50 ohm > resistor to the termination > > > voltage (Vterm = Vcc  2-V). Is this Vterm > embedded into the > > > specification? > > > > Yes > > > > Is there a way to specify that the load is 200 > ohms to > >> ground? > > > > Yes, but you must use the [Rising Waveform] and > [Falling Waveform] > > method and describe the waveform. This will > override the [Ramp] > > keyword, which cannot correctly specify the > situation you describe. > > > > I believe this might be causing the abnormality. > Any > >> help/insight would be appreciated. Thanks in > advance. > >> > >> > >> > >> Regards, > >> > >> Tom Fisher > >> > >> > >> > > > > -- > > > > Bob Ross > > > > Teraspeed Consulting Group LLC Teraspeed > Consulting Group LLC > > > > 2926 SE Yamhill St. Device Modeling > Division > > > > Portland, OR 97214 13610 SW > Harness Lane > > > > 503-239-5536 Beaverton, OR > 97008 > > > > http://www.teraspeed.com 503-430-1065 > > > > bob@teraspeed.com > > 503-246-8048 Direct > > > > > - ----------------------------------------------------------------- > > > > |For help or to subscribe/unsubscribe, email > majordomo@eda.org > > > > > > > |with the appropriate command message(s) in the > body: > > > > | > > > > | help > > > > | subscribe ibis address, if different> > > > > | subscribe ibis-users address, if different> > > > > | unsubscribe ibis address, if different> > > > > | unsubscribe ibis-users address, if different> > > > > | > > > > |or email a request to ibis-request@eda.org. > > > > | > > > > |IBIS reflector archives exist under: > > > === message truncated === __________________________________ Do you Yahoo!? Yahoo! Hotjobs: Enter the "Signing Bonus" Sweepstakes http://hotjobs.sweepstakes.yahoo.com/signingbonus - ----------------------------------------------------------------- |For help or to subscribe/unsubscribe, email majordomo@eda.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: 15 Jan 2004 19:20:00 -0800 From: "Lynne D. Green" Subject: [IBIS-Users] Re: Ramp use - was ECL Termination Voltage Question Hi, Michael, Most of the EDA tools use [Ramp] to estimate such things as initial simulation time step. [Ramp] might be used in other algorithms used (prior to simulation) by some EDA tools. This is why it is important to have reasonable values for [Ramp] subparameters. As Bob mentioned, most tools will not use [Ramp] data during actual simulation when V-t tables are available. Best regards, Lynne Dr. Lynne Green lgreen22@mindspring.com On Thu, 2004-01-15 at 16:23, Michael Sachtjen wrote: > Bob, > > You have a lot more experience with IBIS than I, but > your statement "[Ramp] is not used when you have V-T > tables" seem misleading. It's my understanding that > the simulators (Cadence at least) need to know the > switching time and dV from the [Ramp] even though > waveforms are provided? Please correct me if I'm > wrong. > > I don't mean to confuse the issue; I know this thread > is not about the Ramp. I only want to clearify that > you can't just put 1/1 in for the ramp if you have V-T > tables. > > - Mike |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: 16 Jan 2004 09:57:51 -0800 From: "Lynne D. Green" Subject: [IBIS-Users] Fourth Call for Papers, IBIS Summit at DesignCon - ----------------------------------------------------------------------- IBIS SUMMIT at DesignCon FOURTH CALL FOR PARTICIPATION & PRESENTATIONS - ----------------------------------------------------------------------- I B I S S U M M I T M E E T I N G Time/Date: Monday February 2, 2004 8:00 AM to 5 PM Location: Santa Clara Convention Center Santa Clara, CA Content: Presentations and Discussions Purpose: Solicit and Exchange IBIS Model Related Information and Ideas. Sponsors: DesignCon, Cisco If your company would be interested in sponsoring this event, please contact Lynne Green . Benefits to sponsors include formal recognition at the meeting and acknowledgement in the Calls for Papers and meeting minutes. Your financial support strengthens the organization by allowing IBIS to focus resources on industry activities rather than raising money, and you will receive generous thanks for your support. DesignCon Conference February 2-5, 2004 Santa Clara Convention Center Santa Clara, CA You must register to attend the lunch on Monday (details below). Exhibit registration is Free if you register before December 19, 2003. See for more information. BACKGROUND DesignCon is the premier annual Silicon Valley event for the electronic design automation (EDA) and semiconductor industry. Topics of current interest to the EIA IBIS Open Forum are addressed at DesignCon. This meeting will be conducted as a formal IBIS Summit Meeting. Presentations are expected to be available and archived in an electronic format, and minutes of the meeting will be issued. Any pending formal decisions (votes) will be announced at least two weeks prior to the meeting. CALL FOR PARTICIPANTS People involved in IBIS Model development, EDA tool development, and digital circuit design are invited to participate in the Summit meeting. If you plan to participate, please register with the information below: Name: E-mail address: Company: Telephone: Send to: Lynne Green Those wishing to attend lunch at the 2004 DesignCon IBIS Summit must register for DesignCon at the link below. This is a separate registration from the IBIS Summit registration. The IBIS Summit attendees who have registered with DesignCon will attend lunch and the TechForum keynote speech on Monday. The speaker is Jan Rabaey of UC, Berkeley. CALL FOR PRESENTATIONS We are seeking presentations from individuals who have experiences of interest to the IBIS modeling community. In the past, these have included demonstrations of modeling techniques, explanations of behavioral algorithms and descriptions of difficulties encountered in specific applications. Of particular interest are topics related to model correlation, modeling building experiences and comparisons to other modeling methods. Presentations may be addressed to any and all levels of IBIS experience, from beginning to advanced. Format of Presentation: LCD Projection with Windows laptop. Time: 15-30 Minutes Electronic Archival: We request electronic versions so that the presentations can be archived and also made available to non-attendees. Formats used in the past have been text, Power Point, Word, Postscript, and Acrobat. Electronic presentations should be made available by January 26, 2004 for uploading and copying to the presentation laptop. If you plan a presentation, please supply Title: Presenter: E-mail address: Company: Telephone: Estimated Time: Send this to: Lynne Green AGENDA The agenda includes presentations, discussions, breaks, and a luncheon (registration with DesignCon required for lunch). This will be developed as presentation proposals are received. The following individuals have signed up to present at the summit (presentation titles are tentative). - IBIS Chair's Report, Michael Mirmak, Intel - IBIS Futures Roadmap, Michael Mirmak, Intel - The IBIS Quality Document, Bob Haller & Barry Katz, SiSoft - Adding On-Chip Capacitance in IBIS Format for SSO Simulation, Raymond Chen, Sigrity - IBIS Die V-T Tables from Part or Board Measurements, Bob Ross, Teraspeed - Creating IBIS Models for Stacked Packages, Steve Peterson, Intel Lunch: The IBIS Summit attendees who have registered with DesignCon will attend the lunch and TechForum keynote speech on Monday. LIST OF NEARBY HOTELS See for travel directions, hotels and other information. - ----------------------------------------------------------------- |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: 16 Jan 2004 11:01:03 -0800 From: "Lynne D. Green" Subject: [IBIS-Users] Registration Update, IBIS Summit at DesignCon Registration for the IBIS Summit lunch is FREE until Friday January 30th, courtesy of DesignCon, an IBIS Summit sponsor. Please be sure to check the "IBIS Users' Group Meeting" near the bottom of the DesignCon registration page: http://www.designcon.com/registration/index.html The IBIS Summit attendees who have registered with DesignCon will attend lunch and the TechForum keynote speech on Monday. The speaker is Jan Rabaey of UC, Berkeley. http://www.designcon.com/conference/keynote_2-2-2004.html |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 16 Jan 2004 15:36:53 -0800 From: "Angulo, John" Subject: [IBIS-Users] Verilog_AMS models The following is posted on behalf of Fabrizio Zanella at Broadbus Technologies. Please send any private replies to fzanella@broadbus.com - ------------------------------------------------- I see that VHDL AMS and Verilog AMS models are included in IBIS 4.1. Can someone describe what these models are or point me to a web site where I can find information on them? Thanks and regards, Fabrizio Zanella Principal Hardware Design Engineer Broadbus Technologies fzanella@broadbus.com |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 16 Jan 2004 15:37:01 -0800 From: "Angulo, John" Subject: [IBIS-Users] RE: Verilog_AMS models The following is posted on behalf of Michael Mirmak at Intel Corp. Please send any private replies to michael.mirmak@intel.com - ------------------------------------------------- Fabrizio, There are a variety of sources for VHDL-AMS and Verilog-AMS information available: - - The IEEE 1076.1 Working Group (VHDL-AMS is an IEEE specification): http://www.eda.org/vhdl-ams/ - - The Accellera Verilog Analog Mixed-Signal Group: http://www.eda.org/verilog-ams/ - - Book: "The System Designer's Guide to VHDL-AMS" published by Morgan Kaufmann (http://www.mkp.com/). Note that Mentor Graphics is a contributor - - Most vendors of tools supporting *-AMS, including Cadence, Mentor Graphics and Synopsys, offer training classes on one or both languages, - - There are several presentations on VHDL/Verilog-AMS applications in our most recent summit archives: http://www.eda.org/pub/ibis/summits/jun03a and .../jun03b I hope this helps! - - Michael Mirmak Intel Corp. Chair, EIA/IBIS Open Forum |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 16 Jan 2004 16:14:29 -0800 From: "Muranyi, Arpad" Subject: RE: [IBIS-Users] Verilog_AMS models Fabrizio, You can also look at the presentation http://www.eda.org/pub/ibis/summits/jun03a/muranyi1.pdf and the two accompanying files http://www.eda.org/pub/ibis/summits/jun03a/IBIS_basic_IO.vhd and http://www.eda.org/pub/ibis/summits/jun03a/IBIS_multiVt_IO.vhd Arpad Muranyi Intel Corporation ================================================================ - -----Original Message----- From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On Behalf Of Angulo, John Sent: Friday, January 16, 2004 3:37 PM To: 'ibis-users@eda.org' Subject: [IBIS-Users] Verilog_AMS models The following is posted on behalf of Fabrizio Zanella at Broadbus Technologies. Please send any private replies to fzanella@broadbus.com - ------------------------------------------------- I see that VHDL AMS and Verilog AMS models are included in IBIS 4.1. Can someone describe what these models are or point me to a web site where I can find information on them? Thanks and regards, Fabrizio Zanella Principal Hardware Design Engineer Broadbus Technologies fzanella@broadbus.com |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 19 Jan 2004 08:37:05 -0800 From: "Mirmak, Michael" Subject: [IBIS-Users] BIRD87 - Series Pin Mapping Clarifications This is a multi-part message in MIME format. - ------_=_NextPart_001_01C3DEAA.7963BB38 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable The enclosed document, BIRD87, is posted on behalf of Arpad Muranyi of=20 Intel Corporation. It will be introduced at the January 30, 2004 IBIS=20 Open Forum teleconference. - - Michael Mirmak Intel Corp. Chair, EIA/IBIS Open Forum ************************************************************************ **** ************************************************************************ **** BUFFER ISSUE RESOLUTION DOCUMENT (BIRD) BIRD ID#: BIRD87 ISSUE TITLE: Series Pin Mapping Clarifications REQUESTOR: Arpad Muranyi, Intel Corporation DATE SUBMITTED: January 19, 2004 DATE REVISED: =20 DATE ACCEPTED BY IBIS OPEN FORUM: Pending =20 ************************************************************************ **** ************************************************************************ **** STATEMENT OF THE ISSUE: The usage rules of the [Series Pin Mapping] keyword in the IBIS 4.0/4.1 specification fails to mention that the third column (model_name) may also reference a [Model Selector] name, not just [Model] name. Also, the usage rules section does not mention whether using the same pin name in multiple associations with models or model selectors is prohibited or not. Strictly speaking, the absent prohibition implies that it is allowed, but spelling out this rule could eliminate questions and confusion. ************************************************************************ **** STATEMENT OF THE RESOLVED SPECIFICATIONS: Add a few more words to the usage rules as shown below to clarify the issues mentioned above. Changes are marked with the * characters at the beginning of each line. |=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D | Keyword: [Series Pin Mapping] | Required: No | Description: Used to associate two pins joined by a series model. | Sub-Params: pin_2, model_name, function_table_group | Usage Rules: Enter only series pin pairs. The first column, [Series Pin | Mapping], contains the series pin for which input impedances | are measured. The second column, pin_2, contains the other | connection of the series model. Each pin must match the pin | names declared previously in the [Pin] section of the IBIS |* file. The third column, model_name, associates models of |* type Series or Series_switch, or model selectors containing |* references to models of type Series or Series_switch for |* the pair of pins in the first two columns. Each model_name |* must have a corresponding model or model selector name=20 |* listed in a [Model] or [Model Selector] keyword below. The |* usage of reserved model names (POWER, GND, or NC) within the |* [Series Pin Mapping] keyword is not allowed. The fourth | column, function_table_group, contains an alphanumeric | designator string to associate those sets of Series_switch | pins that are switched together. | | Each line must contain either three or four columns. When | using four columns, the header function_table_group must be | listed. =20 | | One possible application is to model crossbar switches where | the straight through On paths are indicated by one=20 | designator and the cross over On paths are indicated by=20 | another designator. If the model referenced is a Series | model, then the function_table_group entry is omitted. |=20 | The column length limits are: | [Series Pin Mapping] 5 characters max | pin_2 5 characters max | model_name 20 characters max | function_table_group 20 characters max | | Other Notes: If the model_name is for a non-symmetrical series model, | then the order of the pins is important. The [Series Pin | Mapping] and pin_2 entries must be in the columns that | correspond with Pin 1 and Pin 2 of the referenced model. | | This mapping covers only the series paths between pins. The | package parasitics and any other elements such as additional | capacitance or clamping circuitry are defined by the | model_name that is referenced in the [Pin] keyword. The | model_names under the [Pin] keyword that are also referenced | by the [Series Pin Mapping] keyword may include any legal | model or reserved model except for Series and Series_switch | models. Normally the pins will reference a [Model] whose | Model_type is 'Terminator'. For example, a Series_switch | model may contain Terminator models on EACH of the pins to | describe both the capacitance on each pin and some clamping | circuitry that may exist on each pin. In a similar manner, | Input, I/O or Output models may exist on each pin of a=20 | Series model that is serving as a differential termination. | |* Also, a pin name may appear on more than one entry under the |* [Series Pin Mapping] keyword. This allows for multiple and |* perhaps different models or model selectors to be placed |* between the same, or any arbitrary pin pair combinations. |----------------------------------------------------------------------- - ---- ************************************************************************ **** ANALYSIS PATH/DATA THAT LED TO SPECIFICATION: Since the usage rules of the [Pin] keyword includes this statement: | ... The | third column, model_name, maps a pin to a specific I/O=20 | buffer model or model selector name. Each model_name must=20 | have a corresponding model or model selector name listed=20 | in a [Model] or [Model Selector] keyword below, unless it is=20 | a reserved model name (POWER, GND, or NC). and the usage rules of the [Model Selector] keyword includes this statement: | ... The name of the | [Model Selector] keyword must match the corresponding model | name listed under the [Pin] or [Series Pin Mapping] keyword | and must not contain more than 20 characters. the intent was obviously to allow the [Series Pin Mapping] keyword to=20 reference [Model Selectors]. The missing statement under the [Series Pin=20 Mapping] keyword seems to have been just and editorial oversight. ************************************************************************ **** ************************************************************************ **** ANY OTHER BACKGROUND INFORMATION: ************************************************************************ **** - ------_=_NextPart_001_01C3DEAA.7963BB38 Content-Type: text/plain; name="BIRD87.txt" Content-Transfer-Encoding: base64 Content-Description: BIRD87.txt Content-Disposition: attachment; filename="BIRD87.txt" KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKg0KKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKg0KICAgICAgICAgICAgICAg ICAgICBCVUZGRVIgSVNTVUUgUkVTT0xVVElPTiBET0NVTUVOVCAoQklSRCkNCg0KQklSRCBJRCM6 ICAgICAgIEJJUkQ4Nw0KSVNTVUUgVElUTEU6ICAgIFNlcmllcyBQaW4gTWFwcGluZyBDbGFyaWZp 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CioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioNCg== - ------_=_NextPart_001_01C3DEAA.7963BB38-- |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 23 Jan 2004 15:36:01 -0800 From: "Mirmak, Michael" Subject: [IBIS-Users] Agenda, IBIS Open Forum Teleconference for January 30 IBIS Open Forum Meeting Agenda for January 30, 2004 Telephone Number Bridge Passcode 1-916-356-2663 3 588-9637 All meetings are 8:00 AM to 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For international numbers, please contact Michael Mirmak. 8:00 Check-In, Intros, Announcements Mirmak - Intros of New IBIS Participants, Meeting Quorum Mirmak - Call for Patents (IBIS 4.0, 4.1, ICM) Mirmak - Membership Update and Treasurer's Report Mirmak - Review of Previous Meeting's Minutes (and ARs) Mirmak January 9, 2004 Open Forum Minutes - Miscellany/Announcements All - Press & Web Page Updates Huq, All - New Models Available, Library Update Leventhal - Opens for New Issues All 8:15 Administrative and Project Discussions Mailing List Administration Angulo/Ross International/External Progress - JEDEC Committee Report Green - FSA Modeling Committee Green - Other activities All Summit Planning - DesignCon 2004 Summit Update Mirmak - European DATE Summit Update Ross - Other events All IBIS Quality Committee Report Katz/Ross IBIS Model Review Committee Green S2IBIS3 Status Varma/Ross ICM Specification and Parser Status Green/Mirmak - BIRD process New Administrative Issues All 8:45 Technical Discussion IBIS Version 4.1 Discussion All - Final Formal "Reading" - Call for Approval Vote BIRD87: Series Pin Mapping Clarifications Muranyi IBISCHK4 BUG Status Mirmak/Angulo - Pending BUG82 New Technical Issues All 9:50 Wrap Up and Next Meeting Plans Mirmak - February 2, 2004 IBIS Summit/Open Forum - February 20, 2004 IBIS Summit/Open Forum 9:55 Sign Off |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 26 Jan 2004 21:04:32 -0800 From: "Mirmak, Michael" Subject: [IBIS-Users] Agenda, IBIS Summit at DesignCon 2004 - February 2 - ------------------------------------------------------------------ AGENDA, IBIS SUMMIT MEETING February 2, 2004 Santa Clara Convention Center Santa Clara, California Room: Magnolia Room, Westin Hotel (check signs at site) - ------------------------------------------------------------------ 8:00 AM Refreshments & Sign In 9:00 AM Introductions - Welcome to Summit - Introductions - IBIS Booth - Opens for Issues, Discussion Topics 9:15 AM IBIS Chair's Report Michael Mirmak, Intel Corporation 9:30 AM IBIS Model Quality Bob Haller and Barry Katz, Signal Integrity Software Inc. 10:00 AM IBIS Die V-T Tables from Part or Board Measurements Bob Ross, Teraspeed 10:30 AM Break 10:45 AM Creating IBIS Models for Stacked Packages Steve Peterson, Intel 11:15 AM IBIS Futures Roadmap Michael Mirmak, Intel Corporation 12:00 PM Lunch - (Hosted by DesignCon) Pre-registration required 1:15 AM Adding On-Chip Capacitance in IBIS Format for SSO Simulation Raymond Chen, Sigrity 1:45 PM A Case Study with Differential Buffers Using The New Characterization Method Arpad Muranyi, Intel Corp. 2:15 PM A VHDL-AMS True Differential Buffer Example Arpad Muranyi, Intel Corp. 2:45 PM Break 3:00 PM IBIS 4.1 Discussions All 3:30 PM Open Discussion and Ad Hoc Topics All 4:45 PM Concluding Items - Next Open Forum Meeting February 20, 2004 - DATE 2004, February 20, 2004, Paris, France 5:00 PM End of IBIS Summit Meeting - ------------------------------------------------------------------ REGISTRATION INFORMATION People involved in IBIS Model development, EDA tool development, and digital circuit design are invited to participate to the Summit meeting. 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LIST OF NEARBY HOTELS See for travel directions, hotels and other information. |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 29 Jan 2004 19:02:34 -0800 From: "Angulo, John" Subject: [IBIS-Users] RE: BOUNCE ibis-users@eda.org: Non-member submission from [Itz ik Peleg ] The following is posted on behalf of Arpad Muranyi at Intel Corp. Please send any private replies to arpad.muranyi@intel.com. - ----------------------------------- Itzik, The short answer is that #2 should happen. Reason: The "NA" in the fall_on_dly and fall_off_dly columns mean that the falling edge will not trigger anything. Keep in mind the meaning of an "NA" is not the same as zero delay. "NA" stands for information is not available, therefore you can't so anything because you don't know what to do. You may also look at BIRD 84.1 at http://www.vhdl.org/pub/ibis/birds/bird84.1.txt which attempts to clarify some of these issues. The problem is that there is a minor, but confusing error in the BIRD. The drawing on the bottom should show the output's falling edges right under the input's rising edges. I am sending you a fixed version of the BIRD in the attachment, which I hope we will post on the IBIS web site shortly. I hope this helps, Arpad Muranyi Intel Corporation =============================================================== - -----Original Message----- From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] Sent: Wednesday, January 28, 2004 1:24 AM To: owner-ibis-users@eda.org Subject: BOUNCE ibis-users@eda.org: Non-member submission from [Itzik Peleg ] To: "ibis-users@eda.org" Subject: Driver schedule interpretation . Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Hello IBIS Users This question regarding the interpretation of driver schedule keyword. I have made a model using driver schedule keyword. the model is working fine using one simulation tool. and don't working (give a completely massy weave form) in another simulation tool. When applying to the simulation tool vendor to get his response (and after some more emails). I realize that the driver schedule is interpreted differently in the two simulations tool. The major difference can be summarize by this question: When using the [Driver schedule] keyword for example: [Driver Schedule] | | Model name Rise_on_dly Rise_off_dly Fall_on_dly Fall_off_dly Out_model 0n 10n NA NA When the stimulus start rising the model is activated (the pullup of Out_mode get to on state etc') If 5ns after the rising of the stimulus, the stimulus have a falling edge. Here is the question: What will happen 1 or 2 ? 1. The pullup of Out_model will get into off state (turn off) at 5ns since the stimulus is falling . at 10ns nothing will happen since the pullup is in off state (the rise_off_dly has been canceled by the falling stimulus). 2 The pullup of Out_model will stay in on state (turn on) at 5ns. at 10ns the pullup of Out_model will go into off state since the Rise_off_dly time has come. (the rise_off_dly isn't canceled by the falling stimulus). I want an answer by the IBIS committee which will guide how this keyword should be interpreted in order that the model maker can make models that will be interrupted correctly by the EDA tools vendors. Regards Itzik Peleg Board Technology Group Marvell Semiconductor Israel Ltd Moshav Manof, D.N. Misgav 20184, ISRAEL Email - itzik.peleg@il.marvell.com Tel - +972 4 9951192 Cell - +972 54 452482 Fax - +972 4 9951902 WWW Page: http://www.marvell.com ======================================================================== This message may contain confidential, proprietary or legally privileged information. The information is intended only for the use of the individual or entity named above. If the reader of this message is not the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please notify us immediately by telephone, or by e-mail and delete the message from your computer. Thank you! ======================================================================== |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 29 Jan 2004 19:00:24 -0800 From: "Angulo, John" Subject: [IBIS-Users] Driver schedule interpretation. The following is posted on behalf of Itzik Peleg at Marvell. Please send any private replies to itzikpe@il.marvell.com. - ----------------------------------- Hello IBIS Users This question regarding the interpretation of driver schedule keyword. I have made a model using driver schedule keyword. the model is working fine using one simulation tool. and don't working (give a completely massy weave form) in another simulation tool. When applying to the simulation tool vendor to get his response (and after some more emails). I realize that the driver schedule is interpreted differently in the two simulations tool. The major difference can be summarize by this question: When using the [Driver schedule] keyword for example: [Driver Schedule] | | Model name Rise_on_dly Rise_off_dly Fall_on_dly Fall_off_dly Out_model 0n 10n NA NA When the stimulus start rising the model is activated (the pullup of Out_mode get to on state etc') If 5ns after the rising of the stimulus, the stimulus have a falling edge. Here is the question: What will happen 1 or 2 ? 1. The pullup of Out_model will get into off state (turn off) at 5ns since the stimulus is falling . at 10ns nothing will happen since the pullup is in off state (the rise_off_dly has been canceled by the falling stimulus). 2 The pullup of Out_model will stay in on state (turn on) at 5ns. at 10ns the pullup of Out_model will go into off state since the Rise_off_dly time has come. (the rise_off_dly isn't canceled by the falling stimulus). I want an answer by the IBIS committee which will guide how this keyword should be interpreted in order that the model maker can make models that will be interrupted correctly by the EDA tools vendors. Regards Itzik Peleg Board Technology Group Marvell Semiconductor Israel Ltd Moshav Manof, D.N. Misgav 20184, ISRAEL Email - itzik.peleg@il.marvell.com Tel - +972 4 9951192 Cell - +972 54 452482 Fax - +972 4 9951902 WWW Page: http://www.marvell.com ======================================================================== This message may contain confidential, proprietary or legally privileged information. The information is intended only for the use of the individual or entity named above. If the reader of this message is not the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please notify us immediately by telephone, or by e-mail and delete the message from your computer. Thank you! ======================================================================== |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 29 Jan 2004 19:04:12 -0800 From: "Angulo, John" Subject: [IBIS-Users] Re: Driver schedule interpretation. The following is posted on behalf of Itzik Peleg at Marvell. Please send any private replies to itzikpe@il.marvell.com. - ----------------------------------- Hello Arpad Thank you for the quick replay. Sorry that I have to ask again since in the BIRD 84.1a that you sent me the only real difference from the BIRD publish in the IBIS web site is the corrected wave form (I agree that the correction is needed). But, In the last paragraph that include the example the first sentence is: If "event" was defined as the expiration time of the delay, the delay would be allowed to run its course, and we would see a rising edge on the output ... Which tell me that this is the opposite example since the word "event" doesn't define like that. The word "event" is defined: | ... the word "event" refers to |** the moment in time when the delay is triggered by the |** stimulus. ... And further more If the correct answer to my first question is 2 then you are allowing the "delays" to take their own course without regarding to the stimulus. This thing isn't desire and said explicitly In the BIRD " IF "event" ... the delay would be allowed to run its course". Real buffers correspond to their stimulus and they don't have a "memory" of previous edges. According to all of that my understanding is that: The Rise_on_dly and Rise_off_dly are relative to the Rising edge or rising "event". The Fall_on_dly and Fall_off_dly are relative to the Falling edge or falling "event". In case that there was an "event" of rising the rising delay apply. If another "event" happen then the delays start over according to the corresponding "event" any other delays left from previous cycle will be canceled. This is my understanding of this BIRD. Am I got this wrong ? If yes others have done the same (at least one EDA vendor) Please consider to rephrase this BIRD and It would be much appreciated if you give a simple positive example to illustrate the driver schedule correct implementation. Thanks in advance. Itzik, Muranyi, Arpad wrote: >Itzik, > >The short answer is that #2 should happen. > >Reason: The "NA" in the fall_on_dly and fall_off_dly columns >mean that the falling edge will not trigger anything. Keep in >mind the meaning of an "NA" is not the same as zero delay. "NA" >stands for information is not available, therefore you can't >so anything because you don't know what to do. > >You may also look at BIRD 84.1 at > >http://www.vhdl.org/pub/ibis/birds/bird84.1.txt > >which attempts to clarify some of these issues. The problem is >that there is a minor, but confusing error in the BIRD. The >drawing on the bottom should show the output's falling edges >right under the input's rising edges. I am sending you a fixed >version of the BIRD in the attachment, which I hope we will >post on the IBIS web site shortly. > >I hope this helps, > >Arpad Muranyi >Intel Corporation >=============================================================== > >-----Original Message----- >From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] >Sent: Wednesday, January 28, 2004 1:24 AM >To: owner-ibis-users@eda.org >Subject: BOUNCE ibis-users@eda.org: Non-member submission from [Itzik >Peleg ] > >To: "ibis-users@eda.org" >Subject: Driver schedule interpretation . >Content-Type: text/plain; charset=ISO-8859-1; format=flowed >Content-Transfer-Encoding: 7bit > >Hello IBIS Users > >This question regarding the interpretation of driver schedule keyword. >I have made a model using driver schedule keyword. the model is working >fine using one simulation tool. >and don't working (give a completely massy weave form) in another >simulation tool. >When applying to the simulation tool vendor to get his response (and >after some more emails). >I realize that the driver schedule is interpreted differently in the two > >simulations tool. >The major difference can be summarize by this question: > >When using the [Driver schedule] keyword for example: > > [Driver Schedule] > | > | Model name Rise_on_dly Rise_off_dly Fall_on_dly Fall_off_dly > Out_model 0n 10n NA NA > > >When the stimulus start rising the model is activated (the pullup of >Out_mode get to on state etc') >If 5ns after the rising of the stimulus, the stimulus have a falling >edge. > >Here is the question: What will happen 1 or 2 ? > >1. The pullup of Out_model will get into off state (turn off) at 5ns >since the stimulus is falling . > at 10ns nothing will happen since the pullup is in off state > (the rise_off_dly has been canceled by the falling stimulus). > >2 The pullup of Out_model will stay in on state (turn on) at 5ns. > at 10ns the pullup of Out_model will go into off state since the >Rise_off_dly time has come. > (the rise_off_dly isn't canceled by the falling stimulus). > > >I want an answer by the IBIS committee which will guide how this keyword > >should be interpreted in order >that the model maker can make models that will be interrupted correctly >by the EDA tools vendors. > >Regards > >Itzik Peleg >Board Technology Group > > >Marvell Semiconductor Israel Ltd >Moshav Manof, D.N. Misgav 20184, ISRAEL >Email - itzik.peleg@il.marvell.com >Tel - +972 4 9951192 >Cell - +972 54 452482 >Fax - +972 4 9951902 >WWW Page: http://www.marvell.com >======================================================================== >This message may contain confidential, proprietary or legally privileged > >information. The information is intended only for the use of the >individual >or entity named above. If the reader of this message is not the intended > >recipient, you are hereby notified that any dissemination, distribution >or copying of this communication is strictly prohibited. If you have >received this communication in error, please notify us immediately by >telephone, or by e-mail and delete the message from your computer. > >Thank you! >======================================================================== > > > > > >------------------------------------------------------------------------ > >***************************************************************************** >***************************************************************************** > BUFFER ISSUE RESOLUTION DOCUMENT (BIRD) > >BIRD ID#: 84.1 >ISSUE TITLE: Driver Schedule Clarifications >REQUESTOR: Arpad Muranyi, Intel Corporation >DATE SUBMITTED: September 30, 2003 >DATE REVISED: November 21, 2003 >DATE ACCEPTED BY IBIS OPEN FORUM: Pending > >***************************************************************************** >***************************************************************************** > >STATEMENT OF THE ISSUE: > >The language describing the [Driver Schedule] keyword in the IBIS 4.0 >specification is ambiguous and can lead to conflicting simulation results. >Two areas need to be corrected. > >a) The usage rules of [Driver Schedule] describe in detail which of the >keywords in the top-level and scheduled models should be used, but fails to >mention what should happen with the subparameters of the [Model] keyword, >except for C_comp. No usage rules are specified for the remaining >subparameters: Model_type, Polarity, Enable, Vinl, Vinh, Vmeas, Cref, Rref, >Vref. > >b) The usage rules of the four delay parameters, Rise_on_dly, Rise_off_dly, >Fall_on_dly, Fall_off_dly use the word "event" without defining what it >means. Since "event" could refer to the stimulus that triggers the delay >as well as the moment when the delay expires, there is an ambiguity in the >usage rules regarding how tools should handle certain timing conditions. > >***************************************************************************** > >STATEMENT OF THE RESOLVED SPECIFICATIONS: > >Changes are marked with the * characters. > >|============================================================================ >| Keyword: [Driver Schedule] >| Required: No >| Description: Describes the relative model switching sequence for referenced >| models to produce a multi-staged driver. >| Usage Rules: The [Driver schedule] keyword establishes a hierarchical order >| between models and should be placed under the [Model] which >| acts as the top-level model. The scheduled models are then >| referenced from the top-level model by the [Driver Schedule] >| keyword. >| >| When a multi-staged buffer is modeled using the [Driver >| Schedule] keyword, all of its stages (including the first >| stage, or normal driver) have to be modeled as scheduled >| models. >| >| If there is support for this feature in a EDA tool, the >| [Driver Schedule] keyword will cause it to use the >| [Pulldown], [Pulldown Reference], [Pullup], [Pullup >| Reference], [Voltage Range], [Ramp], [Rising Waveform] and >| [Falling Waveform] keywords from the scheduled models >| instead of the top-level model, according to the timing >| relationships described in the [Driver Schedule] keyword. >| Consequently, the keywords in the above list will be ignored >|* in the top-level model. All of the remaining keywords not >|* shown in the above list, and all of the subparameters will >|* be used from the top-level model and should be ignored in >|* the scheduled model(s). >| >| However, both the top-level and the scheduled model(s) have >| to be complete models, i.e., all of the required keywords >| must be present and follow the syntactical rules. >| >| For backwards compatibility reasons and for EDA tools which >| do not support multi-staged switching, the keywords in the >| above list can be used in the top-level [Model] to describe >| the overall characteristics of the buffer as if it was a >| composite model. It is not guaranteed, however, that such a >| top-level model will yield the same simulation results as a >| full multi-stage model. It is recommended that a "golden >| waveform" for the device consisting of a [Rising Waveform] >| table and a [Falling Waveform] table be supplied in the >| top-level model to serve as a reference for validation. >| >| Even though some of the keywords are ignored in the scheduled >| model, it may still make sense in some cases to supply >| correct data with them. One such situation would arise when a >| [Model] is used both as a regular top-level model as well as a >| scheduled model. >| >| The [Driver Schedule] table consists of five columns. The >| first column contains the model names of other models that >| exists in the .ibs file. The remaining four columns describe >| delays: Rise_on_dly, Rise_off_dly, Fall_on_dly, and >| Fall_off_dly. The t=0 time of each delay is the event when >| the EDA tool's internal pulse initiates a rising or falling >| transition. All specified delay values must be equal to or >| greater than 0. There are only five valid combinations in >| which these delay values can be defined: >| >| 1) Rise_on_dly with Fall_on_dly >| 2) Rise_off_dly with Fall_off_dly >| 3) Rise_on_dly with Rise_off_dly >| 4) Fall_on_dly with Fall_off_dly >| 5) All four delays defined >| (be careful about correct sequencing) >| >| The four delay parameters have the meaning as described >| below. (Note that this description applies to buffer types >| which have both pullup and pulldown structures. For those >| buffer types which have only a pullup or pulldown structure, >| the description for the missing structure can be omitted.) >| >|** Remove this sentence: >|** In the following four paragraphs, the word "event" refers to >|** the time when the delays are triggered. >| >| Rise_on_dly is the amount of time that elapses from the >| internal simulator pulse initiating a RISING edge to the >| t = 0 time of the waveform or ramp that turns the I-V table of >| the PULLUP device ON, and the t = 0 time of the waveform or >| ramp that turns the I-V table of the PULLDOWN device OFF (if >| they were not already turned ON and OFF, respectively, by >| another event). >| >| Rise_off_dly is the amount of time that elapses from the >| internal simulator pulse initiating a RISING edge to the >| t = 0 time of the waveform or ramp that turns the I-V table of >| the PULLUP device OFF, and the t = 0 time of the waveform or >| ramp that turns the I-V table of the PULLDOWN device ON (if >| they were not already turned ON and OFF, respectively, by >| another event). >| >| Fall_on_dly is the amount of time that elapses from the >| internal simulator pulse initiating a FALLING edge to the >| t = 0 time of the waveform or ramp that turns the I-V table of >| the PULLDOWN device ON, and the t = 0 time of the waveform or >| ramp that turns the I-V table of the PULLUP device OFF (if >| they were not already turned ON and OFF, respectively, by >| another event). >| >| Fall_off_dly is the amount of time that elapses from the >| internal simulator pulse initiating a FALLING edge to the >| t = 0 time of the waveform or ramp that turns the I-V table of >| the PULLDOWN device OFF, and the t = 0 time of the waveform or >| ramp that turns the I-V table of the PULLUP device ON (if >| they were not already turned ON and OFF, respectively, by >| another event). >| >|** In the above four paragraphs, the word "event" refers to >|** the moment in time when the delay is triggered by the >|** stimulus. This stimulus is provided to the top-level >|** model by the simulation tool. The expiration of delays >|** cannot generate events. >| >| Note that some timing combinations may only be possible if >| the two halves of a complementary buffer are modeled >| separately as two open_* models. >| >| Use 'NA' when no delay value is applicable. For each >| scheduled model the transition sequence must be complete, >| i.e., the scheduled model must return to its initial state. >| >| No [Driver Schedule] table may reference a model which itself >| has within it a [Driver Schedule] keyword. >| >| Other Notes: The added models typically consist of Open_sink (Open_drain) >| or Open_source models to provide sequentially increased drive >| strengths. The added drive may be removed within the same >| transition for a momentary boost or during the opposite >| transition. >| >| The syntax also allows for reducing the drive strength. >| >| Note that the Rise_on_dly, Rise_off_dly, Fall_on_dly, >| Fall_off_dly parameters are single value parameters, so >| typical, minimum and maximum conditions cannot be described >| with them directly. In order to account for those effects, >| one can refer to the fastest waveform table with the delay >| number and then insert an appropriate amount of horizontal >| lead in section in those waveforms which need more delay. >| >| Notice that the C_comp parameter of a multi-stage buffer is >| defined in the top-level model. The value of C_comp >| therefore includes the total capacitance of the entire >| buffer, including all of its stages. Since the rising and >| falling waveform measurements include the effects of >| C_comp, each of these waveforms must be generated with the >| total C_comp present, even if the various stages of the >| buffer are characterized individually. >| >| Note: In a future release, the [Driver Schedule] keyword may >| be replaced by a newer method of specification that is >| consistent with some other planned extensions. However, the >| [Driver Schedule] syntax will continue to be supported. >|---------------------------------------------------------------------------- >***************************************************************************** > >ANALYSIS PATH/DATA THAT LED TO SPECIFICATION: > >a) Since the rules for the C_comp subparameter already state "that the >C_comp parameter of a multi-stage buffer is defined in the top-level model", >and the same rule makes perfect sense for the rest of the subparameters, >this BIRD proposes that a simple language should be added to the usage rules >to that effect. > >b) In order to be consistent with the behavior of over clocked waveform >tables (Vt curves) it makes sense to define "event" as the time when the >delays are triggered. > >Considering the following timing values: > >[Driver Schedule] >| Model_name Rise_on_dly Rise_off_dly Fall_on_dly Fall_off_dly > MODEL_OUT 20.0ns 0.0ns NA NA > >where the [Model] MODEL_OUT consists of a complementary driver, the above >definition of "event" will result in a flat line response on the output of >the buffer as long as the input stimulus pulse is shorter than the >Rise_on_dly value of 20.0 ns. > >In other words, within [Model]s using the [Driver Schedule] keyword there >are no internally generated events. > >***************************************************************************** >***************************************************************************** > >ANY OTHER BACKGROUND INFORMATION: > >If "event" was defined as the expiration time of the delay, the delay would >be allowed to run its course, and we would see a rising edge on the output >20 ns after the rising edge stimulus, even though there was a falling edge >stimulus that should have generated a falling edge on the output (which we >didn't see, because the output was at 0 V during this time). The output >would actually go low at the next time the stimulus goes low, because at >that time the output will be in the high state already. > >Here is an ASCII attempt to illustrate this: > >Stimulus: > __ __ __ >___| |________________| |________________| |____________... > >Output: > _________ ________ ____... >_____________| |__________| |__________| > >Note that this problem only occurs if the pulse width is smaller than the >delay, in other words when the buffer is over clocked. Trying to interpret >these delays with a physical meaning, we can imagine a buffer that will not >switch at all under these conditions because it is over-clocked. On the >other hand, we could also think of a pipelined buffer architecture which >could very well generate waveforms as shown above. While both >interpretations may be correct, it seems that the first approach is more >consistent with the way the waveforms (Vt curves) operate in current IBIS >simulators. Currently, if the lead-in portion of a waveform is longer than >the pulse width of the stimulus, the output of that buffer model will not >switch. > >***************************************************************************** > > - -- Regards Itzik Peleg Board Technology Group Marvell Semiconductor Israel Ltd Moshav Manof, D.N. Misgav 20184, ISRAEL Email - itzik.peleg@il.marvell.com Tel - +972 4 9951192 Cell - +972 54 452482 Fax - +972 4 9951902 WWW Page: http://www.marvell.com ======================================================================== This message may contain confidential, proprietary or legally privileged information. The information is intended only for the use of the individual or entity named above. If the reader of this message is not the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please notify us immediately by telephone, or by e-mail and delete the message from your computer. Thank you! ======================================================================== |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 30 Jan 2004 19:29:10 -0800 From: "Mirmak, Michael" Subject: [IBIS-Users] IBIS ver. 4.1 specification approved! The IBIS Open Forum is pleased to announce the approval of the IBIS 4.1 specification today, January 30, 2004. IBIS 4.1 includes extensions to support VHDL-AMS, Verilog-AMS and Berkeley SPICE 3F5 model files. The new version of the specification also includes additional support for differential buffer designs. The specification, in a variety of formats, can be found at: http://www.eda.org/pub/ibis/ver4.1/ Development of a syntax parser is underway. If you have questions or comments, please feel free to contact me or any member of the IBIS Open Forum board. Thank you for your support - Michael Mirmak Intel Corp. Chair, EIA/IBIS Open Forum |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 5 Feb 2004 11:26:36 -0700 From: rrwolff@micron.com Subject: [IBIS-Users] [IBIS] Open forum minutes (01/30/04) DATE: 02/05/04 SUBJECT: January 30, 2004 EIA IBIS Open Forum Meeting Minutes VOTING MEMBERS AND 2004 PARTICIPANTS Ansoft Corporation (Eric Bracken) Apple Computer (To Be Determined) Applied Simulation Technology (Fred Balistreri) Cadence Design Systems Lance Wang* Cisco Systems Syed Huq* Fairchild Semiconductor (Graham Connolly) Hitachi ULSI Systems (Kazuyoshi Shoji) Huawei Technologies (Jiang Xiang Zhong) Intel Corporation Michael Mirmak*, Arpad Muranyi* LSI Logic Frank Gasparik* Matsushita (Panasonic) (Atsuji Ito) Mentor Graphics Guy de Burgh*, Ian Dodd* John Angulo* Micron Technology Randy Wolff* Molex Incorporated (Gus Panella) Motorola (Rick Kingen) National Semiconductor (Lee Sledjeski) NEC Electric Corporation (Itsuki Yamada) North East Systems Associates (Edward Sayre) Philips Semiconductor (D.C. Sessions) Samtec (Corey Kimble) Siemens AG Eckhard Lenski* Signal Integrity Software (Bob Haller) Sigrity (Raymond Chen) Sun Microsystems (Tim Coyle) Synopsys (Hailong Wang) Texas Instruments (Thomas Fisher) Teraspeed Bob Ross* Time Domain Analysis Systems (Dima Smolyansky) Zuken (& Incases) (Michael Schaeder) OTHER PARTICIPANTS IN 2004: GEIA (Chris Denham) Green Streak Programs Lynne Green* In the list above, attendees at the meeting are indicated by *. Principal members or other active members who have not attended are in parentheses. Participants who no longer are in the organization are in square brackets. UPCOMING MEETINGS The bridge numbers for future IBIS teleconferences are as follows: Date Telephone Number Bridge # Passcode February 20, 2004 European SUMMIT, Paris, France NO PHONE BRIDGE February 20, 2004 1-916-356-2663 3 673-0282 All meetings are 8:00 AM to 9:55 AM US Pacific Time. Meeting agendas are typically distributed seven days before each Open Forum. Minutes are typically distributed within seven days of the corresponding meeting. When calling into the meeting, provide the bridge number and passcode at the automated prompts. If asked by an operator, please request to join the IBIS Open Forum hosted by Michael Mirmak. For international dial-in numbers, please contact Michael Mirmak. NOTE: "AR" = Action Required. - --------------------------------MINUTES--------------------------------- - -- INTRODUCTIONS AND MEETING QUORUM No new attendees. CALL FOR PATENTS Michael Mirmak called for any patents or pending patents related to the IBIS Version 4.0, 4.1, or ICM 1.0 specifications. No patents were declared. MEMBERSHIP UPDATE AND TREASURER'S REPORT Michael Mirmak reported that several organizations have already returned their invoices for 2004 membership. The Open Forum is expecting the 2003 annual financial statement in mid February. Michael also noted that Ansoft has been invoiced as a parser licensee. REVIEW OF MINUTES AND ARS The January 9, 2003 meeting minutes were approved with no changes. MISCELLANY/ANNOUNCEMENTS No additional announcements were made. PRESS AND WEB PAGE UPDATES Syed Huq reported that both Micron and Samtec have been added to the IBIS web roster and their logos are now on the virtual poster. Syed also noted that the web site will be gradually updated to Macromedia DreamWeaver* over the next few months. This will enable support of Cascading Style Sheets, layering, and other advanced web features. NEW MODELS AVAILABLE, LIBRARY UPDATE No new models received. Michael Mirmak took the AR to contact Roy Leventhal on the model library update schedule. OPENS FOR NEW ISSUES No new issues. MAILING LIST ADMINISTRATION John Angulo reported that the MyDoom worm had spread, causing a rise in message traffic on the IBIS request reflectors. No larger impact had been noted. In addition, John posted the text of a conversation involving an employee of Marvell who was having difficulty posting directly to the IBIS reflectors. Bob Ross noted that the proper permissions on the EDA.org IBIS root directory have been restored. Randy Harr, EDA.org sysop and a technical supporter of IBIS web activities, has been invited to the IBIS Summit at DesignCon West. INTERNATIONAL/EXTERNAL PROGRESS - - JEDEC Activity Report Lynne Green reported that she will present to the JEDEX conference on April 16, 2004. The presentation will probably be made available to the public and will involve an introduction to IBIS and will also review modeling for high-speed designs. The JEDEX web site is: http://www.jedex.org - - FSA Modeling Committee Lynne Green reported that she will present a talk on IBIS quality to the Fabless Semiconductor Association in San Jose on April 15, 2004. The Fabless Semiconductor Association can be found at: http://www.fsa.org - - Other Activities Bob Ross inquired as to whether the video of Arpad Muranyi's training slides had been made available on the IBIS web site. Michael Mirmak noted that no response had yet been received from the original training site sponsors. Michael accepted the AR to check with DC Sessions, the original organizer of the training class, on the availability of the video. Lynne Green and Michael Mirmak reported on an invitation to participate in a VHDL-AMS conference in September. The conference will involve several different applications of VHDL-AMS modeling, of which electrical behavioral modeling is a part. The conference is to take place at the University of Lille, France. DESIGNCON 2004 SUMMIT PLANNING Lynne Green reported that approximately 25 people had registered for the IBIS Summit with her, but that the IEC was reporting 50 prospective attendees. Bob Ross noted that three new signs will be added to the IBIS booth EUROPEAN DATE SUMMIT PLANNING Bob Ross reported that ten presentations are already scheduled for the DATE summit. These include a discussion of ICEM and IBIS, IBIS model making with WinPro*, and board-level EMI prediction with IBIS. Eckhard Lenski will be talking about "IBIS Modeling, Benefits, and Limitations." Materials from the PCB Symposium on February 19 will not be shared with the IBIS Summit; however, the PCB Symposium will have several participants who are attending the IBIS Summit. Another announcement will be sent, and the agenda to the IBIS Summit will be sent out by February 13. Cadence Design Systems, Mentor Graphics and Zuken are collaborating to sponsor the Summit, which will take place on Friday, February 20, 2004 in Paris. The summit will run from 9 AM to 2 PM Paris local time. Thanks again to Ralf Bruening of Zuken and to Eckhard Lenski of Siemens for arranging the summit. OTHER SUMMITS Bob Ross noted that the annual DAC meeting, at which IBIS officer elections have taken place in the past, will be held in San Diego in June 2004. Additionally, a DesignCon conference will be held in Manchester, New Hampshire on the US East Coast in April 2004. Bob suggested that a summit might be held during this DesignCon in a similar fashion to the summit held in October 2003. For such a summit, the logistics associated with a booth may be more profitably applied toward a teleconference bridge. Some East Coast organizations may be interested in hosting the meeting. Michael accepted the AR to investigate this further and to contact the appropriate organizations. Bob also noted that a DesignCon for Europe was being planned for October in Munich. IBIS QUALITY COMMITTEE Bob Ross reported that meetings continue every two weeks, with meetings held on January 13 and January 27. A report on the committee's progress will be delivered at the DesignCon summit. IBIS MODEL REVIEW COMMITTEE Lynne Green reported that no new models have been received by the committee since the last meeting. S2IBIS3 Bob Ross reports no changes since the last meeting. S2IBIS3 beta executables can be downloaded from: http://www.ece.ncsu.edu/erl/ibis/s2ibis3/s2ibis3.htm Feedback on the current beta version is appreciated and encouraged. ICM SPECIFICATION AND PARSER STATUS Michael Mirmak again raised the issue of a specification change process for ICM, similar to the IBIS BIRD process. As no new suggestions for an appropriate name had been received, Michael announced that change requests for the ICM specification will be called IIRDs (ICM Issue Resolution Documents). An appropriate subdirectory and set of forms will be added to the IBIS web site to reflect the new procedure. NEW ADMINISTRATIVE ISSUES No new issues. IBIS VERSION 4.1 FINAL READING AND VOTE Michael Mirmak and Bob Ross reviewed the BIRDs covered by IBIS 4.1. These include 75.8, 77.2, 78.1, 80.1, 81.1, 82.2, 85.3 and 86.1. Additionally BIRD79 was rejected and BIRD74.6 was deferred until IBIS 5.0. As has been done with previous specification votes, Michael Mirmak called for motions related to IBIS 4.1. Bob Ross moved to vote on approval of the draft specification as IBIS 4.1. The motion was seconded by John Angulo. Michael called for a vote, and the draft document was unanimously approved as IBIS 4.1. Bob Ross, Arpad Muranyi and Michael Mirmak accepted the ARs to update the IBIS web documents to reflect version 4.1's approval. Bob noted that a parser discussion should begin at the next Open Forum meeting. Version 4.1 is available in a variety of formats at: http://www.eda.org/pub/ibis/ver4.1/ BIRD87: SERIES PIN MAPPING CLARIFICATIONS Arpad Muranyi introduced BIRD87, [Series Pin Mapping] Clarifications. Currently, the IBIS specification does not explicitly note that [Series Pin Mapping] may reference models under the [Model Selector] keyword. However, [Model Selector] does note that references to [Pin] and [Series Pin Mapping] are permitted. The BIRD is intended to be included in IBIS 4.2. No change to parser behavior is needed, as it already recognizes the proper links between [Series Pin Mapping] and [Model Selector]. BUG82: WAVEFORM MISMATCH ERROR FOR OPEN SOURCE/DRAIN John Angulo noted that Bob Haller of Signal Integrity Software had reported a BUG related to the I-V/V-T mismatch checking algorithm in the new 4.0.1 parser. The problem appears when the I-V/V-T intercept is above the points in the [Pullup] or [Pulldown] tables. Incorrect data is read and extreme mismatches are noted by the parser. The error is more likely to appear for Open Drain or Open Source models. John mentioned that the BUG was originally reported in a beta version of the parser and a code fix has already been developed. Bob Ross noted that the issue must be fixed in the next parser release, preferably in a 4.0.2 or similar version. John can make the fix, but the Open Forum participants agreed that a parser update announcement should be delayed for some time, so as not to distract from the 4.0.1 parser or the IBIS 4.1 specification announcement. Other fixes may also be identified in the near future. The BUG report was classified as Moderate, with Medium priority. The BUG will be fixed in a future parser release. NEW TECHNICAL ISSUES Bob Ross noted that he and Arpad Muranyi were engaged in a lengthy discussion on the proper interpretation of [Driver Schedule] data. The highlights of this discussion and related ad hoc presentations will be featured at the DesignCon IBIS Summit. NEXT MEETING The next Open Forum teleconference has been scheduled for February 20, 2004 from 8:00 AM to 10:00 AM US Pacific Standard Time. A vote regarding the approval of BIRD87 is scheduled. The next IBIS Summit will take place at DATE 2004 on February 20, 2004 in Paris, France. ======================================================================== NOTES IBIS CHAIR: Michael Mirmak (916) 356-4261, Fax: (916) 377-1046 michael.mirmak@intel.com Senior Analog Engineer, Intel Corporation M/S FM6-45 1900 Prairie City Rd. Folsom, CA 95630 VICE CHAIR: Lynne Green (425) 788-0412, Fax (425) 788-4289 lgreen22@mindspring.com Green Streak Programs 320 120th Ave NE, Suite B-103, Bellevue, WA 98005-3016 SECRETARY: Randy Wolff (208) 363-1764, Fax: (208) 368-3475 rrwolff@micron.com Simulation Engineer, Micron Technology, Inc. 8000 S. Federal Way Mail Stop: 1-711 Boise, ID 83707-0006 LIBRARIAN: Roy Leventhal (847) 590-9398 roy.leventhal@ieee.org Consultant, Leventhal Design and Communications 1924 North Burke Drive Arlington Heights, Illinois 60004 WEBMASTER: Syed Huq (408) 525-3399, Fax: (408) 526-5504 shuq@cisco.com Manager, Hardware Engineering, Cisco Systems 170 West Tasman Drive San Jose, CA 95134-1706 POSTMASTER: John Angulo (425) 497-5077, Fax: (425) 881-1008 John_angulo@mentor.com Development Engineer, Mentor Graphics 14715 N.E. 95th Street, Suite 200 Redmond, WA 98052 This meeting was conducted in accordance with the EIA Legal Guides and EIA Manual of Organization and Procedure. The following e-mail addresses are used: majordomo@eda.org In the body, for the IBIS Open Forum Reflector: subscribe ibis In the body, for the IBIS Users' Group Reflector: subscribe ibis-users Help and other commands: help ibis-request@eda.org To join, change, or drop from either the IBIS Open Forum Reflector (ibis@eda.org), the IBIS Users' Group Reflector (ibis-users@eda.org) or both. State your request. ibis-info@eda.org To obtain general information about IBIS, to ask specific questions for individual response, and to inquire about joining the EIA-IBIS Open Forum as a full Member. ibis@eda.org To send a message to the general IBIS Open Forum Reflector. This is used mostly for IBIS Standardization business and future IBIS technical enhancements. Job posting information is not permitted. ibis-users@eda.org To send a message to the IBIS Users' Group Reflector. This is used mostly for IBIS clarification, current modeling issues, and general user concerns. Job posting information is not permitted. ibis-bug@eda.org To report ibischk3 parser bugs. The Bug Report Form Resides on eda.org in /pub/ibis/bugs/ibis_bugs/bugform.txt along with reported bugs. icm-bug@eda.org To report icmchk1 parser bugs. The Bug Report Form Resides on eda.org in /pub/ibis/bugs/icm_bugs/icm_bugform.txt along with reported bugs. To report s2ibis, s2ibis2 and s2iplt bugs, use the Bug Report Forms which reside under eda.org in /pub/ibis/bugs/s2ibis/bugs2i.txt, /pub/ibis/bugs/s2ibis2/bugs2i2.txt and /pub/ibis/bugs/s2iplt/bugsplt.txt respectively. Information on IBIS technical contents, IBIS participants and actual IBIS models are available on the IBIS Home page: http://www.eigroup.org/ibis/ibis.htm Check the IBIS file directory on eda.org for more information on previous discussions and results: http://www.eda.org/pub/ibis/directory.html Other brands and names are the property of their respective owners. |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 9 Feb 2004 20:37:00 +0100 From: Ralf Bruening Subject: [IBIS-Users] E U R O P E A N I B I S S U M M I T M E E T I N G 2004 - Final Call for Participation+Draft Agenda To All: We have been holding successful European IBIS Summit Meetings for the past six years. This year we are again holding a meeting along with DATe 04 on Friday, February 20, 2004. The purpose is to promote communication among users and developers of IBIS models in Europe. The meeting is free and open to everyone. However, you will have to register for the exhibition at DATe (to get access to the meeting room). Refreshments and an informal lunch is planned planned. Below is some information on the IBIS Summit and some related events. You are invited to register and also to submit presentation proposals. So far we have the following presentation scheduled (maybe a subject of change, order not defined yet as well so far): 1. "A Freeware Environment for IC Emission Simulations Based on ICEM and IBIS", Etienne Sicard, INSA, Toulouse, France 2. "Parametric Models in IBIS Multilingual Framework", F.G.Canavero, I.A.Maio, B.Ross*, I.S.Stievano, Politecnico di Torino, Italy and *Teraspeed Consulting Group 3. "Lumped Skin Effect Model for Package Leads", A. Ege Engin, Fraunhofer IZM/University of Paderborn 4. "IBIS Model Development and Validation", Shripad Annigeri, WIPRO, India (may be canceled) 5. "IBIS Quality", Bob Haller, Barry Katz, SiSoft, Eckhard Lenski (Presenter), Siemens 6. "IBIS models, today and tomorrow", Eckhard Lenski, Siemens 7. "IBIS and EMI screening tools" Ralf Bruening, Zuken 8. "The Benefits of multi-Lingual Extensions to IBIS" Stephanne Rousseau, Mentor Graphics 9. "Sensitivity analysis of IBIS-parameters with HSPICE" Manfred Maurer, Siemens 10. "Verification of IBIS models", Hans Klos, Sintecs BV, Netherlands 11. "TBD", Andrea Huse, Cadence Design Further presentations can be annouced on short notice before the meeting. Ralf Bruening Product Manager High Speed Design ZUKEN EMC Technology Center - ----------------------------------------------------------------------------------- E U R O P E A N I B I S S U M M I T M E E T I N G F I N A L A N N O U N C E M E N T Time/Date: 9:00 AM - 2:00 PM, Friday, February 20, 2003 Location: Meeting room @ CNIT, La Defense (International Congress Center) Paris, France (where DATE 2004 is being held) (Free DATE 2004 exhibition registration for room entry, see URL below) Content: Presentations and Discussions Purpose: Solicit and Exchange IBIS Model Related Information and Ideas Sponsors: Zuken, Mentor Graphics, Cadence Design Systems. If your company would be interested in sponsoring this event, please contact Lynne Green or Ralf Bruening . Benefits to sponsors include formal recognition at the meeting and mention in the Calls for Papers and meeting minutes. Your financial support strengthens the organization by allowing IBIS to focus resources on industry activities rather than raising money, and you will receive generous thanks for your support. DATE 2004 Conference: February 16-20, 2004. The IBIS meeting is scheduled the day after the DATE 2004 exhibition ends. Location: CNIT Congress Center, Paris, France DATE URL: http://www.date-conference.com Background: DATE (Design, Automation, and Test in Europe) is the only European event dedicated to electronic system design and test. Topics of current interest to the EIA IBIS Open Forum are addressed at DATE. This meeting will be conducted as a formal IBIS Summit Meeting. Presentations are expected to be available and archived in an electronic format, and minutes of the meeting will be issued. Any pending formal decisions (votes) will be announced at least two weeks prior to the meeting. Topics and presentations may include (list is open for further contributions): - Submitted Presentations on IBIS Topics (See above) - Information about the most recent IBIS Developments - Less formal Ad Hoc Presentations and Discussions - IBIS and Modelling Questions and Answers The meeting is free and open to everyone. However, you will have to register for the exhibition at DATe (to get access to the meeting room). Refreshments are planned. Below is some information on the IBIS Summit and some related events. You are invited to register and also to submit presentation proposals. CALL FOR PARTICIPANTS People involved in IBIS Model development, EDA tool development, and digital circuit design are invited to participate in the European IBIS Summit meeting. If you plan to participate, please register with the information below (deadline, February 13th, 2003): Name: E-mail address: Company: Telephone: Send to: Ralf Bruening (ralf.bruening@zuken.de) CALL FOR PRESENTATIONS We are seeking presentations from individuals who have IBIS experiences or issues. Some suggested subjects of interest are: - IBIS Model Development Experiences - Company IBIS Standards and Requirements - Generating and Validating IBIS Models - Future IBIS Requirements - EMC/EMI IBIS Issues - Experiences using IBIS in the PCB Design process Format of Presentation: LCD or Overhead Projections Time: 15-30 Minutes Electronic Archival: We request electronic versions so that the presentations can be archived and also made available to non-attendees. Formats used in the past have been text, Power Point, Word, Postscript, and Acrobat PDF. Electronic presentations should be made available by February the 13th, 2003. Otherwise the presentor will be expected to provide 30 copies for distribution. If you plan a presentation, please supply Title: Presenter: E-mail address: Company: Telephone: Estimate Time: Send this to both: Ralf Bruening (ralf.bruening@zuken.de) AGENDA The agenda includes presentations, discussions, breaks, and a luncheon (which will be provided). This will be developed as presentation proposals are received. LIST OF NEARBY HOTELS See for travel directions, hotels and other information. Looking forward to meeting you at DATe 2004 in Paris Ralf Bruening _____________________________________________ Ralf Bruening Product Manager High Speed Design/Partner & Solution Business Zuken EMC Technology Center Vattmannstr.3 33100 Paderborn Germany Tel: ++49 (0) 5251 150 600 (direct -621) Fax: ++49 (0) 5251 150 700 Cellular: +49 170 4228512 (alternative: +49 172 9070675) Email: ralf.bruening@zuken.de Web: www.zuken.com _____________________________________________ This message is for the designated recipient only and may contain privileged, proprietary, or otherwise private information. If you have received it in error, please notify the sender immediately and delete the original. Any other use of the email by you is prohibited. |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 11 Feb 2004 11:32:31 -0700 From: rrwolff@micron.com Subject: [IBIS-Users] [IBIS] IBIS Summit minutes (02/02/04) This is a multi-part message in MIME format. - ------_=_NextPart_001_01C3F0CD.6896B936 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable - ------_=_NextPart_001_01C3F0CD.6896B936 Content-Type: text/plain; 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2004 , February the 20th 2004 - ----------------------------------------------------------------------- IBIS SUMMIT AGENDA - ----------------------------------------------------------------------- D A T e 2004 - I B I S S U M M I T M E E T I N G Time/Date: Friday, February 20, 2004, 9:00 AM to 2:15 PM Location: DATe 2004 Conference Room: Dupin 1 CNIT, La Defense - International Congress Center Paris, France Content: Presentations and Discussions Purpose: Solicit and Exchange IBIS Model Related Information and Ideas. Sponsors: Zuken, Cadence, Mentor DATe 2004: CNIT, La Defense - International Congress Center Paris, France February 16 - 20, 2004 See http://www.date-conference.com for more information. All times Middle European Time (MEZ) - ------------------------------------------------------------------ To All: You are invited to attend the European IBIS Summit Meeting in Paris, France, especially if you are already going to DATE 2004: The meeting is free to people interested in IBIS modeling, digital circuit design and related EDA tool development. Refreshments and a quick lunch are included. If you plan to attend, please notify me via eMail at the address at the end - even as well short notive attendence is possible at the meeting. Those wishing to attend short notice must register for free admission to the DATe conference+exhibition. The Agenda is below. Ralf Bruening Zuken - ------------------------------------------------------------------ AGENDA EUROPEAN IBIS SUMMIT MEETING Friday, February 20, 2004, 9:00 am Room: Dupin 1 - ------------------------------------------------------------------ 8:30 REFRESHMENTS & SIGN IN 9:00 WELCOME AND INTRODUCTIONS - Ralf Bruening, Zuken, Germany 9:10 IBIS QUALITY - Bob Haller, Signal Integrity Software (SiSoft), USA (Presented by Eckhard Lenski, Siemens AG, Germany 9:35 VERIFICATION OF IBIS MODELS - Hans Klos, Sintecs BV, The Netherlands 10:00 IBIS MODEL DEVELOPMENT AND VALIDATION - Shripad Annigeri, WiPro, India 10:25 SENSITIVITY ANALYSIS OF IBIS-PARAMETERS WITH HSPICE - Manfred Maurer, Siemens AG, Germany 10:50 BREAK (15 Minutes) 11:05 IBIS MODELS, CURRENT STATUS AND SOME NOTES ON IBIS4.0 Parameters - Eckhard Lenski, Siemens AG, Germany 11:30 IBIS AND EMI SCREENING TOOLS - Ralf Bruening, Zuken, Germany 11:50 A FREEWARE ENVIRONMENT FOR IC EMISSION SIMULATIONS BASED ON ICEM AND IBIS - Etienne Sicard, INSA, France 12:15 LUNCH/DISCUSSION (45 Minutes) 13:00 THE BENEFITS OF MULTI-LINGUAL EXTENSIONS TO IBIS - Stephanne Rousseau, Mentor Graphics, France 13:25 PARAMETRIC MODELS IN IBIS MULTILINGUAL FRAMEWORK - F.G. Canavero, I.A. Maio, B. Ross*, I.S. Stievano Politecnoico di Torino, Italy, *Teraspeed Consulting Group, USA (Presented by I.S. Steivano, Politecnico di Torino) 13:50 LUMPED SKIN EFFECT MODEL FOR PACKAGE LEADS - A. Ege Engin, Franhofer IZM/University of Paderborn, Germany 14:15 BREAK AND END OF MEETING - ------------------------------------------------------------------ Sponsors: Zuken, Mentor Graphics and Cadence Design Systems DATE2004: February 16 - 20, 2004. The IBIS meeting is scheduled the day following the exhibition portion of the Conference. See http://www.date-conference.com for more information. SIGNUP People involved in IBIS Model development, EDA tool development, and digital circuit design are invited to participate in the European IBIS Summit meeting. If you plan to attend, please supply the information below: Name: E-mail address: Company: Telephone: Send to: Ralf Bruening (ralf.bruening@zuken.de) _____________________________________________ Ralf Bruening Product Manager High Speed Design/Partner & Solution Business Zuken EMC Technology Center Vattmannstr.3 33100 Paderborn Germany Tel: ++49 (0) 5251 150 600 (direct -621) Fax: ++49 (0) 5251 150 700 Cellular: +49 170 4228512 (alternative: +49 172 9070675) Email: ralf.bruening@zuken.de Web: www.zuken.com _____________________________________________ This message is for the designated recipient only and may contain privileged, proprietary, or otherwise private information. If you have received it in error, please notify the sender immediately and delete the original. Any other use of the email by you is prohibited. |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 13 Feb 2004 10:27:48 -0800 From: "Mirmak, Michael" Subject: [IBIS-Users] Agenda, IBIS Open Forum Teleconference for February 20, 2004 IBIS Open Forum Meeting Agenda for February 20, 2004 Telephone Number Bridge Passcode 1-916-356-2663 3 673-0282 All meetings are 8:00 AM to 9:55 AM US Pacific Time. When calling into the meeting, provide the bridge number and passcode at the automated prompts. If asked by an operator, please request to join the IBIS Open Forum hosted by Michael Mirmak. For international numbers, please contact Michael Mirmak. 8:00 Check-In, Intros, Announcements Mirmak - Intros of New IBIS Participants, Meeting Quorum Mirmak - Call for Patents (IBIS 4.0/4.1, ICM) Mirmak - Membership Update and Treasurer's Report Mirmak - Review of Previous Meeting's Minutes (and ARs) Mirmak January 30, 2004 Open Forum Minutes February 2, 2004 Summit Minutes - Miscellany/Announcements All - Press & Web Page Updates Huq, All - New Models Available, Library Update Leventhal - Opens for New Issues All 8:15 Administrative and Project Discussions Mailing List Administration Angulo/Ross International/External Progress - JEDEC Committee Report Green - FSA Modeling Committee Green - Other activities All Summit Planning - DesignCon West 2004 Report Mirmak - DATE 2004 Report Ross - DesignCon East 2004 All IBIS Quality Committee Report Katz/Ross IBIS Model Review Committee Green S2IBIS3 Status Varma/Ross IBIS 4.1 Parser Planning Mirmak/Ross ICM Specification and Parser Status Green/Mirmak Futures Subcommittee Discussion All Cookbook Subcommittee Discussion All New Administrative Issues All 8:45 Technical Discussion BIRD87: Series Pin Mapping Clarifications Muranyi - Call for vote IBISCHK4 BUG Status Mirmak/Angulo New Technical Issues All 9:50 Wrap Up and Next Meeting Plans Mirmak - March 12, 2004 IBIS Open Forum 9:55 Sign Off |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 17 Feb 2004 10:34:31 -0600 From: John Phillippe Subject: [IBIS-Users] Slew-Rate controlled output buffers I've been looking into the best way to model slew-rate controlled output buffers in IBIS. It is my current understanding that IBIS doesn't really support this. When I say slew-rate controlled output buffer, the best way to describe it would be that for a given load range, say 10pF-100pF the output buffer will always have the same slew-rate. Unlike say a simple cmos inverter where if you increase the output load, the slew rate will slow down. The biggest issue in my mind is the I/V curves. Since they are a DC sweep, you always get the highest drive on the output buffers. Has anybody tackled this issue? Anyone have any thoughts/solutions? - -- John Phillippe SPS, 32 Bit Embedded Controller Division, IC Creation Motorola - 512-895-1835 Austin, TX - john.phillippe@motorola.com |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 17 Feb 2004 09:20:48 -0800 From: "Muranyi, Arpad" Subject: RE: [IBIS-Users] Slew-Rate controlled output buffers John, You are forgetting all about the Vt curves. While it is true that IV curves are the full DC characteristics of the buffer, Vt curves provide the 0-100% scaling factor vs. time information for it. I.e., Vt curves are usually used to scale the IV curves as time goes by to model how the buffer turns on/off with respect to time. The shape of the Vt curve determines the "slew rate". Regarding the slew rate controlled buffers, based on your description it sounds like you have some sort of a feedback in mind which ensures that regardless of the load (within a reasonable range) you get the same slew rate. You are correct, such feedback is not possible with IBIS models up to version 4.0. However, we just approved IBIS 4.1, in which you can model practically anything you can think of with the *-AMS language extensions. However, I also have to say that when I hear about slew rate controlled buffers, I rarely (or never) hear about it as you described it. The "control" portion of the term doesn't refer to a feedback loop, but a much simpler mechanism to slow the edges down. The reason they do this is because the latest technologies would allow the buffer to switch a lot faster than desired for SI purposes, so there must be some deliberate slowing in the design. This can be very well modeled with regular IBIS models using the appropriate Vt curves. Are you sure that your slew rate controlled buffer is as elaborate (using feedback) as you described it? Arpad Muranyi Intel Corporation ============================================================ - -----Original Message----- From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On Behalf Of John Phillippe Sent: Tuesday, February 17, 2004 8:35 AM To: ibis-users@eda.org Subject: [IBIS-Users] Slew-Rate controlled output buffers I've been looking into the best way to model slew-rate controlled output buffers in IBIS. It is my current understanding that IBIS doesn't really support this. When I say slew-rate controlled output buffer, the best way to describe it would be that for a given load range, say 10pF-100pF the output buffer will always have the same slew-rate. Unlike say a simple cmos inverter where if you increase the output load, the slew rate will slow down. The biggest issue in my mind is the I/V curves. Since they are a DC sweep, you always get the highest drive on the output buffers. Has anybody tackled this issue? Anyone have any thoughts/solutions? - -- John Phillippe SPS, 32 Bit Embedded Controller Division, IC Creation Motorola - 512-895-1835 Austin, TX - john.phillippe@motorola.com |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 23 Feb 2004 17:17:52 -0800 From: "Lynne Green" Subject: [IBIS-Users] First Call for IBIS SUMMIT at DesignCon East 2004 - ----------------------------------------------------------------------- IBIS SUMMIT at DesignCon East FIRST CALL FOR PARTICIPATION & PRESENTATIONS - ----------------------------------------------------------------------- I B I S S U M M I T M E E T I N G Time/Date: Monday April 5, 2004 8:00 AM to 5 PM Location: Boxborough, Massachusetts Content: Presentations and Discussions Purpose: Solicit and Exchange IBIS Model Related Information and Ideas. Sponsors: DesignCon East If your company would be interested in sponsoring this event, please contact Lynne Green . Benefits to sponsors include formal recognition at the meeting and acknowledgement in the Calls for Papers and meeting minutes. Your financial support strengthens the organization by allowing IBIS to focus resources on industry activities rather than raising money, and you will receive generous thanks for your support. DesignCon East Conference April 5-7, 2004 Holiday Inn Boxborough Boxborough, Massachusetts For more information, see BACKGROUND DesignCon East is the premier annual event for electronic design engineers working at the chip, board, and system levels in the Eastern Region of the United States. Topics of current interest to the EIA IBIS Open Forum are addressed at DesignCon East. This meeting will be conducted as a formal IBIS Summit Meeting. Presentations are expected to be available and archived in an electronic format, and minutes of the meeting will be issued. Any pending formal decisions (votes) will be announced at least two weeks prior to the meeting. CALL FOR PARTICIPANTS People involved in IBIS Model development, EDA tool development, and digital circuit design are invited to participate in the Summit meeting. If you plan to participate, please register with the information below: Name: E-mail address: Company: Telephone: Send to: Terry Roulic CALL FOR PRESENTATIONS We are seeking presentations from individuals who have experiences of interest to the IBIS modeling community. In the past, these have included demonstrations of modeling techniques, explanations of behavioral algorithms and descriptions of difficulties encountered in specific applications. Of particular interest are topics related to model correlation, modeling building experiences and comparisons to other modeling methods. Presentations may be addressed to any and all levels of IBIS experience, from beginning to advanced. Format of Presentation: LCD Projection with Windows laptop. Time: 15-30 Minutes Electronic Archival: We request electronic versions so that the presentations can be archived and also made available to non-attendees. Formats used in the past have been text, Power Point, Word, Postscript, and Acrobat. Electronic presentations should be made available by March 29, 2004 for uploading and copying to the presentation laptop. If you plan a presentation, please supply Title: Presenter: E-mail address: Company: Telephone: Estimated Time: Send this to: Lynne Green AGENDA The agenda includes presentations, discussions, breaks, and a luncheon. This will be developed as presentation proposals are received. The following individuals have signed up to present at the summit (presentation titles are tentative). LIST OF NEARBY HOTELS For travel directions, hotels and other information, see http://www.iec.org/events/2004/designcon_east/conference/hotel_8_travel.html - ----------------------------------------------------------------- |------------------------------------------------------------------ |For help or to subscribe/unsubscribe, email majordomo@eda.org |with just the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or email a written request to ibis-request@eda.org. | |IBIS reflector archives exist under: | | http://www.eda.org/pub/ibis/email_archive/ Recent | http://www.eda.org/pub/ibis/users_archive/ Recent | http://www.eda.org/pub/ibis/email/ E-mail since 1993 ------------------------------ End of ibis-users V1 #35 ************************