From: owner-ibis-users@eda.org (ibis-users)
To: ibis-users-digest@eda.org
Subject: ibis-users V1 #62
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ibis-users           Tuesday, July 12 2005           Volume 01 : Number 062




----------------------------------------------------------------------

Date: Tue, 5 Jul 2005 17:30:50 +0530
From: "Subramanian, Sivaramakrishnan \(Sivaramakrishnan\)" <sivaram@agere.com>
Subject: [IBIS-Users] DC sweep

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Hi all,

How can I extract V-I curves when the O/P of my buffer is edge-triggered
and not level-sensitive?

Basically, I have to do DC sweep to extract these curves.But I cannot=20
connect my inputs to steady voltage values as the O/P is edge-triggered,
which
needs transient analysis.

Would anyone of you please let me know how to go about these buffers to
extract
VI curves?

Thanks in advance,
Sivaram

=20

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<P><FONT SIZE=3D2 FACE=3D"Arial">Hi all,</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">How can I extract V-I curves when the =
O/P of my buffer is edge-triggered</FONT>

<BR><FONT SIZE=3D2 FACE=3D"Arial">and not level-sensitive?</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Basically, I have to do DC sweep to =
extract these curves.But I cannot </FONT>

<BR><FONT SIZE=3D2 FACE=3D"Arial">connect my inputs to steady voltage =
values as the O/P is edge-triggered, which</FONT>

<BR><FONT SIZE=3D2 FACE=3D"Arial">needs transient analysis.</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Would anyone of you please let me know =
how to go about these buffers to extract</FONT>

<BR><FONT SIZE=3D2 FACE=3D"Arial">VI curves?</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Thanks in advance,</FONT>

<BR><FONT SIZE=3D2 FACE=3D"Arial">Sivaram</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">&nbsp;</FONT>
</P>

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------------------------------

Date: Tue, 5 Jul 2005 09:25:40 -0400
From: "Andrew Ingraham" <a.ingraham@ieee.org>
Subject: [IBIS-Users] Re: [IBIS] DC sweep

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DC sweepSivaram,

It sounds like you are confusing the purpose of sweeping the V-I curves. =
 It has nothing to do with edge-triggered or level-sensitive.

The only thing you apply the swept voltage to, is the IC pin (actually, =
the bonding pad).  If your IC has an output buffer connected to that =
pin, the swept voltage goes to the output of that buffer, but NOT to its =
input.  Its input should be connected to the normal things you would =
normally connect to the input of that buffer; not the swept DC source.

The purpose of the DC sweep is to measure the current vs. voltage =
relationship at the pin.  If the pin has an output or I/O buffer =
connected to the pin, then that I-V relationship depends very strongly =
on the state of the output buffer, which might be inactive (hi-Z), =
driving low, or driving high; and you need to extract the I-V =
relationships separately in each of those states.  You need to place the =
output buffer into each of those states (through whatever internal =
controls the buffer has), one at a time, and then sweep the voltage at =
the pin and measure the current, each time with the buffer held in one =
state (i.e., constant voltages applied to its edge-triggered or =
level-sensitive internal nodes).  Then change those internal nodes to =
put the buffer into its next state, and sweep the external voltage =
again.

If the pin is just an input buffer, then (unless the buffer has =
feedback, like a "bus-hold" device, which makes it problematic for IBIS) =
it doesn't make much difference what the input buffer is doing, whether =
it is toggling, etc.  Just sweep the input pin's voltage and measure the =
input current.

Hope this helps.

Regards,
Andy


  How can I extract V-I curves when the O/P of my buffer is =
edge-triggered=20
  and not level-sensitive?=20

  Basically, I have to do DC sweep to extract these curves.But I cannot=20
  connect my inputs to steady voltage values as the O/P is =
edge-triggered, which=20
  needs transient analysis.=20

  Would anyone of you please let me know how to go about these buffers =
to extract=20
  VI curves?=20

  Thanks in advance,=20
  Sivaram=20

  =20

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<HTML><HEAD><TITLE>DC sweep</TITLE>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
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<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Sivaram,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>It sounds like you are confusing the =
purpose of=20
sweeping the V-I curves.&nbsp; It has nothing to do with edge-triggered =
or=20
level-sensitive.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>The only thing you apply the swept =
voltage to, is=20
the IC pin (actually, the bonding pad).&nbsp; If your IC&nbsp;has an =
output=20
buffer connected to that pin, the swept voltage&nbsp;goes to&nbsp;the =
output of=20
that buffer, but NOT to its input.&nbsp; Its input should be connected=20
to&nbsp;the normal things you would normally connect to the input of =
that=20
buffer; not the swept DC source.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>The purpose of the DC sweep is to =
measure the=20
current vs. voltage relationship at the pin.&nbsp; If the pin has an =
output or=20
I/O buffer connected to the pin, then that I-V relationship depends very =

strongly on the state of the output buffer, which might be inactive =
(hi-Z),=20
driving low, or driving high; and you need to extract the I-V =
relationships=20
separately in each of those states</FONT><FONT face=3DArial =
size=3D2>.&nbsp; You=20
need to place the output buffer into each of those states (through =
whatever=20
internal controls the buffer has), one at a time, and then sweep the =
voltage at=20
the pin and measure the current, each time with the buffer held in one =
state=20
(i.e., constant voltages applied to&nbsp;its edge-triggered or =
level-sensitive=20
internal nodes)</FONT><FONT face=3DArial size=3D2>.&nbsp; Then change =
those internal=20
nodes to put the buffer into its next state, and sweep the external =
voltage=20
again.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>If the pin&nbsp;is just&nbsp;an input =
buffer, then=20
(unless the buffer has feedback, like a "bus-hold" device, which makes =
it=20
problematic for IBIS) it doesn't make much difference what the input =
buffer is=20
doing, whether it is toggling, etc.&nbsp; Just sweep the input pin's =
voltage and=20
measure the input current.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>Hope this helps.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>Regards,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Andy</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<BLOCKQUOTE dir=3Dltr=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
  <P><FONT face=3DArial size=3D2>How can I extract V-I curves when the =
O/P of my=20
  buffer is edge-triggered</FONT> <BR><FONT face=3DArial size=3D2>and =
not=20
  level-sensitive?</FONT> </P>
  <P><FONT face=3DArial size=3D2>Basically, I have to do DC sweep to =
extract these=20
  curves.But I cannot </FONT><BR><FONT face=3DArial size=3D2>connect my =
inputs to=20
  steady voltage values as the O/P is edge-triggered, which</FONT> =
<BR><FONT=20
  face=3DArial size=3D2>needs transient analysis.</FONT> </P>
  <P><FONT face=3DArial size=3D2>Would anyone of you please let me know =
how to go=20
  about these buffers to extract</FONT> <BR><FONT face=3DArial =
size=3D2>VI=20
  curves?</FONT> </P>
  <P><FONT face=3DArial size=3D2>Thanks in advance,</FONT> <BR><FONT =
face=3DArial=20
  size=3D2>Sivaram</FONT> </P>
  <P><FONT face=3DArial =
size=3D2></FONT>&nbsp;</P></BLOCKQUOTE></BODY></HTML>

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------------------------------

Date: Tue, 05 Jul 2005 19:23:28 +0530
From: Akhilesh CHANDRA <akhilesh.chandra@st.com>
Subject: [IBIS-Users] Re: [IBIS] DC sweep

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Hello Sivaram,

   You can do one think use .save feature in your simulator. First apply 
a transient at i/p and see when your o/p is at steady state after this 
just use ,save feature to save voltage at all input node. you can save 
these voltage in one file and use this file in your simulation. It will 
give you good results.

Regards
Akhilesh

Subramanian, Sivaramakrishnan (Sivaramakrishnan) wrote:

> Hi all,
>
> How can I extract V-I curves when the O/P of my buffer is edge-triggered
> and not level-sensitive?
>
> Basically, I have to do DC sweep to extract these curves.But I cannot
> connect my inputs to steady voltage values as the O/P is 
> edge-triggered, which
> needs transient analysis.
>
> Would anyone of you please let me know how to go about these buffers 
> to extract
> VI curves?
>
> Thanks in advance,
> Sivaram
>
>  
>


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<body>
Hello Sivaram,<br>
<br>
&nbsp; &nbsp;You can do one think use .save feature in your simulator. First apply
a transient at i/p and see when your o/p is at steady state after this just
use ,save feature to save voltage at all input node. you can save these voltage
in one file and use this file in your simulation. It will give you good results.<br>
<br>
Regards<br>
Akhilesh<br>
<br>
Subramanian, Sivaramakrishnan (Sivaramakrishnan) wrote:<br>
<blockquote type="cite"
 cite="mid6E1F4DB94568BB4AA8A30083E67378923981B9@iiex2ku01.agere.com">   
  <meta http-equiv="Content-Type" content="text/html; ">
 
  <meta name="Generator" content="MS Exchange Server version 6.0.6617.6">
  <title>DC sweep</title>
   <!-- Converted from text/rtf format -->  
  <p><font size="2" face="Arial">Hi all,</font> </p>
  
  <p><font size="2" face="Arial">How can I extract V-I curves when the O/P
of my buffer is edge-triggered</font>  <br>
  <font size="2" face="Arial">and not level-sensitive?</font> </p>
  
  <p><font size="2" face="Arial">Basically, I have to do DC sweep to extract
these curves.But I cannot </font>  <br>
  <font size="2" face="Arial">connect my inputs to steady voltage values
as the O/P is edge-triggered, which</font>  <br>
  <font size="2" face="Arial">needs transient analysis.</font> </p>
  
  <p><font size="2" face="Arial">Would anyone of you please let me know how
to go about these buffers to extract</font>  <br>
  <font size="2" face="Arial">VI curves?</font> </p>
  
  <p><font size="2" face="Arial">Thanks in advance,</font>  <br>
  <font size="2" face="Arial">Sivaram</font> </p>
  
  <p><font size="2" face="Arial">&nbsp;</font> </p>
  </blockquote>
<br>
</body>
</html>

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------------------------------

Date: Tue, 5 Jul 2005 10:18:51 -0600
From: rrwolff@micron.com
Subject: [IBIS-Users] [IBIS] Open forum minutes (06/24/05)

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------------------------------

Date: Wed, 6 Jul 2005 09:04:00 -0700
From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
Subject: [IBIS-Users] RE: [IBIS] DC sweep

This is a multi-part message in MIME format.

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	charset="iso-8859-1"
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There are times when obtaining and IV curve with .DC
sweeps is impossible.  If the buffer has flip/flops,
SPICE is not going to know how to find the operating
points in the circuit.  You will have to run a few
clock cycles worth of simulations before the output
will be in the correct state.
=20
The good news is that IV curves do not have to be
measured in the .DC mode.  You can do just as well
in .TRAN mode.  Just connect an ideal source to the
node you are trying to get the IV curve from.  Define
a ramping voltage for this ideal source (either PWL,
or PULSE, or whatever), and measure its current.
=20
Make sure that the polarity of the current measurement
is correct when you use it for IBIS models, and make
sure that the ramp is slow, in the ms range, not ns
or ps.  If you sweep too fast, your error in the
current reading will increase doe to the parasitic
capacitance in the circuit (I=3DC*dV/dt).
=20
I hope this will help...
=20
Arpad
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D

________________________________

From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Andrew =
Ingraham
Sent: Tuesday, July 05, 2005 6:26 AM
To: ibis-users@eda.org; ibis@eda.org
Subject: Re: [IBIS] DC sweep


Sivaram,
=20
It sounds like you are confusing the purpose of sweeping the V-I curves. =
 It has nothing to do with edge-triggered or level-sensitive.
=20
The only thing you apply the swept voltage to, is the IC pin (actually, =
the bonding pad).  If your IC has an output buffer connected to that =
pin, the swept voltage goes to the output of that buffer, but NOT to its =
input.  Its input should be connected to the normal things you would =
normally connect to the input of that buffer; not the swept DC source.
=20
The purpose of the DC sweep is to measure the current vs. voltage =
relationship at the pin.  If the pin has an output or I/O buffer =
connected to the pin, then that I-V relationship depends very strongly =
on the state of the output buffer, which might be inactive (hi-Z), =
driving low, or driving high; and you need to extract the I-V =
relationships separately in each of those states.  You need to place the =
output buffer into each of those states (through whatever internal =
controls the buffer has), one at a time, and then sweep the voltage at =
the pin and measure the current, each time with the buffer held in one =
state (i.e., constant voltages applied to its edge-triggered or =
level-sensitive internal nodes).  Then change those internal nodes to =
put the buffer into its next state, and sweep the external voltage =
again.
=20
If the pin is just an input buffer, then (unless the buffer has =
feedback, like a "bus-hold" device, which makes it problematic for IBIS) =
it doesn't make much difference what the input buffer is doing, whether =
it is toggling, etc.  Just sweep the input pin's voltage and measure the =
input current.
=20
Hope this helps.
=20
Regards,
Andy
=20
=20

	How can I extract V-I curves when the O/P of my buffer is =
edge-triggered=20
	and not level-sensitive?=20

	Basically, I have to do DC sweep to extract these curves.But I cannot=20
	connect my inputs to steady voltage values as the O/P is =
edge-triggered, which=20
	needs transient analysis.=20

	Would anyone of you please let me know how to go about these buffers to =
extract=20
	VI curves?=20

	Thanks in advance,=20
	Sivaram


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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD><TITLE>DC sweep</TITLE>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 6.00.2800.1498" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>There are times when obtaining and IV curve =
with=20
.DC</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>sweeps is impossible.&nbsp; If the buffer has =

</SPAN></FONT><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>flip/flops,</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>SPICE is not going to know how to find=20
</SPAN></FONT><FONT face=3D"Courier New" size=3D2><SPAN =
class=3D261095715-06072005>the=20
operating</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>points in the circuit.&nbsp; You will have=20
</SPAN></FONT><FONT face=3D"Courier New" size=3D2><SPAN =
class=3D261095715-06072005>to=20
run a few</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>clock cycles worth of simulations before=20
</SPAN></FONT><FONT face=3D"Courier New" size=3D2><SPAN =
class=3D261095715-06072005>the=20
output</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>will be in the correct =
state.</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>The good news is that IV curves do not have =
to=20
be</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>measured in the .DC mode.&nbsp; You can do =
just as=20
well</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>in .TRAN mode.&nbsp; Just connect an ideal =
source to=20
the</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>node you are trying to get the IV curve =
from.&nbsp;=20
Define</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>a ramping voltage for this ideal source =
(either=20
PWL,</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>or PULSE, or whatever), and measure its=20
current.</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>Make sure that the polarity of the current=20
measurement</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>is correct when you use it for IBIS models, =
and=20
make</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>sure that the ramp is slow, in the ms range, =
not=20
ns</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>or ps.&nbsp; If you sweep too fast, your =
error in=20
the</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>current reading will increase doe to the=20
parasitic</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>capacitance in the circuit=20
(I=3DC*dV/dt).</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>I hope this will help...</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>Arpad</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D261095715-06072005>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D</SPAN></FONT></DIV><BR>
<DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr align=3Dleft>
<HR tabIndex=3D-1>
<FONT face=3DTahoma size=3D2><B>From:</B> owner-ibis@eda.org=20
[mailto:owner-ibis@eda.org] <B>On Behalf Of </B>Andrew =
Ingraham<BR><B>Sent:</B>=20
Tuesday, July 05, 2005 6:26 AM<BR><B>To:</B> ibis-users@eda.org;=20
ibis@eda.org<BR><B>Subject:</B> Re: [IBIS] DC sweep<BR></FONT><BR></DIV>
<DIV></DIV>
<DIV><FONT face=3DArial size=3D2>Sivaram,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>It sounds like you are confusing the =
purpose of=20
sweeping the V-I curves.&nbsp; It has nothing to do with edge-triggered =
or=20
level-sensitive.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>The only thing you apply the swept =
voltage to, is=20
the IC pin (actually, the bonding pad).&nbsp; If your IC&nbsp;has an =
output=20
buffer connected to that pin, the swept voltage&nbsp;goes to&nbsp;the =
output of=20
that buffer, but NOT to its input.&nbsp; Its input should be connected=20
to&nbsp;the normal things you would normally connect to the input of =
that=20
buffer; not the swept DC source.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>The purpose of the DC sweep is to =
measure the=20
current vs. voltage relationship at the pin.&nbsp; If the pin has an =
output or=20
I/O buffer connected to the pin, then that I-V relationship depends very =

strongly on the state of the output buffer, which might be inactive =
(hi-Z),=20
driving low, or driving high; and you need to extract the I-V =
relationships=20
separately in each of those states</FONT><FONT face=3DArial =
size=3D2>.&nbsp; You=20
need to place the output buffer into each of those states (through =
whatever=20
internal controls the buffer has), one at a time, and then sweep the =
voltage at=20
the pin and measure the current, each time with the buffer held in one =
state=20
(i.e., constant voltages applied to&nbsp;its edge-triggered or =
level-sensitive=20
internal nodes)</FONT><FONT face=3DArial size=3D2>.&nbsp; Then change =
those internal=20
nodes to put the buffer into its next state, and sweep the external =
voltage=20
again.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>If the pin&nbsp;is just&nbsp;an input =
buffer, then=20
(unless the buffer has feedback, like a "bus-hold" device, which makes =
it=20
problematic for IBIS) it doesn't make much difference what the input =
buffer is=20
doing, whether it is toggling, etc.&nbsp; Just sweep the input pin's =
voltage and=20
measure the input current.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>Hope this helps.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>Regards,</FONT></DIV>
<DIV><FONT face=3DArial size=3D2>Andy</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<BLOCKQUOTE dir=3Dltr=20
style=3D"PADDING-RIGHT: 0px; PADDING-LEFT: 5px; MARGIN-LEFT: 5px; =
BORDER-LEFT: #000000 2px solid; MARGIN-RIGHT: 0px">
  <P><FONT face=3DArial size=3D2>How can I extract V-I curves when the =
O/P of my=20
  buffer is edge-triggered</FONT> <BR><FONT face=3DArial size=3D2>and =
not=20
  level-sensitive?</FONT> </P>
  <P><FONT face=3DArial size=3D2>Basically, I have to do DC sweep to =
extract these=20
  curves.But I cannot </FONT><BR><FONT face=3DArial size=3D2>connect my =
inputs to=20
  steady voltage values as the O/P is edge-triggered, which</FONT> =
<BR><FONT=20
  face=3DArial size=3D2>needs transient analysis.</FONT> </P>
  <P><FONT face=3DArial size=3D2>Would anyone of you please let me know =
how to go=20
  about these buffers to extract</FONT> <BR><FONT face=3DArial =
size=3D2>VI=20
  curves?</FONT> </P>
  <P><FONT face=3DArial size=3D2>Thanks in advance,</FONT> <BR><FONT =
face=3DArial=20
  size=3D2>Sivaram</FONT></P></BLOCKQUOTE></BODY></HTML>

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------------------------------

Date: Wed, 6 Jul 2005 16:26:11 -0700
From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
Subject: [IBIS-Users] FW: *-AMS language versions in IBIS

Hello everyone,
 
I would like to generate discussion on VHDL-AMS and Verilog-AMS version
numbers in the IBIS specification.  The IBIS 4.1 spec says, in part, the
following:
 
| "VHDL-AMS" refers to "IEEE Standard VHDL Analog and Mixed-Signal
| Extensions", approved March 18, 1999 by the IEEE-SA Standards Board
and
| designated IEEE Std. 1076.1-1999.
|
| "Verilog-AMS" refers to the Analog and Mixed-Signal Extensions to
| Verilog-HDL as documented in the Verilog-AMS Language Reference,
Version
| 2.0.  

Please note that the *-AMS version numbers mentioned in the IBIS spec
are
fixed values.  Verilog-AMS is already past Version 2.2 of its LRM, and
VHDL-AMS is due for a five-year renewal soon.

As written, every time new version of these languages comes out, the
IBIS
specification will have to be updated to change the *-AMS version
numbers.
With IBIS updates occurring very infrequently, new and useful features
in
the *-AMS specifications may not be available to the IBIS community for
over a year (or more) after the new LRMs are approved.

In attempt to remedy this problem, I authored BIRD99 which can be found
at:  http://www.vhdl.org/pub/ibis/birds/bird99.txt.  The BIRD makes the
*-AMS
language versions listed in the IBIS specification the *minimum*
supported
set, but permits support of more recent versions.

From my perspective as a model-maker and user, there are times when I
cannot
solve certain modeling problems without some of the latest features in
the
*-AMS languages and tools.  This is not permitted in IBIS 4.1, as
written.
However, I understand there are other views on this situation, which
became
apparent in our (healthy) debate in the last IBIS Open Forum
teleconference.
I would like to continue and expand the discussion here to get a better
overall picture on the problem so we can find the best solution for this
problem.

Please express your opinions and needs, so we could make a wise decision
for the IBIS specification.

Thanks,

Arpad
========================================================================
====

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------------------------------

Date: Thu, 07 Jul 2005 23:51:30 +0000
From: "lau yy" <tok47@hotmail.com>
Subject: [IBIS-Users] rising waveform

<html><div style='background-color:'><DIV class=RTE>Dear ALL,</DIV>
<DIV class=RTE>&nbsp;</DIV>
<DIV class=RTE>Can someone show me my mistake? The warning message like below.</DIV>
<DIV class=RTE>&nbsp;</DIV>
<DIV class=RTE>WARNING - Model DQ0: The [Rising Waveform] <BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; with [R_fixture]=70 Ohms and [V_fixture_max]=3.1V<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; has MAX column DC endpoints of&nbsp; 1.74V and&nbsp; 3.10v, but<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; an equivalent load applied to the model's I-V tables yields<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; different voltages ( 1.71V and&nbsp; 3.10V),<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; a difference of&nbsp; 1.94% and&nbsp; 0.01%, respectively.<BR></DIV>
<DIV class=RTE>Thanks alot.</DIV>
<DIV class=RTE>&nbsp;</DIV>
<DIV class=RTE>&nbsp;</DIV>
<DIV class=RTE>&nbsp;</DIV>
<DIV class=RTE>rdgs</DIV>
<DIV class=RTE>yylau</DIV></div></html>

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------------------------------

Date: Thu, 7 Jul 2005 17:08:48 -0700
From: "Tom Dagostino" <tom@teraspeed.com>
Subject: RE: [IBIS-Users] rising waveform

This is a multi-part message in MIME format.

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	charset="iso-8859-1"
Content-Transfer-Encoding: 7bit

There are several different reasons why this can occur.  First is you did
not let the waveform complete its rise (but that does not seem to be the
case here), second the 70 Ohms in the model does not match the load used in
the VT extraction.  Third, the termination voltage used in the extraction
does not match the one in the model.  Forth, the summation of the clamp and
pullup tables does not match the characteristics of the buffer as
simulated., etc.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

  -----Original Message-----
  From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On Behalf
Of lau yy
  Sent: Thursday, July 07, 2005 4:52 PM
  To: ibis-users@eda.org
  Subject: [IBIS-Users] rising waveform


  Dear ALL,

  Can someone show me my mistake? The warning message like below.

  WARNING - Model DQ0: The [Rising Waveform]
        with [R_fixture]=70 Ohms and [V_fixture_max]=3.1V
        has MAX column DC endpoints of  1.74V and  3.10v, but
        an equivalent load applied to the model's I-V tables yields
        different voltages ( 1.71V and  3.10V),
        a difference of  1.94% and  0.01%, respectively.

  Thanks alot.



  rdgs
  yylau
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 6.00.2900.2668" name=3DGENERATOR></HEAD>
<BODY>
<DIV><SPAN class=3D687350400-08072005><FONT face=3DArial color=3D#0000ff =
size=3D2>There=20
are several different reasons why this can occur.&nbsp; First is you did =
not let=20
the waveform complete its rise (but that does not seem to be the case =
here),=20
second the 70 Ohms in the model does not match the load used in the VT=20
extraction.&nbsp; Third, the termination voltage used in the extraction =
does not=20
match the one in the model.&nbsp; Forth, the summation of the clamp and =
pullup=20
tables does not match the characteristics of the buffer as simulated.,=20
etc.</FONT></SPAN></DIV>
<DIV>&nbsp;</DIV>
<P><FONT size=3D2>Tom Dagostino<BR>Teraspeed(R) Labs<BR>13610 SW Harness =

Lane<BR>Beaverton, OR=20
97008<BR>503-430-1065<BR>tom@teraspeed.com<BR>www.teraspeed.com<BR><BR>Te=
raspeed=20
Consulting Group LLC<BR>121 North River Drive<BR>Narragansett, RI=20
02882<BR>401-284-1827</FONT> </P>
<BLOCKQUOTE>
  <DIV class=3DOutlookMessageHeader dir=3Dltr align=3Dleft><FONT =
face=3DTahoma=20
  size=3D2>-----Original Message-----<BR><B>From:</B> =
owner-ibis-users@eda.org=20
  [mailto:owner-ibis-users@eda.org]<B>On Behalf Of </B>lau =
yy<BR><B>Sent:</B>=20
  Thursday, July 07, 2005 4:52 PM<BR><B>To:</B>=20
  ibis-users@eda.org<BR><B>Subject:</B> [IBIS-Users] rising=20
  waveform<BR><BR></FONT></DIV>
  <DIV>
  <DIV class=3DRTE>Dear ALL,</DIV>
  <DIV class=3DRTE>&nbsp;</DIV>
  <DIV class=3DRTE>Can someone show me my mistake? The warning message =
like=20
  below.</DIV>
  <DIV class=3DRTE>&nbsp;</DIV>
  <DIV class=3DRTE>WARNING - Model DQ0: The [Rising Waveform]=20
  <BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; with [R_fixture]=3D70 Ohms and=20
  [V_fixture_max]=3D3.1V<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; has MAX =
column DC=20
  endpoints of&nbsp; 1.74V and&nbsp; 3.10v,=20
  but<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; an equivalent load applied to =
the=20
  model's I-V tables yields<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; different =
voltages=20
  ( 1.71V and&nbsp; 3.10V),<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; a =
difference=20
  of&nbsp; 1.94% and&nbsp; 0.01%, respectively.<BR></DIV>
  <DIV class=3DRTE>Thanks alot.</DIV>
  <DIV class=3DRTE>&nbsp;</DIV>
  <DIV class=3DRTE>&nbsp;</DIV>
  <DIV class=3DRTE>&nbsp;</DIV>
  <DIV class=3DRTE>rdgs</DIV>
  <DIV=20
  =
class=3DRTE>yylau</DIV></DIV>|-------------------------------------------=
- -----------------------=20
  |For help or to subscribe/unsubscribe, email majordomo@eda.org |with =
just the=20
  appropriate command message(s) in the body: | | help | subscribe ibis=20
  <OPTIONAL different if address, e-mail>| subscribe ibis-users =
<OPTIONAL=20
  different if address, e-mail>| unsubscribe ibis <OPTIONAL different if =

  address, e-mail>| unsubscribe ibis-users <OPTIONAL different if =
address,=20
  e-mail>| |or email a written request to ibis-request@eda.org. | |IBIS=20
  reflector archives exist under: | | =
http://www.eda.org/pub/ibis/email_archive/=20
  Recent | http://www.eda.org/pub/ibis/users_archive/ Recent |=20
  http://www.eda.org/pub/ibis/email/ E-mail since =
1993</BLOCKQUOTE></BODY></HTML>

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------------------------------

Date: Thu, 07 Jul 2005 17:59:29 -0700
From: Bob Ross <bob@teraspeed.com>
Subject: Re: [IBIS-Users] rising waveform

Hl YY Lau:

I would like to see the exact end points of the Rising Waveform
Max table because there is a numerical issue.

The Warning Message should be issued only if the mismatch is
equal to or greater than 2.0% of the total calculated swing.
In this case the swing is from 1.71 to 3.10 V or 1.39, and
2% of this is 0.0278 V.  Your actual mismatch 0.03 V - outside
of the 2% tolerance.  Howover the reported mismatch is 1.91%,
and no Warning should have been issued.

So your starting point might be rounded up to 1.74 from a
smaller value - causing a Warning message, but the actual
values used to calculate the persentages might be the unrounded
values - inside the 2% tolerance.

If this is the case, we are not doing the calculations
and reporting correctly

However, there could be other numerical issues.  I would have
to see the full model to determine this.

Bob

lau yy wrote:
> Dear ALL,
>  
> Can someone show me my mistake? The warning message like below.
>  
> WARNING - Model DQ0: The [Rising Waveform]
>       with [R_fixture]=70 Ohms and [V_fixture_max]=3.1V
>       has MAX column DC endpoints of  1.74V and  3.10v, but
>       an equivalent load applied to the model's I-V tables yields
>       different voltages ( 1.71V and  3.10V),
>       a difference of  1.94% and  0.01%, respectively.
> Thanks alot.
>  
>  
>  
> rdgs
> yylau
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- -- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Labs
121 North River Drive              13610 SW Harness Lane
Narragansett, RI 02882             Beaverton, OR 97008
401-284-1827                       503-430-1065
http://www.teraspeed.com           503-246-8048 Direct
bob@teraspeed.com

Teraspeed is a registered service mark of Teraspeed Consulting Group LLC

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------------------------------

Date: Thu, 07 Jul 2005 19:28:38 -0700
From: Bob Ross <bob@teraspeed.com>
Subject: [IBIS-Users] Re: [IBIS] FW: *-AMS language versions in IBIS

Arpad:

I support your view.  The presumption is that the interested groups
advancing the standardized languages are providing corrections and
important advances to serve the industry.  IBIS should be able to
make use of the advances when officially available.

Some new features may take time to adopt.  However, that is not a
valid reason for purposefully keeping IBIS fixed on a previous
version.  This creates the problem of when to advance the verision
to some new, but non-current level.  We cannot have any process
based on commerical concensus because industrial plans are
confidential and outside the scope of what IBIS can discuss.

Instead, we must provide the best feature set to industry as a target
(and reward) for the first company to adopt.  Others can follow if
it makes business sense.  This keeps us out of confidential product
development issues while automatically keeping IBIS up to date.

However, the burden of what features to use shifts to the model
developer.  The model developer must know what features exist in
the target tools of interest and use alternative (perhaps less
optimal) approaches in order for the models to work and be validated.
Otherwise the models would not be tested - a very dangerous practice.

Bob

Muranyi, Arpad wrote:

> Hello everyone,
>  
> I would like to generate discussion on VHDL-AMS and Verilog-AMS version
> numbers in the IBIS specification.  The IBIS 4.1 spec says, in part, the
> following:
>  
> | "VHDL-AMS" refers to "IEEE Standard VHDL Analog and Mixed-Signal
> | Extensions", approved March 18, 1999 by the IEEE-SA Standards Board
> and
> | designated IEEE Std. 1076.1-1999.
> |
> | "Verilog-AMS" refers to the Analog and Mixed-Signal Extensions to
> | Verilog-HDL as documented in the Verilog-AMS Language Reference,
> Version
> | 2.0.  
> 
> Please note that the *-AMS version numbers mentioned in the IBIS spec
> are
> fixed values.  Verilog-AMS is already past Version 2.2 of its LRM, and
> VHDL-AMS is due for a five-year renewal soon.
> 
> As written, every time new version of these languages comes out, the
> IBIS
> specification will have to be updated to change the *-AMS version
> numbers.
> With IBIS updates occurring very infrequently, new and useful features
> in
> the *-AMS specifications may not be available to the IBIS community for
> over a year (or more) after the new LRMs are approved.
> 
> In attempt to remedy this problem, I authored BIRD99 which can be found
> at:  http://www.vhdl.org/pub/ibis/birds/bird99.txt.  The BIRD makes the
> *-AMS
> language versions listed in the IBIS specification the *minimum*
> supported
> set, but permits support of more recent versions.
> 
>>From my perspective as a model-maker and user, there are times when I
> cannot
> solve certain modeling problems without some of the latest features in
> the
> *-AMS languages and tools.  This is not permitted in IBIS 4.1, as
> written.
> However, I understand there are other views on this situation, which
> became
> apparent in our (healthy) debate in the last IBIS Open Forum
> teleconference.
> I would like to continue and expand the discussion here to get a better
> overall picture on the problem so we can find the best solution for this
> problem.
> 
> Please express your opinions and needs, so we could make a wise decision
> for the IBIS specification.
> 
> Thanks,
> 
> Arpad
> ========================================================================
> ====
> 
> -----------------------------------------------------------------
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- -- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Labs
121 North River Drive              13610 SW Harness Lane
Narragansett, RI 02882             Beaverton, OR 97008
401-284-1827                       503-430-1065
http://www.teraspeed.com           503-246-8048 Direct
bob@teraspeed.com

Teraspeed is a registered service mark of Teraspeed Consulting Group LLC

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------------------------------

Date: Fri, 8 Jul 2005 08:54:03 +0530
From: "Vivek Kumar Sundriyal" <Vivek.Kumar.Sundriyal@nsc.com>
Subject: Re: [IBIS-Users] rising waveform

Lau ,

I also had a similar problem sometime back. And the way to resolve is to
increase the simulation time.
In your case, a small increase in sim time should do the job.

Cheers ,

Vivek






                                                                                                                   
                      "lau yy"                                                                                     
                      <tok47@hotmail.co        To:       ibis-users@eda.org                                        
                      m>                       cc:                                                                 
                      Sent by:                 Subject:  [IBIS-Users] rising waveform                              
                      owner-ibis-users@                                                                            
                      eda.org                                                                                      
                                                                                                                   
                                                                                                                   
                      07/08/05 05:21 AM                                                                            
                                                                                                                   
                                                                                                                   




Dear ALL,

Can someone show me my mistake? The warning message like below.

WARNING - Model DQ0: The [Rising Waveform]
      with [R_fixture]=70 Ohms and [V_fixture_max]=3.1V
      has MAX column DC endpoints of  1.74V and  3.10v, but
      an equivalent load applied to the model's I-V tables yields
      different voltages ( 1.71V and  3.10V),
      a difference of  1.94% and  0.01%, respectively.
Thanks alot.



rdgs
yylau
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http://www.eda.org/pub/ibis/email/ E-mail since 1993



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------------------------------

Date: Thu, 7 Jul 2005 23:43:41 -0400
From: "Andrew Ingraham" <a.ingraham@ieee.org>
Subject: Re: [IBIS-Users] rising waveform

> I also had a similar problem sometime back. And the way to resolve is to
> increase the simulation time.
> In your case, a small increase in sim time should do the job.

Probably not in this case.  This case is different.

The final endpoint has an error of only 0.01%.  It is the starting point
that is off and is triggering the warning message.

I think the other reasons cited by Tom Dagostino are where you should look.

Another possibility is that the leading edge of the V/T data was manually
truncated, and a little too much of it was cut off.

Regards,
Andy

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------------------------------

Date: Thu, 7 Jul 2005 21:19:45 -0700
From: "Tom Dagostino" <tom@teraspeed.com>
Subject: RE: [IBIS-Users] rising waveform

I don't think this is the case in this model.  The rising edge is the
problem area.  The end of the rise makes it to the power supply voltage of
3.10 Volts.  Increasing the simulation time will only get you more of the
output at 3.10 Volts.  The issue is the starting voltage being higher than
the IV curves predict.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On
Behalf Of Vivek Kumar Sundriyal
Sent: Thursday, July 07, 2005 8:24 PM
To: lau yy
Cc: ibis-users@eda.org; owner-ibis-users@eda.org
Subject: Re: [IBIS-Users] rising waveform


Lau ,

I also had a similar problem sometime back. And the way to resolve is to
increase the simulation time.
In your case, a small increase in sim time should do the job.

Cheers ,

Vivek







                      "lau yy"
                      <tok47@hotmail.co        To:       ibis-users@eda.org
                      m>                       cc:
                      Sent by:                 Subject:  [IBIS-Users] rising
waveform
                      owner-ibis-users@
                      eda.org


                      07/08/05 05:21 AM






Dear ALL,

Can someone show me my mistake? The warning message like below.

WARNING - Model DQ0: The [Rising Waveform]
      with [R_fixture]=70 Ohms and [V_fixture_max]=3.1V
      has MAX column DC endpoints of  1.74V and  3.10v, but
      an equivalent load applied to the model's I-V tables yields
      different voltages ( 1.71V and  3.10V),
      a difference of  1.94% and  0.01%, respectively.
Thanks alot.



rdgs
yylau
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------------------------------

Date: Fri, 8 Jul 2005 23:28:47 -0700
From: "Mirmak, Michael" <michael.mirmak@intel.com>
Subject: [IBIS-Users] Agenda, IBIS Open Forum teleconference for July 15, 2005

                IBIS Open Forum Meeting Agenda 
                       for July 15, 2005 
   
        Telephone Number    Bridge        Passcode 
         1-916-356-2663       1           966-3181
   
  All meetings are 8:00 AM to 9:55 AM US Pacific Time. When calling 
  into the meeting, provide the bridge number and passcode at 
  the automated prompts. If asked by an operator, please request 
  to join the IBIS Open Forum hosted by Michael Mirmak. 
   
  For international numbers, please contact Michael Mirmak. 
   
  8:00 Check-In, Intros, Announcements                     Mirmak 
       - Intros of New IBIS Participants, Meeting Quorum   Mirmak 
       - Call for Patents                                  Mirmak 
       - Membership Update and Treasurer's Report          Mirmak 
       - Review of Previous Meeting's Minutes (and ARs)    Mirmak  
           June 24, 2005 Open Forum Minutes 
       - Web Page Updates                                  Huq 
       - Mailing List Administration                       Ross
       - Library Update                                    Wang 
       - Announcements, Opens for New Issues               All 
   
  8:15 Project Discussions and Subcommittee Reports
 
       International/External Progress 
       - IEC TC47                                          Ross
       - Other activities                                  All 
   
       EIA, ANSI Approval Activities                       Wolff 

       ICM 1.1 Specification Status                        Green/Mirmak
       - Call for Approval Vote

       Summit Status                                       All
       - DesignCon East
       - Asian IBIS Summit 
       - Other Events 

       Subcommittee Reports           
       - Quality                                           Haller 
       - Model Review                                      Green 
       - Futures                                           Mirmak 
       - Cookbook                                          Mirmak 
     
       New Issues                                          All 
   
  8:45 Technical Discussion 
   
       BIRD99: AMS Language Versions                       Muranyi

       BIRD94.1: Clarifications on [Diff Pin] Parameters   Muranyi

       BIRD95.5: Power Integrity Analysis using IBIS       Huq et al

       BIRD97.2: Gate Modulation Effect                    Muranyi

       BIRD98: Gate Modulation Effect (table format)       Muranyi

       IBISCHK4 BUG Status                                 Angulo/Mirmak


       ICMCHK1 BUG Status                                  Green/Mirmak

       New Technical Issues                                All 
   
  9:50 Wrap Up and Next Meeting Plans                      Mirmak 
       - August 5, 2005 IBIS Open Forum
   
  9:55 Sign Off 

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Date: Mon, 11 Jul 2005 17:40:21 +0530
From: "Vivek Kumar Sundriyal" <Vivek.Kumar.Sundriyal@nsc.com>
Subject: [IBIS-Users] Warning - "Typical value never becomes zero"

Hi ,

I have developed the IBIS model using s2ibis3 and I am using IBIS version 3.2

When I compile the .ibs file, I get the following warning  :

WARNING -
    Model MODEL1: POWER Clamp : Typical value never becomes zero
WARNING -
    Model MODEL1: POWER Clamp : Minimum value never becomes zero
WARNING -
    Model MODEL1: POWER Clamp : Maximum value never becomes zero


On looking at the Power clamp data, the current values that I get at 0.0V are :
0.3193mA      72.3000uA      0.6643mA
for typ,min and max respectively.

Can anyone elaborate on this warning ?

And how serious is this ?


Cheers ,

Vivek





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------------------------------

Date: Mon, 11 Jul 2005 14:52:03 +0200
From: <Radovan.Vuletic@infineon.com>
Subject: [IBIS-Users] Differences between Hspice netlist simulation and Hspice B-element simulation - bug or feature?

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Hi IBIS Experts,

I have extracted IBIS model. To check the quality of this model I have =
compared the results of simulation on Hspice B-element with simulation =
on netlist -
that means, I have used exactly the same stimuli applied on B-element =
and on netlist (IBIS is extracted out of this netlist).

What is disturbing me is that I see a difference between B-element and =
netlist waveforms, i.e. B-element is always delayed in comparison to =
netlist result. What is even more disturbing is that this delay is not =
the same for rising and falling edge. Rising edge of B-element is =
delayed for around 20ps and falling edge of B-element is delayed for =
around 40ps. I have a feeling that this delay is somehow connected with =
transient analysis step (.TRAN 1.96e-11 1.96e-09) but I am not sure. =
Once again, I apply exactly the same stimuli on B-element and on netlist =
(and of course the same termination - load). Has that to do something =
with some version of Hspice or it is a problem of IBIS extraction tool =
(s2ibis2)?

So the question is: Is this difference between B-element and Hspice bug =
or feature? If it is bug is it a problem of s2ibis2 or I perhaps the =
question what is Hspice doing with B-element? And finally - what should =
I do to repair the problem?

Many thanks for any advice!
Radovan

Best regards / Mit freundlichen Gr=FC=DFen / S po=B9tovanjem
Radovan Vuleti=E6

Infineon Technologies AG
MP PD PDE
Room 03.911
Balanstra=DFe 73
D-81541 M=FCnchen

Phone:		+49 (0)89 234 20108
Fax:		+49 (0)89 234 27705
Fax (PC):	+49 (0)89 234 955 5305=20

E-mail: radovan.vuletic@infineon.com


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B-element simulation - bug or feature?</TITLE>
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<!-- Converted from text/rtf format -->

<P><FONT SIZE=3D2 FACE=3D"Arial">Hi IBIS Experts,</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">I have extracted IBIS model. To check =
the quality of this model I have compared the results of simulation on =
Hspice B-element with simulation on netlist -</FONT></P>

<P><FONT SIZE=3D2 FACE=3D"Arial">that means, I have used exactly the =
same stimuli applied on B-element and on netlist (IBIS is extracted out =
of this netlist).</FONT></P>

<P><FONT SIZE=3D2 FACE=3D"Arial">What is disturbing me is that I see a =
difference between B-element and netlist waveforms, i.e. B-element is =
always delayed in comparison to netlist result. What is even more =
disturbing is that this delay is not the same for rising and falling =
edge. Rising edge of B-element is delayed for around 20ps and falling =
edge of B-element is delayed for around 40ps. I have a feeling that this =
delay is somehow connected with transient analysis step (.TRAN 1.96e-11 =
1.96e-09) but I am not sure. Once again, I apply exactly the same =
stimuli on B-element and on netlist (and of course the same termination =
- - load). Has that to do something with some version of Hspice or it is a =
problem of IBIS extraction tool (s2ibis2)?</FONT></P>

<P><FONT SIZE=3D2 FACE=3D"Arial">So the question is: Is this difference =
between B-element and Hspice bug or feature? If it is bug is it a =
problem of s2ibis2 or I perhaps the question what is Hspice doing with =
B-element? And finally - what should I do to repair the =
problem?</FONT></P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Many thanks for any advice!</FONT>

<BR><FONT SIZE=3D2 FACE=3D"Arial">Radovan</FONT>
</P>

<P><I><FONT SIZE=3D2 FACE=3D"Arial">B<SPAN LANG=3D"de">est regards / Mit =
freundlichen Gr=FC=DFen / S po=B9tovanjem</SPAN><SPAN =
LANG=3D"en-us"></SPAN></FONT></I>

<BR><I><SPAN LANG=3D"en-us"><B><FONT FACE=3D"Arial CE">Radovan =
Vuleti=E6</FONT></B></SPAN></I>
</P>

<P><SPAN LANG=3D"en-us"><FONT COLOR=3D"#FF0000" SIZE=3D2 =
FACE=3D"Arial">Infineon Technologies AG</FONT></SPAN>

<BR><SPAN LANG=3D"en-us"><FONT COLOR=3D"#FF0000" SIZE=3D2 =
FACE=3D"Arial">MP</FONT></SPAN><SPAN LANG=3D"de"> <FONT =
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------------------------------

Date: Mon, 11 Jul 2005 18:25:38 +0530
From: <nilimp.vipul@wipro.com>
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"

Hi Vivek,

I have the following opinion about your problem.

1) For 0.0V as input your typical and maximum current values are
significantly higher than they should be. The minimum current value is
tolerable. They should be in micro-amps(i.e extremely low...very close
to 0.0 A). Hence the errors.

2)You can remove the "Model MODEL1: POWER Clamp : Minimum value never
becomes zero WARNING " by simply changing the
Minimum current to 0.3000uA from 72.3000uA. Since the current is already
in micro-Amperes this change will be quite insignifucant.

3)However you cannot do this to your typ and max curent readings, since
such a change will be considered as a significant change. I suggest you
go back to your netlist design,source files and check the Power Clamp
part once again.

Hope this helps.

Regards,
Nilimp Bhatt

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Vivek Kumar Sundriyal
Sent: Monday, July 11, 2005 5:40 PM
To: ibis-users@eda.org
Subject: [IBIS-Users] Warning - "Typical value never becomes zero"


Hi ,

I have developed the IBIS model using s2ibis3 and I am using IBIS
version 3.2

When I compile the .ibs file, I get the following warning  :

WARNING -
    Model MODEL1: POWER Clamp : Typical value never becomes zero WARNING
- -
    Model MODEL1: POWER Clamp : Minimum value never becomes zero WARNING
- -
    Model MODEL1: POWER Clamp : Maximum value never becomes zero


On looking at the Power clamp data, the current values that I get at
0.0V are :
0.3193mA      72.3000uA      0.6643mA
for typ,min and max respectively.

Can anyone elaborate on this warning ?

And how serious is this ?


Cheers ,

Vivek





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------------------------------

Date: Mon, 11 Jul 2005 17:28:11 +0200
From: <Radovan.Vuletic@infineon.com>
Subject: [IBIS-Users] C_comp

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Hi IBIS experts (once again),

Now about C_comp: in IBIS specification is written that the C_comp =
defines the silicon die capacitance and that influences [Ramp] =
parameters. Question would be how (is it used as capacitive load)?
Is the [Ramp] the only parameter that is influenced by C_comp =
influences, or there are some other things too?

I mean, when I generate [Rising Waveform] and [Falling Waveform] =
intrinsic capacitances of  drivers and receivers, ESD structures and =
wiring are already accounted (in netlist), so I assume that taking into =
the account C_comp too would be kind of double counting.=20

Later, when simulation tool is using IBIS model, if there are [Rising =
Waveform] and [Falling Waveform] this waveforms will be taken, so the =
information about driver/receiver, ESD and wiring capacitances will be =
"extracted" out of this curves, C_comp is not used - true or not?

If there are no [Rising Waveform] or [Falling Waveform] the [Ramp] =
parameter will be taken (true or not?). In this case simulation tool is =
using only [Ramp] data (this data intrinsically contain C_comp), so the =
C_comp is not used (true or not?)

Once again, many thanks for any help!
Regards,
Radovan

Best regards / Mit freundlichen Gr=FC=DFen / S po=B9tovanjem
Radovan Vuleti=E6

Infineon Technologies AG
MP PD PDE
Room 03.911
Balanstra=DFe 73
D-81541 M=FCnchen

Phone:		+49 (0)89 234 20108
Fax:		+49 (0)89 234 27705
Fax (PC):	+49 (0)89 234 955 5305=20

E-mail: radovan.vuletic@infineon.com


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<P><FONT SIZE=3D2 FACE=3D"Arial">Hi IBIS experts (once again),</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Now about C_comp: in IBIS specification =
is written that the C_comp defines the silicon die capacitance and that =
influences [Ramp] parameters. Question would be how (is it used as =
capacitive load)?</FONT></P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Is the [Ramp] the only parameter that =
is influenced by C_comp influences, or there are some other things =
too?</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Arial">I mean, when I generate [Rising =
Waveform] and [Falling Waveform] intrinsic capacitances of&nbsp; drivers =
and receivers, ESD structures and wiring are already accounted (in =
netlist), so I assume that taking into the account C_comp too would be =
kind of double counting. </FONT></P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Later, when simulation tool is using =
IBIS model, if there are [Rising Waveform] and [Falling Waveform] this =
waveforms will be taken, so the information about driver/receiver, ESD =
and wiring capacitances will be &quot;extracted&quot; out of this =
curves, C_comp is not used - true or not?</FONT></P>

<P><FONT SIZE=3D2 FACE=3D"Arial">If there are no [Rising Waveform] or =
[Falling Waveform] the [Ramp] parameter will be taken (true or not?). In =
this case simulation tool is using only [Ramp] data (this data =
intrinsically contain C_comp), so the C_comp is not used (true or =
not?)</FONT></P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Once again, many thanks for any =
help!</FONT>

<BR><FONT SIZE=3D2 FACE=3D"Arial">Regards,</FONT>

<BR><FONT SIZE=3D2 FACE=3D"Arial">Radovan</FONT>
</P>

<P><I><FONT SIZE=3D2 FACE=3D"Arial">B<SPAN LANG=3D"de">est regards / Mit =
freundlichen Gr=FC=DFen / S po=B9tovanjem</SPAN><SPAN =
LANG=3D"en-us"></SPAN></FONT></I>

<BR><I><SPAN LANG=3D"en-us"><B><FONT FACE=3D"Arial CE">Radovan =
Vuleti=E6</FONT></B></SPAN></I>
</P>

<P><SPAN LANG=3D"en-us"><FONT COLOR=3D"#FF0000" SIZE=3D2 =
FACE=3D"Arial">Infineon Technologies AG</FONT></SPAN>

<BR><SPAN LANG=3D"en-us"><FONT COLOR=3D"#FF0000" SIZE=3D2 =
FACE=3D"Arial">MP</FONT></SPAN><SPAN LANG=3D"de"> <FONT =
COLOR=3D"#FF0000" SIZE=3D2 FACE=3D"Arial">PD PDE</FONT></SPAN><SPAN =
LANG=3D"en-us"></SPAN>

<BR><SPAN LANG=3D"en-us"><FONT SIZE=3D2 FACE=3D"Arial">Room =
03.911</FONT></SPAN>

<BR><SPAN LANG=3D"en-us"><FONT COLOR=3D"#000000" SIZE=3D2 =
FACE=3D"Arial">Balanstra=DFe 73</FONT></SPAN>

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LANG=3D"en-us"></SPAN>
</P>

<P><SPAN LANG=3D"en-us"><FONT COLOR=3D"#0000FF" SIZE=3D2 =
FACE=3D"Arial">Phone:&nbsp; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +49 (0)89 234 =
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------------------------------

Date: Mon, 11 Jul 2005 08:56:13 -0700
From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
Subject: RE: [IBIS-Users] C_comp

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Radovan,
=20
IBIS simulators have a special algorithm which doesn't
allow the C_comp to load the Vt curves or ramp in the
model, but allows it to be visible for signals which
arrive at the model.  IN other words it is not visible
from the inside out, but it is visible from the outside
in.
=20
Correct, when there is not Vt data in a model, Ramps
are used.
=20
Arpad
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D

________________________________

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On =
Behalf Of Radovan.Vuletic@infineon.com
Sent: Monday, July 11, 2005 8:28 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] C_comp



Hi IBIS experts (once again),=20

Now about C_comp: in IBIS specification is written that the C_comp =
defines the silicon die capacitance and that influences [Ramp] =
parameters. Question would be how (is it used as capacitive load)?

Is the [Ramp] the only parameter that is influenced by C_comp =
influences, or there are some other things too?=20

I mean, when I generate [Rising Waveform] and [Falling Waveform] =
intrinsic capacitances of  drivers and receivers, ESD structures and =
wiring are already accounted (in netlist), so I assume that taking into =
the account C_comp too would be kind of double counting.=20

Later, when simulation tool is using IBIS model, if there are [Rising =
Waveform] and [Falling Waveform] this waveforms will be taken, so the =
information about driver/receiver, ESD and wiring capacitances will be =
"extracted" out of this curves, C_comp is not used - true or not?

If there are no [Rising Waveform] or [Falling Waveform] the [Ramp] =
parameter will be taken (true or not?). In this case simulation tool is =
using only [Ramp] data (this data intrinsically contain C_comp), so the =
C_comp is not used (true or not?)

Once again, many thanks for any help!=20
Regards,=20
Radovan=20

Best regards / Mit freundlichen Gr=FC=DFen / S po=B9tovanjem=20
Radovan Vuleti=E6=20

Infineon Technologies AG=20
MP PD PDE=20
Room 03.911=20
Balanstra=DFe 73=20
D-81541 M=FCnchen=20

Phone:          +49 (0)89 234 20108=20
Fax:            +49 (0)89 234 27705=20
Fax (PC):       +49 (0)89 234 955 5305=20

E-mail: radovan.vuletic@infineon.com=20


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	charset="iso-8859-2"
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD><TITLE>C_comp</TITLE>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-2">
<META content=3D"MSHTML 6.00.2800.1498" name=3DGENERATOR></HEAD>
<BODY>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>Radovan,</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>IBIS simulators have a special algorithm =
which=20
doesn't</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>allow the C_comp to load the Vt curves or =
ramp in=20
the</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>model, but allows it to be visible for =
signals=20
which</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>arrive at the model.&nbsp; IN other words it =
is not=20
visible</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>from the inside out, but it is visible from =
the=20
outside</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>in.</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>Correct, when there is not Vt data in a =
model,=20
Ramps</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>are used.</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>Arpad</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D418425315-11072005>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D</SPAN></FONT></DIV><BR>
<DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr align=3Dleft>
<HR tabIndex=3D-1>
<FONT face=3DTahoma size=3D2><B>From:</B> owner-ibis-users@eda.org=20
[mailto:owner-ibis-users@eda.org] <B>On Behalf Of=20
</B>Radovan.Vuletic@infineon.com<BR><B>Sent:</B> Monday, July 11, 2005 =
8:28=20
AM<BR><B>To:</B> ibis-users@eda.org<BR><B>Subject:</B> [IBIS-Users]=20
C_comp<BR></FONT><BR></DIV>
<DIV></DIV><!-- Converted from text/rtf format -->
<P><FONT face=3DArial size=3D2>Hi IBIS experts (once again),</FONT> </P>
<P><FONT face=3DArial size=3D2>Now about C_comp: in IBIS specification =
is written=20
that the C_comp defines the silicon die capacitance and that influences =
[Ramp]=20
parameters. Question would be how (is it used as capacitive =
load)?</FONT></P>
<P><FONT face=3DArial size=3D2>Is the [Ramp] the only parameter that is =
influenced=20
by C_comp influences, or there are some other things too?</FONT> </P>
<P><FONT face=3DArial size=3D2>I mean, when I generate [Rising Waveform] =
and=20
[Falling Waveform] intrinsic capacitances of&nbsp; drivers and =
receivers, ESD=20
structures and wiring are already accounted (in netlist), so I assume =
that=20
taking into the account C_comp too would be kind of double counting. =
</FONT></P>
<P><FONT face=3DArial size=3D2>Later, when simulation tool is using IBIS =
model, if=20
there are [Rising Waveform] and [Falling Waveform] this waveforms will =
be taken,=20
so the information about driver/receiver, ESD and wiring capacitances =
will be=20
"extracted" out of this curves, C_comp is not used - true or =
not?</FONT></P>
<P><FONT face=3DArial size=3D2>If there are no [Rising Waveform] or =
[Falling=20
Waveform] the [Ramp] parameter will be taken (true or not?). In this =
case=20
simulation tool is using only [Ramp] data (this data intrinsically =
contain=20
C_comp), so the C_comp is not used (true or not?)</FONT></P>
<P><FONT face=3DArial size=3D2>Once again, many thanks for any =
help!</FONT>=20
<BR><FONT face=3DArial size=3D2>Regards,</FONT> <BR><FONT face=3DArial=20
size=3D2>Radovan</FONT> </P>
<P><I><FONT face=3DArial size=3D2>B<SPAN lang=3Dde>est regards / Mit =
freundlichen=20
Gr=FC=DFen / S po=B9tovanjem</SPAN><SPAN lang=3Den-us></SPAN></FONT></I> =
<BR><I><SPAN=20
lang=3Den-us><B><FONT face=3D"Arial CE">Radovan =
Vuleti=E6</FONT></B></SPAN></I> </P>
<P><SPAN lang=3Den-us><FONT face=3DArial color=3D#ff0000 =
size=3D2>Infineon Technologies=20
AG</FONT></SPAN> <BR><SPAN lang=3Den-us><FONT face=3DArial =
color=3D#ff0000=20
size=3D2>MP</FONT></SPAN><SPAN lang=3Dde> <FONT face=3DArial =
color=3D#ff0000 size=3D2>PD=20
PDE</FONT></SPAN><SPAN lang=3Den-us></SPAN> <BR><SPAN lang=3Den-us><FONT =
face=3DArial=20
size=3D2>Room 03.911</FONT></SPAN> <BR><SPAN lang=3Den-us><FONT =
face=3DArial=20
color=3D#000000 size=3D2>Balanstra=DFe 73</FONT></SPAN> <BR><SPAN =
lang=3Den-us><FONT=20
face=3DArial color=3D#000000 size=3D2>D-81541 M=FC</FONT></SPAN><SPAN =
lang=3Dde><FONT=20
face=3DArial color=3D#000000 size=3D2>nchen</FONT></SPAN><SPAN =
lang=3Den-us></SPAN> </P>
<P><SPAN lang=3Den-us><FONT face=3DArial color=3D#0000ff =
size=3D2>Phone:&nbsp;=20
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +49 (0)89 234 =
20108</FONT></SPAN>=20
<BR><SPAN lang=3Den-us><FONT face=3DArial color=3D#0000ff=20
size=3D2>Fax:&nbsp;&nbsp;&nbsp; =
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +49=20
(0)89 234 27705</FONT></SPAN> <BR><SPAN lang=3Den-us><FONT face=3DArial=20
color=3D#0000ff size=3D2>Fax (PC):&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
+49 (0)89 234=20
955 5305 </FONT></SPAN></P>
<P><SPAN lang=3Den-us><FONT face=3DArial color=3D#0000ff =
size=3D2>E-mail:=20
radovan.vuletic@infineon.com</FONT></SPAN> </P></BODY></HTML>

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------------------------------

Date: Mon, 11 Jul 2005 08:58:39 -0700
From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
Subject: RE: [IBIS-Users] Differences between Hspice netlist simulation and Hspice B-element simulation - bug or feature?

This is a multi-part message in MIME format.

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Radovan,
=20
=20
This could be also a problem with s2ibis.  If you are careful
with time correlating the Vt data you generate with the stimulus
that triggered it, then you should be able to get correct
waveform overlays between your SPICE and IBIS models.  Watch out
for the threshold levels on the SPICE model's input, and the slope
of the stimulus on it also...
=20
Arpad
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

________________________________

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On =
Behalf Of Radovan.Vuletic@infineon.com
Sent: Monday, July 11, 2005 5:52 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] Differences between Hspice netlist simulation and =
Hspice B-element simulation - bug or feature?



Hi IBIS Experts,=20

I have extracted IBIS model. To check the quality of this model I have =
compared the results of simulation on Hspice B-element with simulation =
on netlist -

that means, I have used exactly the same stimuli applied on B-element =
and on netlist (IBIS is extracted out of this netlist).

What is disturbing me is that I see a difference between B-element and =
netlist waveforms, i.e. B-element is always delayed in comparison to =
netlist result. What is even more disturbing is that this delay is not =
the same for rising and falling edge. Rising edge of B-element is =
delayed for around 20ps and falling edge of B-element is delayed for =
around 40ps. I have a feeling that this delay is somehow connected with =
transient analysis step (.TRAN 1.96e-11 1.96e-09) but I am not sure. =
Once again, I apply exactly the same stimuli on B-element and on netlist =
(and of course the same termination - load). Has that to do something =
with some version of Hspice or it is a problem of IBIS extraction tool =
(s2ibis2)?

So the question is: Is this difference between B-element and Hspice bug =
or feature? If it is bug is it a problem of s2ibis2 or I perhaps the =
question what is Hspice doing with B-element? And finally - what should =
I do to repair the problem?

Many thanks for any advice!=20
Radovan=20

Best regards / Mit freundlichen Gr=FC=DFen / S po=B9tovanjem=20
Radovan Vuleti=E6=20

Infineon Technologies AG=20
MP PD PDE=20
Room 03.911=20
Balanstra=DFe 73=20
D-81541 M=FCnchen=20

Phone:          +49 (0)89 234 20108=20
Fax:            +49 (0)89 234 27705=20
Fax (PC):       +49 (0)89 234 955 5305=20

E-mail: radovan.vuletic@infineon.com=20


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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD><TITLE>Differences between Hspice netlist simulation and =
Hspice B-element simulation - bug or feature?</TITLE>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-2">
<META content=3D"MSHTML 6.00.2800.1498" name=3DGENERATOR></HEAD>
<BODY>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2>Radovan,</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2>This could be also a problem with s2ibis.&nbsp; If you are=20
careful</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2>with time correlating the Vt data you generate with the=20
stimulus</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2>that triggered it, then you should be able to get=20
correct</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2>waveform overlays between your SPICE and IBIS models.&nbsp; =
Watch=20
out</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2>for the threshold levels on the SPICE model's input, and the=20
slope</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2>of the stimulus&nbsp;on it&nbsp;also...</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2>Arpad</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D877375615-11072005><FONT =
face=3D"Courier New"=20
size=3D2>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D</FONT></SPAN></=
DIV><BR>
<DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr align=3Dleft>
<HR tabIndex=3D-1>
<FONT face=3DTahoma size=3D2><B>From:</B> owner-ibis-users@eda.org=20
[mailto:owner-ibis-users@eda.org] <B>On Behalf Of=20
</B>Radovan.Vuletic@infineon.com<BR><B>Sent:</B> Monday, July 11, 2005 =
5:52=20
AM<BR><B>To:</B> ibis-users@eda.org<BR><B>Subject:</B> [IBIS-Users] =
Differences=20
between Hspice netlist simulation and Hspice B-element simulation - bug =
or=20
feature?<BR></FONT><BR></DIV>
<DIV></DIV><!-- Converted from text/rtf format -->
<P><FONT face=3DArial size=3D2>Hi IBIS Experts,</FONT> </P>
<P><FONT face=3DArial size=3D2>I have extracted IBIS model. To check the =
quality of=20
this model I have compared the results of simulation on Hspice B-element =
with=20
simulation on netlist -</FONT></P>
<P><FONT face=3DArial size=3D2>that means, I have used exactly the same =
stimuli=20
applied on B-element and on netlist (IBIS is extracted out of this=20
netlist).</FONT></P>
<P><FONT face=3DArial size=3D2>What is disturbing me is that I see a =
difference=20
between B-element and netlist waveforms, i.e. B-element is always =
delayed in=20
comparison to netlist result. What is even more disturbing is that this =
delay is=20
not the same for rising and falling edge. Rising edge of B-element is =
delayed=20
for around 20ps and falling edge of B-element is delayed for around =
40ps. I have=20
a feeling that this delay is somehow connected with transient analysis =
step=20
(.TRAN 1.96e-11 1.96e-09) but I am not sure. Once again, I apply exactly =
the=20
same stimuli on B-element and on netlist (and of course the same =
termination -=20
load). Has that to do something with some version of Hspice or it is a =
problem=20
of IBIS extraction tool (s2ibis2)?</FONT></P>
<P><FONT face=3DArial size=3D2>So the question is: Is this difference =
between=20
B-element and Hspice bug or feature? If it is bug is it a problem of =
s2ibis2 or=20
I perhaps the question what is Hspice doing with B-element? And finally =
- - what=20
should I do to repair the problem?</FONT></P>
<P><FONT face=3DArial size=3D2>Many thanks for any advice!</FONT> =
<BR><FONT=20
face=3DArial size=3D2>Radovan</FONT> </P>
<P><I><FONT face=3DArial size=3D2>B<SPAN lang=3Dde>est regards / Mit =
freundlichen=20
Gr=FC=DFen / S po=B9tovanjem</SPAN><SPAN lang=3Den-us></SPAN></FONT></I> =
<BR><I><SPAN=20
lang=3Den-us><B><FONT face=3D"Arial CE">Radovan =
Vuleti=E6</FONT></B></SPAN></I> </P>
<P><SPAN lang=3Den-us><FONT face=3DArial color=3D#ff0000 =
size=3D2>Infineon Technologies=20
AG</FONT></SPAN> <BR><SPAN lang=3Den-us><FONT face=3DArial =
color=3D#ff0000=20
size=3D2>MP</FONT></SPAN><SPAN lang=3Dde> <FONT face=3DArial =
color=3D#ff0000 size=3D2>PD=20
PDE</FONT></SPAN><SPAN lang=3Den-us></SPAN> <BR><SPAN lang=3Den-us><FONT =
face=3DArial=20
size=3D2>Room 03.911</FONT></SPAN> <BR><SPAN lang=3Den-us><FONT =
face=3DArial=20
color=3D#000000 size=3D2>Balanstra=DFe 73</FONT></SPAN> <BR><SPAN =
lang=3Den-us><FONT=20
face=3DArial color=3D#000000 size=3D2>D-81541 M=FC</FONT></SPAN><SPAN =
lang=3Dde><FONT=20
face=3DArial color=3D#000000 size=3D2>nchen</FONT></SPAN><SPAN =
lang=3Den-us></SPAN> </P>
<P><SPAN lang=3Den-us><FONT face=3DArial color=3D#0000ff =
size=3D2>Phone:&nbsp;=20
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +49 (0)89 234 =
20108</FONT></SPAN>=20
<BR><SPAN lang=3Den-us><FONT face=3DArial color=3D#0000ff=20
size=3D2>Fax:&nbsp;&nbsp;&nbsp; =
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +49=20
(0)89 234 27705</FONT></SPAN> <BR><SPAN lang=3Den-us><FONT face=3DArial=20
color=3D#0000ff size=3D2>Fax (PC):&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
+49 (0)89 234=20
955 5305 </FONT></SPAN></P>
<P><SPAN lang=3Den-us><FONT face=3DArial color=3D#0000ff =
size=3D2>E-mail:=20
radovan.vuletic@infineon.com</FONT></SPAN> </P></BODY></HTML>

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------------------------------

Date: Mon, 11 Jul 2005 10:20:52 -0700
From: "Tom Dagostino" <tom@teraspeed.com>
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"

Before you change your model you need to understand what is causing the
currents that you see.  Is there some kind of weak pulldown device
associated with his input?

If you just change one entry in your IV tables you are likely to cause other
problems.  You have not shown us any other data from the tables.  If you
just change the 0.00V current value you will likely get a non-monotonic
error.

Warnings are OK in IBIS models if you have done the engineering to know that
the cause of the warning is really the characteristic of the device.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On
Behalf Of nilimp.vipul@wipro.com
Sent: Monday, July 11, 2005 5:56 AM
To: Vivek.Kumar.Sundriyal@nsc.com; ibis-users@eda.org
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"



Hi Vivek,

I have the following opinion about your problem.

1) For 0.0V as input your typical and maximum current values are
significantly higher than they should be. The minimum current value is
tolerable. They should be in micro-amps(i.e extremely low...very close
to 0.0 A). Hence the errors.

2)You can remove the "Model MODEL1: POWER Clamp : Minimum value never
becomes zero WARNING " by simply changing the
Minimum current to 0.3000uA from 72.3000uA. Since the current is already
in micro-Amperes this change will be quite insignifucant.

3)However you cannot do this to your typ and max curent readings, since
such a change will be considered as a significant change. I suggest you
go back to your netlist design,source files and check the Power Clamp
part once again.

Hope this helps.

Regards,
Nilimp Bhatt

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Vivek Kumar Sundriyal
Sent: Monday, July 11, 2005 5:40 PM
To: ibis-users@eda.org
Subject: [IBIS-Users] Warning - "Typical value never becomes zero"


Hi ,

I have developed the IBIS model using s2ibis3 and I am using IBIS
version 3.2

When I compile the .ibs file, I get the following warning  :

WARNING -
    Model MODEL1: POWER Clamp : Typical value never becomes zero WARNING
- -
    Model MODEL1: POWER Clamp : Minimum value never becomes zero WARNING
- -
    Model MODEL1: POWER Clamp : Maximum value never becomes zero


On looking at the Power clamp data, the current values that I get at
0.0V are :
0.3193mA      72.3000uA      0.6643mA
for typ,min and max respectively.

Can anyone elaborate on this warning ?

And how serious is this ?


Cheers ,

Vivek





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------------------------------

Date: Mon, 11 Jul 2005 10:24:44 -0700
From: "Lynne D. Green" <lgreen22@mindspring.com>
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"

Hello, Vivek,

Yes, this is serious.  Simulation symptoms could include DC
convergence failure and/or transient convergence failure.

Consider this circuit:
<I/O pin> - <resistor> - <PowerRef> 

When the voltage at the I/O pin is the same as PowerRef, there is 0.000V
across the resistor. The resistor current is thus 0.0A.  However, your clamp
table says that 0.3193mA is flowing under this condition.  In this case, the
two currents are not equal, and KCL is violated.

Best things to check are [Power Ref] and [Power Clamp Ref].  One could
also check SPICE tolerance options to make sure they are not too large.

Best regards,
Lynne


"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com


- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of Vivek Kumar Sundriyal
Sent: Monday, July 11, 2005 5:10 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] Warning - "Typical value never becomes zero"


Hi ,

I have developed the IBIS model using s2ibis3 and I am using IBIS version
3.2

When I compile the .ibs file, I get the following warning  :

WARNING -
    Model MODEL1: POWER Clamp : Typical value never becomes zero WARNING -
    Model MODEL1: POWER Clamp : Minimum value never becomes zero WARNING -
    Model MODEL1: POWER Clamp : Maximum value never becomes zero


On looking at the Power clamp data, the current values that I get at 0.0V
are :
0.3193mA      72.3000uA      0.6643mA
for typ,min and max respectively.

Can anyone elaborate on this warning ?

And how serious is this ?


Cheers ,

Vivek


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------------------------------

Date: Mon, 11 Jul 2005 09:49:39 -0600
From: "Bilski, Robert" <Robert.Bilski@gdcanada.com>
Subject: [IBIS-Users] ibis 10/100 ethernet models

This is a multi-part message in MIME format.

- ------_=_NextPart_001_01C58630.25AC576D
Content-Type: text/plain;
	charset="ISO-8859-2"
Content-Transfer-Encoding: quoted-printable

Hi all,
=20
I have a question about 10/100 Ethernet IBIS models.. Recently I started =
working with ICX and I noticed that most vendors do not provide IBIS =
models for their ethernet side of the components. Could someone tell me =
what is the reason behind this. Where can I get ethernet models or how =
should I create them? What do I do when modeling ethernet?, etc.=20
=20
Your help will be greatly appreciated.
=20
Best Regards
=20
Robert

=20


The information contained in this e-mail message is PRIVATE. It may =
contain confidential information and may be legally privileged. It is =
intended for the exclusive use of the addressee(s). If you are not the =
intended recipient, you are hereby notified that any dissemination, =
distribution or reproduction of this communication is strictly =
prohibited. If the intended recipient(s) cannot be reached or if a =
transmission problem has occurred, please notify the sender immediately =
by return e-mail and destroy all copies of this message.=20
Thank you.=20


- ------_=_NextPart_001_01C58630.25AC576D
Content-Type: text/html;
	charset="ISO-8859-2"
Content-Transfer-Encoding: quoted-printable

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META HTTP-EQUIV=3D"Content-Type" CONTENT=3D"text/html; =
charset=3Diso-8859-2">
<TITLE>C_comp</TITLE>

<META content=3D"MSHTML 6.00.2800.1491" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D781184015-11072005>Hi=20
all,</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D781184015-11072005></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D781184015-11072005>I have=20
a question about 10/100 Ethernet IBIS models..&nbsp;Recently I started =
working=20
with ICX and I noticed that most vendors do not provide IBIS models for =
their=20
ethernet side of the components. Could someone tell me what is the =
reason behind=20
this. Where can I get ethernet models or how should I create them? What =
do I do=20
when modeling ethernet?, etc. </SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D781184015-11072005></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D781184015-11072005>Your=20
help will be greatly appreciated.</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D781184015-11072005></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN =
class=3D781184015-11072005>Best=20
Regards</SPAN></FONT></DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D781184015-11072005></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial color=3D#0000ff size=3D2><SPAN=20
class=3D781184015-11072005>Robert</SPAN></FONT></DIV>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px"><FONT face=3DArial =
color=3D#0000ff=20
  =
size=3D2></FONT>&nbsp;</BLOCKQUOTE></BODY><!--[object_id=3D#gdcanada.com#=
]--><FONT face=3DTahoma><FONT color=3D#0000ff><SPAN =
style=3D"FONT-WEIGHT: bold; FONT-SIZE: 10pt; FONT-FAMILY: Arial"><FONT =
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<P align=3Dleft><FONT face=3DTahoma size=3D2><FONT color=3D#0000ff><FONT =
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addressee(s). If you are not the intended recipient, you are hereby =
notified that any dissemination, distribution or reproduction of this =
communication is strictly prohibited. If the intended recipient(s) =
cannot be reached or if a transmission problem has occurred, please =
notify the sender immediately by return e-mail and destroy all copies of =
this message. <BR>Thank you.</FONT> =
</FONT></FONT></P></FONT></SPAN><FONT =
size=3D2></FONT></FONT></FONT></HTML>

- ------_=_NextPart_001_01C58630.25AC576D--
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------------------------------

Date: Mon, 11 Jul 2005 11:05:12 -0700
From: "Tom Dagostino" <tom@teraspeed.com>
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"

Lynne

If there is a pulldown resistor or some other device that is sinking current
to some other voltage then the current in the powerclamp table will not be 0
current at 0.00 Volts.  True, a pulldown should be included in the
groundclamp but we don't know enough about this buffer to know what has
happened in it.  Is there a termination to some intermediate voltage?  We
don't know.  The model maker needs to determine the cause of this current
before anyone can say if this current is a problem or not.  The engineering
must be done first then conclusions can be drawn, not the other way around.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On
Behalf Of Lynne D. Green
Sent: Monday, July 11, 2005 10:25 AM
To: 'Vivek Kumar Sundriyal'; ibis-users@eda.org
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"


Hello, Vivek,

Yes, this is serious.  Simulation symptoms could include DC
convergence failure and/or transient convergence failure.

Consider this circuit:
<I/O pin> - <resistor> - <PowerRef>

When the voltage at the I/O pin is the same as PowerRef, there is 0.000V
across the resistor. The resistor current is thus 0.0A.  However, your clamp
table says that 0.3193mA is flowing under this condition.  In this case, the
two currents are not equal, and KCL is violated.

Best things to check are [Power Ref] and [Power Clamp Ref].  One could
also check SPICE tolerance options to make sure they are not too large.

Best regards,
Lynne


"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com


- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of Vivek Kumar Sundriyal
Sent: Monday, July 11, 2005 5:10 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] Warning - "Typical value never becomes zero"


Hi ,

I have developed the IBIS model using s2ibis3 and I am using IBIS version
3.2

When I compile the .ibs file, I get the following warning  :

WARNING -
    Model MODEL1: POWER Clamp : Typical value never becomes zero WARNING -
    Model MODEL1: POWER Clamp : Minimum value never becomes zero WARNING -
    Model MODEL1: POWER Clamp : Maximum value never becomes zero


On looking at the Power clamp data, the current values that I get at 0.0V
are :
0.3193mA      72.3000uA      0.6643mA
for typ,min and max respectively.

Can anyone elaborate on this warning ?

And how serious is this ?


Cheers ,

Vivek


|------------------------------------------------------------------
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|  http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

------------------------------

Date: Mon, 11 Jul 2005 16:21:26 -0700
From: "Lynne D. Green" <lgreen22@mindspring.com>
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"

Hello, Vivek.

Tom speaks much truth.  An on-die pullup "resistor" could be included in a
[Power Clamp] table.  If the pullup resistor went to the clamp reference,
one could expect 0A at 0V, but not if it went to [Pullup Ref].

This could be addressed in [Notes] information by a model maker.

As always, the IBIS Model Review Committee welcomes models for review and
comment.
http://www.eigroup.org/ibis/support.htm

Best regards,
Lynne
 

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of Tom Dagostino
Sent: Monday, July 11, 2005 11:05 AM
To: Lynne D. Green; 'Vivek Kumar Sundriyal'; ibis-users@eda.org
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"

Lynne

If there is a pulldown resistor or some other device that is sinking current
to some other voltage then the current in the powerclamp table will not be 0
current at 0.00 Volts.  True, a pulldown should be included in the
groundclamp but we don't know enough about this buffer to know what has
happened in it.  Is there a termination to some intermediate voltage?  We
don't know.  The model maker needs to determine the cause of this current
before anyone can say if this current is a problem or not.  The engineering
must be done first then conclusions can be drawn, not the other way around.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On
Behalf Of Lynne D. Green
Sent: Monday, July 11, 2005 10:25 AM
To: 'Vivek Kumar Sundriyal'; ibis-users@eda.org
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"


Hello, Vivek,

Yes, this is serious.  Simulation symptoms could include DC convergence
failure and/or transient convergence failure.

Consider this circuit:
<I/O pin> - <resistor> - <PowerRef>

When the voltage at the I/O pin is the same as PowerRef, there is 0.000V
across the resistor. The resistor current is thus 0.0A.  However, your clamp
table says that 0.3193mA is flowing under this condition.  In this case, the
two currents are not equal, and KCL is violated.

Best things to check are [Power Ref] and [Power Clamp Ref].  One could also
check SPICE tolerance options to make sure they are not too large.

Best regards,
Lynne


"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com


- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of Vivek Kumar Sundriyal
Sent: Monday, July 11, 2005 5:10 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] Warning - "Typical value never becomes zero"


Hi ,

I have developed the IBIS model using s2ibis3 and I am using IBIS version
3.2

When I compile the .ibs file, I get the following warning  :

WARNING -
    Model MODEL1: POWER Clamp : Typical value never becomes zero WARNING -
    Model MODEL1: POWER Clamp : Minimum value never becomes zero WARNING -
    Model MODEL1: POWER Clamp : Maximum value never becomes zero


On looking at the Power clamp data, the current values that I get at 0.0V
are :
0.3193mA      72.3000uA      0.6643mA
for typ,min and max respectively.

Can anyone elaborate on this warning ?

And how serious is this ?


Cheers ,

Vivek


|------------------------------------------------------------------
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|the appropriate command message(s) in the body:
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|  unsubscribe ibis       <optional e-mail address, if different>
|  unsubscribe ibis-users <optional e-mail address, if different>
|
|or email a written request to ibis-request@eda.org.
|
|IBIS reflector archives exist under:
|
|  http://www.eda.org/pub/ibis/email_archive/  Recent  
| http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

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|the appropriate command message(s) in the body:
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|
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|
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|
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| http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993


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|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

------------------------------

Date: Tue, 12 Jul 2005 17:54:05 +0530
From: "Vivek Kumar Sundriyal" <Vivek.Kumar.Sundriyal@nsc.com>
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"

Hi ,

Thanks to all of you for replying to my query.

The problem that I faced was due to an error from my end in setting up the
spice. I did not hook up one of the signals which caused the problem of a high
current at 0.0V.

I made the desired changes and I now get currents in the range of nA/pA at 0.0V
I hope this is not an issue (current is pA/nA is close to zero)

Thanks ,

Vivek



                                                                                                                   
                      "Lynne D. Green"                                                                             
                      <lgreen22@mindspr        To:       tom@teraspeed.com, "'Vivek Kumar Sundriyal'"              
                      ing.com>                  <Vivek.Kumar.Sundriyal@nsc.com>, ibis-users@eda.org                
                                               cc:                                                                 
                      07/12/05 04:51 AM        Subject:  RE: [IBIS-Users] Warning - "Typical value never becomes   
                                                zero"                                                              
                                                                                                                   




Hello, Vivek.

Tom speaks much truth.  An on-die pullup "resistor" could be included in a
[Power Clamp] table.  If the pullup resistor went to the clamp reference,
one could expect 0A at 0V, but not if it went to [Pullup Ref].

This could be addressed in [Notes] information by a model maker.

As always, the IBIS Model Review Committee welcomes models for review and
comment.
http://www.eigroup.org/ibis/support.htm

Best regards,
Lynne


- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of Tom Dagostino
Sent: Monday, July 11, 2005 11:05 AM
To: Lynne D. Green; 'Vivek Kumar Sundriyal'; ibis-users@eda.org
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"

Lynne

If there is a pulldown resistor or some other device that is sinking current
to some other voltage then the current in the powerclamp table will not be 0
current at 0.00 Volts.  True, a pulldown should be included in the
groundclamp but we don't know enough about this buffer to know what has
happened in it.  Is there a termination to some intermediate voltage?  We
don't know.  The model maker needs to determine the cause of this current
before anyone can say if this current is a problem or not.  The engineering
must be done first then conclusions can be drawn, not the other way around.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On
Behalf Of Lynne D. Green
Sent: Monday, July 11, 2005 10:25 AM
To: 'Vivek Kumar Sundriyal'; ibis-users@eda.org
Subject: RE: [IBIS-Users] Warning - "Typical value never becomes zero"


Hello, Vivek,

Yes, this is serious.  Simulation symptoms could include DC convergence
failure and/or transient convergence failure.

Consider this circuit:
<I/O pin> - <resistor> - <PowerRef>

When the voltage at the I/O pin is the same as PowerRef, there is 0.000V
across the resistor. The resistor current is thus 0.0A.  However, your clamp
table says that 0.3193mA is flowing under this condition.  In this case, the
two currents are not equal, and KCL is violated.

Best things to check are [Power Ref] and [Power Clamp Ref].  One could also
check SPICE tolerance options to make sure they are not too large.

Best regards,
Lynne


"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@mindspring.com


- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of Vivek Kumar Sundriyal
Sent: Monday, July 11, 2005 5:10 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] Warning - "Typical value never becomes zero"


Hi ,

I have developed the IBIS model using s2ibis3 and I am using IBIS version
3.2

When I compile the .ibs file, I get the following warning  :

WARNING -
    Model MODEL1: POWER Clamp : Typical value never becomes zero WARNING -
    Model MODEL1: POWER Clamp : Minimum value never becomes zero WARNING -
    Model MODEL1: POWER Clamp : Maximum value never becomes zero


On looking at the Power clamp data, the current values that I get at 0.0V
are :
0.3193mA      72.3000uA      0.6643mA
for typ,min and max respectively.

Can anyone elaborate on this warning ?

And how serious is this ?


Cheers ,

Vivek


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------------------------------

Date: Tue, 12 Jul 2005 12:27:24 -0700
From: "Nash, Tim J (FL51)" <Tim.J.Nash@honeywell.com>
Subject: [IBIS-Users] Which IBIS version to use???

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There seems to be some confusion among my peers as to which IBIS version we
should be working to.  The latest ANSI version appears to be 3.2, but there
are specifications available up to 4.1.  The parser available in latest
released versions of Hyperlinx and ICX is still v3.2, so I'm not sure that
Hyperlinx or ICX would even recognize v4.1 keywords.  Is there an "official"
committee recommendation of what version should be utilized in new designs -
the latest available, or the latest ANSI approved version?

Thanks in advance,
Tim



__________________________________
Timothy J. Nash, P.E.
> Honeywell, Inc.
> Defense & Space Electronic Systems
> 13350 U.S. Hwy 19 N
> M/S 825-1
> Clearwater, FL  33764-7290
> Office : 727-539-2437
> Fax     : 727-539-2183
> Email  :  tim.j.nash@honeywell.com
> 

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<P><FONT SIZE=3D2 FACE=3D"Arial">There seems to be some confusion among =
my peers as to which IBIS version we should be working to.&nbsp; The =
latest ANSI version appears to be 3.2, but there are specifications =
available up to 4.1.&nbsp; The parser available in latest released =
versions of Hyperlinx and ICX is still v3.2, so I'm not sure that =
Hyperlinx or ICX would even recognize v4.1 keywords.&nbsp; Is there an =
&quot;official&quot; committee recommendation of what version should be =
utilized in new designs - the latest available, or the latest ANSI =
approved version?</FONT></P>

<P><FONT SIZE=3D2 FACE=3D"Arial">Thanks in advance,</FONT>
<BR><FONT SIZE=3D2 FACE=3D"Arial">Tim</FONT>
</P>
<BR>
<BR>

<P><B><FONT COLOR=3D"#FF0000" SIZE=3D2 =
FACE=3D"Tahoma">__________________________________</FONT></B>
<BR><B><FONT COLOR=3D"#FF0000" SIZE=3D2 FACE=3D"Tahoma">Timothy J. =
Nash, P.E.</FONT></B>
<BR><B><FONT COLOR=3D"#000000" SIZE=3D2 FACE=3D"Tahoma">Honeywell, =
Inc.</FONT></B>
<BR><B><FONT COLOR=3D"#000000" SIZE=3D2 FACE=3D"Tahoma">Defense &amp; =
Space Electronic Systems</FONT></B>
<BR><B><FONT COLOR=3D"#000000" SIZE=3D2 FACE=3D"Tahoma">13350 U.S. Hwy =
19 N</FONT></B>
<BR><B><FONT COLOR=3D"#000000" SIZE=3D2 FACE=3D"Tahoma">M/S =
825-1</FONT></B>
<BR><B><FONT COLOR=3D"#000000" SIZE=3D2 FACE=3D"Tahoma">Clearwater, =
FL&nbsp; 33764-7290</FONT></B>
<BR><B><FONT COLOR=3D"#000000" SIZE=3D2 FACE=3D"Tahoma">Office : =
727-539-2437</FONT></B>
<BR><B><FONT COLOR=3D"#000000" SIZE=3D2 =
FACE=3D"Tahoma">Fax&nbsp;&nbsp;&nbsp;&nbsp; : 727-539-2183</FONT></B>
<BR><B><FONT COLOR=3D"#000000" SIZE=3D2 FACE=3D"Tahoma">Email&nbsp; =
:&nbsp; tim.j.nash@honeywell.com</FONT></B>
</P>

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------------------------------

Date: Tue, 12 Jul 2005 13:45:00 -0700
From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
Subject: [IBIS-Users] Re: IV curve sweep range

Hello everyone,

I hope you don't mind that I brought this discussion to the
IBIS and IBIS users reflectors, but I wanted to save Mike
a bunch of forwarding these messages to and from me (since
I don't want to sign up to the IBIS quality list at the moment).
Plus the subject ultimately is a spec related one, so it may
not hurt to discuss it in these lists.

I agree with Tom, that those original IBIS ranges are still
useful.  The point I was trying to make is that IBIS REQUIRES
those ranges, period.  True, the parser doesn't flag models
now which do not obey these requirements of the IBIS
specification, but technically these models are out of spec.

Also true, the model maker can always do a smaller range, and
then add two points on the two ends, just to satisfy the spec
requirements, but if the table has 100 points already, the 
model make will have to figure out which other two points
they have to remove before they can add the points at the ends.

Forcing the model maker to generate models for the -Vcc to 2Vcc
range may reduce the quality of the model, because many points
may be used up in those areas of the curves which never get used,
and at times it may not be possible to generate those points due
to convergence issues.

The comment from Bob about the current limiting at 1A or 10A
seems to be a related, but different issue.  I would like to see
that the IBIS specification is fixed so that it doesn't REQUIRE
the -Vcc to 2Vcc range.  But I agree, this may be a difficult
one, because if we just eliminate the rule, we may start getting
a bunch of useless models, if people don't know what ranges they
should provide.  So what should the spec say then?  Spell out
some STRONGLY RECOMMENDED rules?

Thanks,

Arpad
==================================================================


- -----Original Message-----
From: ibis-quality-bounce@freelists.org
[mailto:ibis-quality-bounce@freelists.org] On Behalf Of Robert Haller
Sent: Tuesday, July 12, 2005 1:03 PM
To: ibis-quality@freelists.org
Subject: [ibis-quality] Re: IV curve sweep range

Tom,  Michael
Agreed that sweeping over the entire range makes sense in come cases and

it is excessive in others.
But in order to avoid excess currents and meet the spec in its presently

approved state,
the committee reached consensus that limiting the current at something 
resonable (1Amp)
below the hard ibis check ceiling of 10 Amps seemed acceptable. We want 
to minimize warnings from the parser
and most devices (that people are simulating with IBIS)  operate below 
an 1 amp.

The point we were trying to make was when sweep terminated devices (i.e.

ODT) it is important to sweep across the entire 'legal' range to avoid
simulators interpolating or extrapolating.

I have persoannly always had an issue with the excessivly wide range and

would support a bird that  reduces it to something
reasonable. The rub is getting consensus in Open forum on what is 
reasonable with all of the exceptions....

my $.02
Bob
 
Tom Dagostino wrote:

>There are still a lot non busses that people need to simulate, not all
of
>them will be terminated.  In addition some people simulate open
connectors
>which may have non terminated lines by definition.  So, yes there are
places
>where it does not make sense to do the -Vcc to 2*Vcc range but there
are
>cases still where it makes sense.
>
>Tom Dagostino
>Teraspeed(R) Labs
>13610 SW Harness Lane
>Beaverton, OR 97008
>503-430-1065
>tom@teraspeed.com
>www.teraspeed.com
>
>Teraspeed Consulting Group LLC
>121 North River Drive
>Narragansett, RI 02882
>401-284-1827
>
>-----Original Message-----
>From: ibis-quality-bounce@freelists.org
>[mailto:ibis-quality-bounce@freelists.org]On Behalf Of Mirmak, Michael
>Sent: Tuesday, July 12, 2005 12:00 PM
>To: ibis-quality@freelists.org
>Subject: [ibis-quality] IV curve sweep range
>
>
>Forwarded from Arpad Muranyi...
>
>- MM
>
>-----Original Message-----
>From: Muranyi, Arpad
>Sent: Tuesday, July 12, 2005 11:20 AM
>To: ibis-quality-bounce@freelists.org
>Cc: Mirmak, Michael
>Subject: IV curve sweep range
>
>Hello everyone,
>
>I am not monitoring this email reflector, and I don't plan on
>subscribing, but Mike Mirmak forwarded me a message regarding the IV
>curve sweep range discussion, to which I would like to add a few
>comments.  I don't know what exactly is being proposed, I am just going
>to mention my views here.
>
>The problem I see is that IBIS requires a sweep range of -Vcc to 2*Vcc.
>This comes from the days when most buffers switched rail to rail and
>most buses were unterminated.  The reason for this range stems from the
>T-line reflection theory, that the signal can double at the end of the
>line.  If we had a strong driver, which could drive close to the rail,
>then the doubling of this signal could span a range close to -Vcc or
>+2*Vcc assuming no clamping effects at the end of the line.
>
>The problem is that most modern buses and drivers are not operating
like
>this any more.  For one, the signal swing
>doesn't go rail-to-rail any more, and second, most buses are
terminated.
>Even if we ignore the termination question, the reduced-swing signaling
>alone warrants a reconsideration of the IBIS rule.
>
>One of my favorite examples is GTL.  The signal goes from a low level
>between 0-0.5V to a high level of 1.5V.  If I took 0-1.5, even if I
>doubled the signal swing on the top and bottom, I would get a range of
>-1.5V to 3.0V.  Aside from the fact that the bus is terminated and we
>will never see a doubling at the end of the T-line, compare this range
>with what IBIS would require if this buffer was powered by 3.3V:  it
>would be -3.6V to 6.6V, almost double!  This clearly doesn't make
sense.
>
>I would propose that we should write a BIRD on this, and change the
IBIS
>specification so that it would not REQUIRE the range of -Vcc to 2*Vcc.
>I am not sure what it should say yet, but I would definitely NOT favor
>that the parser should be changed to check the ranges in the IBIS files
>against the IBIS rules.  I would much prefer to have a rule that is
>based on signaling, though I have to admit that this may be somewhat
>more complicated to spell out.
>
>Please comment,
>
>Arpad
>===========================================================
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------------------------------

Date: Tue, 12 Jul 2005 14:06:26 -0700
From: "Beal, Weston" <weston_beal@mentor.com>
Subject: RE: [IBIS-Users] Which IBIS version to use???

This is a multi-part message in MIME format.

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Tim,
=20
Since IBIS 2.1 I've not seen any simulator that support and utilizes all
keywords and parameters of any version of the IBIS spec. You need to
evaluate what aspects of the IBIS spec apply to your I/O pins and use
those appropriate keywords. Then you specify the IBIS version of the
file to be the lowest number that includes the features you've used.
Throughout this process you should read the latest version of the
specification since it will be the clearest and most complete
description of the various features.
=20
Even though ICX might not explicitly state that it supports IBIS 4.1, it
does support the [external model], [external circuit], [node
declaration], and [circuit call] keywords quite well. Check the ICX
modeling guide for slight differences from the official IBIS syntax.
=20
Regards,
Weston
=20

________________________________

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Nash, Tim J (FL51)
Sent: Tuesday, July 12, 2005 12:27 PM
To: ibis-users@eda.org
Subject: [IBIS-Users] Which IBIS version to use???



There seems to be some confusion among my peers as to which IBIS version
we should be working to.  The latest ANSI version appears to be 3.2, but
there are specifications available up to 4.1.  The parser available in
latest released versions of Hyperlinx and ICX is still v3.2, so I'm not
sure that Hyperlinx or ICX would even recognize v4.1 keywords.  Is there
an "official" committee recommendation of what version should be
utilized in new designs - the latest available, or the latest ANSI
approved version?

Thanks in advance,=20
Tim=20



__________________________________=20
Timothy J. Nash, P.E.=20
Honeywell, Inc.=20
Defense & Space Electronic Systems=20
13350 U.S. Hwy 19 N=20
M/S 825-1=20
Clearwater, FL  33764-7290=20
Office : 727-539-2437=20
Fax     : 727-539-2183=20
Email  :  tim.j.nash@honeywell.com=20


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	charset="us-ascii"
Content-Transfer-Encoding: quoted-printable

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD><TITLE>Which IBIS version to use???</TITLE>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Dus-ascii">
<META content=3D"MSHTML 6.00.2900.2668" name=3DGENERATOR></HEAD>
<BODY>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D220585820-12072005>Tim,</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D220585820-12072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D220585820-12072005>Since IBIS 2.1 I've not seen any simulator =
that support=20
and utilizes all keywords and parameters of any version of the IBIS =
spec. You=20
need to evaluate what aspects of the IBIS spec apply to your I/O pins =
and use=20
those appropriate keywords. Then you specify the IBIS version of the =
file to be=20
the lowest number that includes the features you've used. Throughout =
this=20
process you should read the latest version of the specification since it =
will be=20
the clearest and most complete description of the various=20
features.</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D220585820-12072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D220585820-12072005>Even though ICX might not explicitly state =
that it=20
supports IBIS 4.1, it does support the [external model], [external =
circuit],=20
[node declaration], and [circuit call] keywords quite well. Check the =
ICX=20
modeling guide for slight differences from the official IBIS=20
syntax.</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D220585820-12072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D220585820-12072005>Regards,</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D220585820-12072005>Weston</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D220585820-12072005></SPAN></FONT>&nbsp;</DIV><BR>
<DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr align=3Dleft>
<HR tabIndex=3D-1>
<FONT face=3DTahoma size=3D2><B>From:</B> owner-ibis-users@eda.org=20
[mailto:owner-ibis-users@eda.org] <B>On Behalf Of </B>Nash, Tim J=20
(FL51)<BR><B>Sent:</B> Tuesday, July 12, 2005 12:27 PM<BR><B>To:</B>=20
ibis-users@eda.org<BR><B>Subject:</B> [IBIS-Users] Which IBIS version to =

use???<BR></FONT><BR></DIV>
<DIV></DIV>
<P><FONT face=3DArial size=3D2>There seems to be some confusion among my =
peers as to=20
which IBIS version we should be working to.&nbsp; The latest ANSI =
version=20
appears to be 3.2, but there are specifications available up to =
4.1.&nbsp; The=20
parser available in latest released versions of Hyperlinx and ICX is =
still v3.2,=20
so I'm not sure that Hyperlinx or ICX would even recognize v4.1 =
keywords.&nbsp;=20
Is there an "official" committee recommendation of what version should =
be=20
utilized in new designs - the latest available, or the latest ANSI =
approved=20
version?</FONT></P>
<P><FONT face=3DArial size=3D2>Thanks in advance,</FONT> <BR><FONT =
face=3DArial=20
size=3D2>Tim</FONT> </P><BR><BR>
<P><B><FONT face=3DTahoma color=3D#ff0000=20
size=3D2>__________________________________</FONT></B> <BR><B><FONT =
face=3DTahoma=20
color=3D#ff0000 size=3D2>Timothy J. Nash, P.E.</FONT></B> <BR><B><FONT =
face=3DTahoma=20
color=3D#000000 size=3D2>Honeywell, Inc.</FONT></B> <BR><B><FONT =
face=3DTahoma=20
color=3D#000000 size=3D2>Defense &amp; Space Electronic =
Systems</FONT></B>=20
<BR><B><FONT face=3DTahoma color=3D#000000 size=3D2>13350 U.S. Hwy 19 =
N</FONT></B>=20
<BR><B><FONT face=3DTahoma color=3D#000000 size=3D2>M/S 825-1</FONT></B> =
<BR><B><FONT=20
face=3DTahoma color=3D#000000 size=3D2>Clearwater, FL&nbsp; =
33764-7290</FONT></B>=20
<BR><B><FONT face=3DTahoma color=3D#000000 size=3D2>Office : =
727-539-2437</FONT></B>=20
<BR><B><FONT face=3DTahoma color=3D#000000 =
size=3D2>Fax&nbsp;&nbsp;&nbsp;&nbsp; :=20
727-539-2183</FONT></B> <BR><B><FONT face=3DTahoma color=3D#000000=20
size=3D2>Email&nbsp; :&nbsp; tim.j.nash@honeywell.com</FONT></B>=20
</P></BODY></HTML>

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------------------------------

Date: Tue, 12 Jul 2005 16:26:03 -0500
From: <Aubrey_Sparkman@dell.com>
Subject: RE: [IBIS-Users] Re: IV curve sweep range

I would like to see the sweep range linked to the allowed or expected
signal swing.  If the buffer can be used in a "less than perfectly
terminated" topology where rising or falling overshoot outside 0 to Vcc
can happen, then the sweep should be REQUIRED to cover that range.  If
the signal swing will always be well within 0 to Vcc, then a reduced
sweep range could be allowed.

my $.02

Aubrey Sparkman 
Enterprise Engineering Signal Integrity Team
Dell, Inc. 
Aubrey_Sparkman@Dell.com 
(512) 723-3592

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Muranyi, Arpad
Sent: Tuesday, July 12, 2005 3:45 PM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS-Users] Re: IV curve sweep range

Hello everyone,

I hope you don't mind that I brought this discussion to the IBIS and
IBIS users reflectors, but I wanted to save Mike a bunch of forwarding
these messages to and from me (since I don't want to sign up to the IBIS
quality list at the moment).
Plus the subject ultimately is a spec related one, so it may not hurt to
discuss it in these lists.

I agree with Tom, that those original IBIS ranges are still useful.  The
point I was trying to make is that IBIS REQUIRES those ranges, period.
True, the parser doesn't flag models now which do not obey these
requirements of the IBIS specification, but technically these models are
out of spec.

Also true, the model maker can always do a smaller range, and then add
two points on the two ends, just to satisfy the spec requirements, but
if the table has 100 points already, the model make will have to figure
out which other two points they have to remove before they can add the
points at the ends.

Forcing the model maker to generate models for the -Vcc to 2Vcc range
may reduce the quality of the model, because many points may be used up
in those areas of the curves which never get used, and at times it may
not be possible to generate those points due to convergence issues.

The comment from Bob about the current limiting at 1A or 10A seems to be
a related, but different issue.  I would like to see that the IBIS
specification is fixed so that it doesn't REQUIRE the -Vcc to 2Vcc
range.  But I agree, this may be a difficult one, because if we just
eliminate the rule, we may start getting a bunch of useless models, if
people don't know what ranges they should provide.  So what should the
spec say then?  Spell out some STRONGLY RECOMMENDED rules?

Thanks,

Arpad
==================================================================


- -----Original Message-----
From: ibis-quality-bounce@freelists.org
[mailto:ibis-quality-bounce@freelists.org] On Behalf Of Robert Haller
Sent: Tuesday, July 12, 2005 1:03 PM
To: ibis-quality@freelists.org
Subject: [ibis-quality] Re: IV curve sweep range

Tom,  Michael
Agreed that sweeping over the entire range makes sense in come cases and

it is excessive in others.
But in order to avoid excess currents and meet the spec in its presently

approved state,
the committee reached consensus that limiting the current at something
resonable (1Amp) below the hard ibis check ceiling of 10 Amps seemed
acceptable. We want to minimize warnings from the parser and most
devices (that people are simulating with IBIS)  operate below an 1 amp.

The point we were trying to make was when sweep terminated devices (i.e.

ODT) it is important to sweep across the entire 'legal' range to avoid
simulators interpolating or extrapolating.

I have persoannly always had an issue with the excessivly wide range and

would support a bird that  reduces it to something reasonable. The rub
is getting consensus in Open forum on what is reasonable with all of the
exceptions....

my $.02
Bob
 
Tom Dagostino wrote:

>There are still a lot non busses that people need to simulate, not all
of
>them will be terminated.  In addition some people simulate open
connectors
>which may have non terminated lines by definition.  So, yes there are
places
>where it does not make sense to do the -Vcc to 2*Vcc range but there
are
>cases still where it makes sense.
>
>Tom Dagostino
>Teraspeed(R) Labs
>13610 SW Harness Lane
>Beaverton, OR 97008
>503-430-1065
>tom@teraspeed.com
>www.teraspeed.com
>
>Teraspeed Consulting Group LLC
>121 North River Drive
>Narragansett, RI 02882
>401-284-1827
>
>-----Original Message-----
>From: ibis-quality-bounce@freelists.org 
>[mailto:ibis-quality-bounce@freelists.org]On Behalf Of Mirmak, Michael
>Sent: Tuesday, July 12, 2005 12:00 PM
>To: ibis-quality@freelists.org
>Subject: [ibis-quality] IV curve sweep range
>
>
>Forwarded from Arpad Muranyi...
>
>- MM
>
>-----Original Message-----
>From: Muranyi, Arpad
>Sent: Tuesday, July 12, 2005 11:20 AM
>To: ibis-quality-bounce@freelists.org
>Cc: Mirmak, Michael
>Subject: IV curve sweep range
>
>Hello everyone,
>
>I am not monitoring this email reflector, and I don't plan on 
>subscribing, but Mike Mirmak forwarded me a message regarding the IV 
>curve sweep range discussion, to which I would like to add a few 
>comments.  I don't know what exactly is being proposed, I am just going

>to mention my views here.
>
>The problem I see is that IBIS requires a sweep range of -Vcc to 2*Vcc.
>This comes from the days when most buffers switched rail to rail and 
>most buses were unterminated.  The reason for this range stems from the

>T-line reflection theory, that the signal can double at the end of the 
>line.  If we had a strong driver, which could drive close to the rail, 
>then the doubling of this signal could span a range close to -Vcc or
>+2*Vcc assuming no clamping effects at the end of the line.
>
>The problem is that most modern buses and drivers are not operating
like
>this any more.  For one, the signal swing doesn't go rail-to-rail any 
>more, and second, most buses are
terminated.
>Even if we ignore the termination question, the reduced-swing signaling

>alone warrants a reconsideration of the IBIS rule.
>
>One of my favorite examples is GTL.  The signal goes from a low level 
>between 0-0.5V to a high level of 1.5V.  If I took 0-1.5, even if I 
>doubled the signal swing on the top and bottom, I would get a range of 
>-1.5V to 3.0V.  Aside from the fact that the bus is terminated and we 
>will never see a doubling at the end of the T-line, compare this range 
>with what IBIS would require if this buffer was powered by 3.3V:  it 
>would be -3.6V to 6.6V, almost double!  This clearly doesn't make
sense.
>
>I would propose that we should write a BIRD on this, and change the
IBIS
>specification so that it would not REQUIRE the range of -Vcc to 2*Vcc.
>I am not sure what it should say yet, but I would definitely NOT favor 
>that the parser should be changed to check the ranges in the IBIS files

>against the IBIS rules.  I would much prefer to have a rule that is 
>based on signaling, though I have to admit that this may be somewhat 
>more complicated to spell out.
>
>Please comment,
>
>Arpad
>===========================================================
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------------------------------

Date: Tue, 12 Jul 2005 14:35:51 -0700
From: "Nash, Tim J (FL51)" <Tim.J.Nash@honeywell.com>
Subject: RE: [IBIS-Users] Which IBIS version to use???

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Weston,
 
I've noticed what you are talking about.  If you look in any documentation
for ICX or Hyperlinx (I'm not sure about SpectraQuest), I don't think that
global support for any particular version of IBIS is explicitly stated
anywhere.  I'm not sure why this is.  Is it because the standard is in such
a state of flux (i.e. growth of keywords) or is the reason more political in
nature?  I know I'm speculating as to what the reason may be, but it makes
it difficult to plan any sort of analysis, when your not clearly sure of
what a tool does and doesn't support without reading the manual
cover-to-cover.  If tools said they support version 3.2, then you could rest
assured that it supported EVERYTHING in 3.2, not just KEY FEATURES of 3.2. 
 
Thanks,
Tim

  _____  

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of Beal, Weston
Sent: Tuesday, July 12, 2005 5:06 PM
To: ibis-users@eda.org
Subject: RE: [IBIS-Users] Which IBIS version to use???


Tim,
 
Since IBIS 2.1 I've not seen any simulator that support and utilizes all
keywords and parameters of any version of the IBIS spec. You need to
evaluate what aspects of the IBIS spec apply to your I/O pins and use those
appropriate keywords. Then you specify the IBIS version of the file to be
the lowest number that includes the features you've used. Throughout this
process you should read the latest version of the specification since it
will be the clearest and most complete description of the various features.
 
Even though ICX might not explicitly state that it supports IBIS 4.1, it
does support the [external model], [external circuit], [node declaration],
and [circuit call] keywords quite well. Check the ICX modeling guide for
slight differences from the official IBIS syntax.
 
Regards,
Weston
 

  _____  

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of Nash, Tim J (FL51)
Sent: Tuesday, July 12, 2005 12:27 PM
To: ibis-users@eda.org
Subject: [IBIS-Users] Which IBIS version to use???



There seems to be some confusion among my peers as to which IBIS version we
should be working to.  The latest ANSI version appears to be 3.2, but there
are specifications available up to 4.1.  The parser available in latest
released versions of Hyperlinx and ICX is still v3.2, so I'm not sure that
Hyperlinx or ICX would even recognize v4.1 keywords.  Is there an "official"
committee recommendation of what version should be utilized in new designs -
the latest available, or the latest ANSI approved version?

Thanks in advance, 
Tim 



__________________________________ 
Timothy J. Nash, P.E. 
Honeywell, Inc. 
Defense & Space Electronic Systems 
13350 U.S. Hwy 19 N 
M/S 825-1 
Clearwater, FL  33764-7290 
Office : 727-539-2437 
Fax     : 727-539-2183 
Email  :  tim.j.nash@honeywell.com 


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<TITLE>Which IBIS version to use???</TITLE>

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<BODY>
<DIV dir=ltr align=left><SPAN class=773212621-12072005><FONT face=Arial 
color=#0000ff size=2>Weston,</FONT></SPAN></DIV>
<DIV dir=ltr align=left><SPAN class=773212621-12072005><FONT face=Arial 
color=#0000ff size=2></FONT></SPAN>&nbsp;</DIV>
<DIV dir=ltr align=left><SPAN class=773212621-12072005><FONT face=Arial 
color=#0000ff size=2>I've noticed what you are talking about.&nbsp; If you look 
in any documentation for ICX or Hyperlinx (I'm not sure about SpectraQuest), I 
don't think that global support for any particular version of IBIS is explicitly 
stated anywhere.&nbsp; I'm not sure why this is.&nbsp; Is it because the 
standard is in such a state of flux (i.e. growth of keywords) or is the reason 
more political in nature?&nbsp; I know I'm speculating as to what the reason may 
be, but it makes it difficult to plan any sort of analysis, when your not 
clearly sure of what a tool does and doesn't support without reading the manual 
cover-to-cover.&nbsp; If tools said they support version 3.2, then you could 
rest assured that it supported&nbsp;EVERYTHING in 3.2, not just&nbsp;KEY 
FEATURES&nbsp;of 3.2. </FONT></SPAN></DIV>
<DIV dir=ltr align=left><SPAN class=773212621-12072005><FONT face=Arial 
color=#0000ff size=2></FONT></SPAN>&nbsp;</DIV>
<DIV dir=ltr align=left><SPAN class=773212621-12072005><FONT face=Arial 
color=#0000ff size=2>Thanks,</FONT></SPAN></DIV>
<DIV dir=ltr align=left><SPAN class=773212621-12072005><FONT face=Arial 
color=#0000ff size=2>Tim</FONT></SPAN></DIV><BR>
<DIV class=OutlookMessageHeader lang=en-us dir=ltr align=left>
<HR tabIndex=-1>
<FONT face=Tahoma size=2><B>From:</B> owner-ibis-users@eda.org 
[mailto:owner-ibis-users@eda.org] <B>On Behalf Of </B>Beal, 
Weston<BR><B>Sent:</B> Tuesday, July 12, 2005 5:06 PM<BR><B>To:</B> 
ibis-users@eda.org<BR><B>Subject:</B> RE: [IBIS-Users] Which IBIS version to 
use???<BR></FONT><BR></DIV>
<DIV></DIV>
<DIV dir=ltr align=left><FONT face=Arial color=#0000ff size=2><SPAN 
class=220585820-12072005>Tim,</SPAN></FONT></DIV>
<DIV dir=ltr align=left><FONT face=Arial color=#0000ff size=2><SPAN 
class=220585820-12072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=ltr align=left><FONT face=Arial color=#0000ff size=2><SPAN 
class=220585820-12072005>Since IBIS 2.1 I've not seen any simulator that support 
and utilizes all keywords and parameters of any version of the IBIS spec. You 
need to evaluate what aspects of the IBIS spec apply to your I/O pins and use 
those appropriate keywords. Then you specify the IBIS version of the file to be 
the lowest number that includes the features you've used. Throughout this 
process you should read the latest version of the specification since it will be 
the clearest and most complete description of the various 
features.</SPAN></FONT></DIV>
<DIV dir=ltr align=left><FONT face=Arial color=#0000ff size=2><SPAN 
class=220585820-12072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=ltr align=left><FONT face=Arial color=#0000ff size=2><SPAN 
class=220585820-12072005>Even though ICX might not explicitly state that it 
supports IBIS 4.1, it does support the [external model], [external circuit], 
[node declaration], and [circuit call] keywords quite well. Check the ICX 
modeling guide for slight differences from the official IBIS 
syntax.</SPAN></FONT></DIV>
<DIV dir=ltr align=left><FONT face=Arial color=#0000ff size=2><SPAN 
class=220585820-12072005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=ltr align=left><FONT face=Arial color=#0000ff size=2><SPAN 
class=220585820-12072005>Regards,</SPAN></FONT></DIV>
<DIV dir=ltr align=left><FONT face=Arial color=#0000ff size=2><SPAN 
class=220585820-12072005>Weston</SPAN></FONT></DIV>
<DIV dir=ltr align=left><FONT face=Arial color=#0000ff size=2><SPAN 
class=220585820-12072005></SPAN></FONT>&nbsp;</DIV><BR>
<DIV class=OutlookMessageHeader lang=en-us dir=ltr align=left>
<HR tabIndex=-1>
<FONT face=Tahoma size=2><B>From:</B> owner-ibis-users@eda.org 
[mailto:owner-ibis-users@eda.org] <B>On Behalf Of </B>Nash, Tim J 
(FL51)<BR><B>Sent:</B> Tuesday, July 12, 2005 12:27 PM<BR><B>To:</B> 
ibis-users@eda.org<BR><B>Subject:</B> [IBIS-Users] Which IBIS version to 
use???<BR></FONT><BR></DIV>
<DIV></DIV>
<P><FONT face=Arial size=2>There seems to be some confusion among my peers as to 
which IBIS version we should be working to.&nbsp; The latest ANSI version 
appears to be 3.2, but there are specifications available up to 4.1.&nbsp; The 
parser available in latest released versions of Hyperlinx and ICX is still v3.2, 
so I'm not sure that Hyperlinx or ICX would even recognize v4.1 keywords.&nbsp; 
Is there an "official" committee recommendation of what version should be 
utilized in new designs - the latest available, or the latest ANSI approved 
version?</FONT></P>
<P><FONT face=Arial size=2>Thanks in advance,</FONT> <BR><FONT face=Arial 
size=2>Tim</FONT> </P><BR><BR>
<P><B><FONT face=Tahoma color=#ff0000 
size=2>__________________________________</FONT></B> <BR><B><FONT face=Tahoma 
color=#ff0000 size=2>Timothy J. Nash, P.E.</FONT></B> <BR><B><FONT face=Tahoma 
color=#000000 size=2>Honeywell, Inc.</FONT></B> <BR><B><FONT face=Tahoma 
color=#000000 size=2>Defense &amp; Space Electronic Systems</FONT></B> 
<BR><B><FONT face=Tahoma color=#000000 size=2>13350 U.S. Hwy 19 N</FONT></B> 
<BR><B><FONT face=Tahoma color=#000000 size=2>M/S 825-1</FONT></B> <BR><B><FONT 
face=Tahoma color=#000000 size=2>Clearwater, FL&nbsp; 33764-7290</FONT></B> 
<BR><B><FONT face=Tahoma color=#000000 size=2>Office : 727-539-2437</FONT></B> 
<BR><B><FONT face=Tahoma color=#000000 size=2>Fax&nbsp;&nbsp;&nbsp;&nbsp; : 
727-539-2183</FONT></B> <BR><B><FONT face=Tahoma color=#000000 
size=2>Email&nbsp; :&nbsp; tim.j.nash@honeywell.com</FONT></B> 
</P></BODY></HTML>

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------------------------------

Date: Tue, 12 Jul 2005 14:37:43 -0700
From: Abdulrahman Rafiq <arafiq@cisco.com>
Subject: Re: [IBIS-Users] Which IBIS version to use???

<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
<html>
<head>
  <title></title>
</head>
<body>
Tim, <br>
<br>
The latest IBIS version is 4.1 . ICX does support,&nbsp; as for Hyperlynx, Mentor
Graphic's has incorporated ver4.1 in the engineering builds for the next
release. <br>
<br>
Hope this helps in answering your question.<br>
<br>
Abdulrahman Rafiq<br>
Cisco Systems, Inc<br>
<br>
<br>
<blockquote type="cite"
 cite="midEF25DB6D87DD1A469C80A312C63C3B4C03F32BEF@SVR-ORW-EXC-07.mgc.mentorg.com">
  <div class="OutlookMessageHeader" lang="en-us" dir="ltr" align="left"><font
 face="Tahoma" size="2"><b>From:</b> <a class="moz-txt-link-abbreviated" href="mailto:owner-ibis-users@eda.org">owner-ibis-users@eda.org</a>  [<a class="moz-txt-link-freetext" href="mailto:owner-ibis-users@eda.org">mailto:owner-ibis-users@eda.org</a>]
  <b>On Behalf Of </b>Nash, Tim J  (FL51)<br>
  <b>Sent:</b> Tuesday, July 12, 2005 12:27 PM<br>
  <b>To:</b>  <a class="moz-txt-link-abbreviated" href="mailto:ibis-users@eda.org">ibis-users@eda.org</a><br>
  <b>Subject:</b> [IBIS-Users] Which IBIS version to  use???<br>
  </font><br>
  </div>
  
  <p><font face="Arial" size="2">There seems to be some confusion among my
peers as to  which IBIS version we should be working to.&nbsp; The latest ANSI
version  appears to be 3.2, but there are specifications available up to
4.1.&nbsp; The  parser available in latest released versions of Hyperlinx and
ICX is still v3.2,  so I'm not sure that Hyperlinx or ICX would even recognize
v4.1 keywords.&nbsp;  Is there an "official" committee recommendation of what
version should be  utilized in new designs - the latest available, or the
latest ANSI approved  version?</font></p>
 
  <p><font face="Arial" size="2">Thanks in advance,</font> <br>
  <font face="Arial" size="2">Tim</font> </p>
  <br>
  <br>
 
  <p><b><font face="Tahoma" color="#ff0000" size="2">__________________________________</font></b>
  <br>
  <b><font face="Tahoma" color="#ff0000" size="2">Timothy J. Nash, P.E.</font></b>
  <br>
  <b><font face="Tahoma" color="#000000" size="2">Honeywell, Inc.</font></b>
  <br>
  <b><font face="Tahoma" color="#000000" size="2">Defense &amp; Space Electronic
Systems</font></b>  <br>
  <b><font face="Tahoma" color="#000000" size="2">13350 U.S. Hwy 19 N</font></b>
 <br>
  <b><font face="Tahoma" color="#000000" size="2">M/S 825-1</font></b> <br>
  <b><font face="Tahoma" color="#000000" size="2">Clearwater, FL&nbsp; 33764-7290</font></b>
 <br>
  <b><font face="Tahoma" color="#000000" size="2">Office : 727-539-2437</font></b>
 <br>
  <b><font face="Tahoma" color="#000000" size="2">Fax&nbsp;&nbsp;&nbsp;&nbsp; :  727-539-2183</font></b>
  <br>
  <b><font face="Tahoma" color="#000000" size="2">Email&nbsp; :&nbsp; <a class="moz-txt-link-abbreviated" href="mailto:tim.j.nash@honeywell.com">tim.j.nash@honeywell.com</a></font></b>
 </p>
</blockquote>
<br>
<pre class="moz-signature" cols="$mailwrapcol">-- 
===========================================================================
      |           |       Abdulrahman Rafiq
     :|:         :|:      Hardware/IO Interconnect Engineer
    :|||:       :|||:     (DSW Tech Group/Central-Engineering/SIPD)
 .:|||||||:...:|||||||:.  Phone    : +1-408-527-5540
 C i s c o S y s t e m s  Fax      : +1-408-526-6603
                          Email    : <a class="moz-txt-link-abbreviated" href="mailto:arafiq@cisco.com">arafiq@cisco.com</a>
                          Epage    : <a class="moz-txt-link-abbreviated" href="mailto:arafiq@epage.cisco.com">arafiq@epage.cisco.com</a>
      <a class="moz-txt-link-abbreviated" href="http://www.cisco.com">www.cisco.com</a>       MailStop : SJCG/2/2
      800-250-4800        URL      : <a class="moz-txt-link-freetext" href="http://wwwin-people.cisco.com/~arafiq">http://wwwin-people.cisco.com/~arafiq</a>
============================================================================
(Refrence URL, IBIS Committee: <a class="moz-txt-link-freetext" href="http://www.eigroup.org/ibis/">http://www.eigroup.org/ibis/</a>)
                         
</pre>
<br>
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