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Subject: ibis-users V1 #73
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ibis-users         Wednesday, January 4 2006         Volume 01 : Number 073




----------------------------------------------------------------------

Date: Tue, 20 Dec 2005 10:20:02 -0800
From: "Mirmak, Michael" <michael.mirmak@intel.com>
Subject: RE: [IBIS-Users] IBIS model correlation...

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Venu,
=20
Thanks for your interest in IBIS.  After looking at the waveforms and
parser output, I have a few comments:
=20
1) I strongly agree with Itzik that the min corner V-t tables should be
allowed to settle to their final DC level to remove I-V/V-t mismatches.
2) The ground clamp table is highly discontinuous.  While this shouldn't
cause problems in the operating region, I cannot vouch for what tools
will do to or with the summed data when the pulldown and ground clamp
tables are added together to drive.  You may wish to add some data
points (the table contains fewer than 50) or recheck your extraction
procedure for that device state.
3) I note that the voltage ordering for the pulldown and ground clamp
tables is positive-to-negative.  This is perfectly legal in IBIS, but I
recall this has caused simulators some trouble in the distant past.
Have you tried reordering these negative-to-positive and checking the
results?
4) To clarify, are you using a test load with a capacitor *before* the
transmission line?  Is there a reason your test load includes this
unusual structure?
5) Please ensure that your SPICE tool is using all the V-t tables
available (some tools feature a setting for a number of rising and/or
falling tables -- ensure this is set to use all 4 present in your
model).
6) (minor point) You may wish to make use of the [Test Load] and [Test
Data] keywords to include your loading and correlation waveform
information from your SPICE tool, to ease comparison.
7) One last question: how does the correlation look into a capacitor
alone (both values) and a transmission line alone?  If these match well,
I would inquire with your vendor about checking the algorithm used for a
mixed load like this one.
=20
Good luck!
=20
- - Michael Mirmak
  Intel Corp.
 =20

=20
=20

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<DIV dir=3Dltr align=3Dleft><SPAN class=3D103563217-20122005><FONT =
face=3DArial=20
color=3D#0000ff size=3D2>Venu,</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D103563217-20122005><FONT =
face=3DArial=20
color=3D#0000ff size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D103563217-20122005><FONT =
face=3DArial=20
color=3D#0000ff size=3D2>Thanks for your interest in IBIS.&nbsp; After =
looking at=20
the waveforms and parser output, I have a few =
comments:</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D103563217-20122005><FONT =
face=3DArial=20
color=3D#0000ff size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D103563217-20122005><FONT =
face=3DArial=20
color=3D#0000ff size=3D2>1) I strongly agree with Itzik that the min =
corner V-t=20
tables should be allowed to settle to their final DC level to remove =
I-V/V-t=20
mismatches.</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D103563217-20122005><FONT =
face=3DArial=20
color=3D#0000ff size=3D2>2) The ground clamp table is highly =
discontinuous.&nbsp;=20
While this shouldn't cause problems in the operating region, I cannot =
vouch for=20
what tools will do to or with&nbsp;the summed data when the pulldown and =
ground=20
clamp tables are added together to drive.&nbsp; You may wish to add some =
data=20
points (the table contains fewer than 50)&nbsp;or recheck your =
extraction=20
procedure for that device state.</FONT></SPAN></DIV>
<DIV dir=3Dltr align=3Dleft><SPAN class=3D103563217-20122005><FONT =
face=3DArial=20
color=3D#0000ff size=3D2>3) I note that the voltage ordering for the =
pulldown and=20
ground clamp tables is positive-to-negative.&nbsp; This is perfectly =
legal in=20
IBIS, but I recall this&nbsp;has caused simulators some trouble in the =
distant=20
past.&nbsp; Have you tried reordering these negative-to-positive and =
checking=20
the results?</FONT></SPAN></DIV>
<DIV><SPAN class=3D103563217-20122005><FONT face=3DArial color=3D#0000ff =
size=3D2>4) To=20
clarify, are you using a test load with a capacitor *before* the =
transmission=20
line?&nbsp; Is there a reason your test load includes this unusual=20
structure?</FONT></SPAN></DIV>
<DIV><SPAN class=3D103563217-20122005><FONT face=3DArial color=3D#0000ff =
size=3D2>5)=20
Please ensure that your SPICE tool is using all the V-t tables available =
(some=20
tools feature a setting for a number of rising and/or falling tables -- =
ensure=20
this is set to use all 4 present in your model).</FONT></SPAN></DIV>
<DIV><SPAN class=3D103563217-20122005><FONT face=3DArial color=3D#0000ff =
size=3D2>6)=20
(minor point) You may wish to make use of the [Test Load] and [Test =
Data]=20
keywords to include your loading and correlation waveform information =
from your=20
SPICE tool, to ease comparison.</FONT></SPAN></DIV>
<DIV><SPAN class=3D103563217-20122005><FONT face=3DArial color=3D#0000ff =
size=3D2>7) One=20
last question: how does the correlation look into a capacitor alone =
(both=20
values) and a transmission line alone?&nbsp; If these match well, I =
would=20
inquire with your vendor about checking the algorithm used for a mixed =
load like=20
this one.</FONT></SPAN></DIV>
<DIV><SPAN class=3D103563217-20122005><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D103563217-20122005><FONT face=3DArial color=3D#0000ff =
size=3D2>Good=20
luck!</FONT></SPAN></DIV>
<DIV><SPAN class=3D103563217-20122005><FONT face=3DArial color=3D#0000ff =

size=3D2></FONT></SPAN>&nbsp;</DIV>
<DIV><SPAN class=3D103563217-20122005><FONT face=3DArial color=3D#0000ff =
size=3D2>-=20
Michael Mirmak</FONT></SPAN></DIV>
<DIV><SPAN class=3D103563217-20122005><FONT face=3DArial color=3D#0000ff =
size=3D2>&nbsp;=20
Intel Corp.</FONT></SPAN></DIV>
<DIV><SPAN class=3D103563217-20122005><FONT face=3DArial size=3D2>&nbsp; =

</FONT></SPAN></DIV>
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------------------------------

Date: Thu, 22 Dec 2005 17:39:13 +0530
From: "Patel, Nirav \(Nirav\)" <nirav@agere.com>
Subject: RE: [IBIS] RE: [IBIS-Users] IBIS model correlation...

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Michael Mirmak,

=20

Thanks for spending time in reviewing our issue and valuable
suggestions. Please see my responses in line with your suggestions.

=20

1) I strongly agree with Itzik that the min corner V-t tables should be
allowed to settle to their final DC level to remove I-V/V-t mismatches.

- - Good point we will run for longer time.

2) The ground clamp table is highly discontinuous.  While this shouldn't
cause problems in the operating region, I cannot vouch for what tools
will do to or with the summed data when the pulldown and ground clamp
tables are added together to drive.  You may wish to add some data
points (the table contains fewer than 50) or recheck your extraction
procedure for that device state.

- - We will work with simulator vendor to see if we get their opinion.

3) I note that the voltage ordering for the pulldown and ground clamp
tables is positive-to-negative.  This is perfectly legal in IBIS, but I
recall this has caused simulators some trouble in the distant past.
Have you tried reordering these negative-to-positive and checking the
results?

- - Interesting point, we will give a try.

4) To clarify, are you using a test load with a capacitor *before* the
transmission line?  Is there a reason your test load includes this
unusual structure?

- - Usually, we use transmission line and then capacitor as per typical
verification setup. However, for ATA buffer, we got the suggestion to do
verification without transmission line also.

5) Please ensure that your SPICE tool is using all the V-t tables
available (some tools feature a setting for a number of rising and/or
falling tables -- ensure this is set to use all 4 present in your
model).

- - Yes, as per the user guide, tool is using all 4 v-t waveforms.=20

6) (minor point) You may wish to make use of the [Test Load] and [Test
Data] keywords to include your loading and correlation waveform
information from your SPICE tool, to ease comparison.

- - Yes. We need to update our methodology to support it. However, do you
have any idea how simulator will use these data?

7) One last question: how does the correlation look into a capacitor
alone (both values) and a transmission line alone?  If these match well,
I would inquire with your vendor about checking the algorithm used for a
mixed load like this one.

- - We used transmission line and 30pf in the initial verification setup.
Hspice and IBIS did NOT match very well. Then we used transmission line
and 5pf in the verification setup. (did NOT match). After getting
suggestions, we did verification with only 5pf load. Hspice and IBIS
matched well. When we used 30pf alone, hspice and IBIS are not matching.
Now, we need to find what can be the reason.

=20

Thanks in advance,

Nirav/Venu


=20

=20


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<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Michael Mirmak,</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Thanks for spending time in =
reviewing our
issue and valuable suggestions. Please see my responses in line with =
your
suggestions.</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dblue face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:blue'>1) I strongly =
agree with
Itzik that the min corner V-t tables should be allowed to settle to =
their final
DC level to remove I-V/V-t mismatches.</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>- Good point we will run for longer =
time.</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dblue face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:blue'>2) The ground =
clamp table
is highly discontinuous.&nbsp; While this shouldn't cause problems in =
the
operating region, I cannot vouch for what tools will do to or =
with&nbsp;the
summed data when the pulldown and ground clamp tables are added together =
to
drive.&nbsp; You may wish to add some data points (the table contains =
fewer
than 50)&nbsp;or recheck your extraction procedure for that device =
state.</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>- We will work with simulator =
vendor to
see if we get their opinion.</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dblue face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:blue'>3) I note that =
the
voltage ordering for the pulldown and ground clamp tables is
positive-to-negative.&nbsp; This is perfectly legal in IBIS, but I =
recall
this&nbsp;has caused simulators some trouble in the distant past.&nbsp; =
Have
you tried reordering these negative-to-positive and checking the =
results?</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>- Interesting point, we will give a =
try.</span></font></p>

<div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dblue face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:blue'>4) To clarify, =
are you
using a test load with a capacitor *before* the transmission line?&nbsp; =
Is
there a reason your test load includes this unusual =
structure?</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>- Usually, we use transmission line =
and
then capacitor as per typical verification setup. However, for ATA =
buffer, we
got the suggestion to do verification without transmission line =
also.</span></font></p>

</div>

<div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dblue face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:blue'>5) Please ensure =
that
your SPICE tool is using all the V-t tables available (some tools =
feature a
setting for a number of rising and/or falling tables -- ensure this is =
set to
use all 4 present in your model).</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>- Yes, as per the user guide, tool =
is
using all 4 v-t waveforms. </span></font></p>

</div>

<div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dblue face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:blue'>6) (minor point) =
You may
wish to make use of the [Test Load] and [Test Data] keywords to include =
your
loading and correlation waveform information from your SPICE tool, to =
ease
comparison.</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>- Yes. We need to update our =
methodology
to support it. However, do you have any idea how simulator will use =
these data?</span></font></p>

</div>

<div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dblue face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:blue'>7) One last =
question: how
does the correlation look into a capacitor alone (both values) and a
transmission line alone?&nbsp; If these match well, I would inquire with =
your
vendor about checking the algorithm used for a mixed load like this =
one.</span></font></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D3 color=3Dnavy face=3D"Times New =
Roman"><span
style=3D'font-size:12.0pt;color:navy'>- We used transmission line and =
30pf in the
initial verification setup. Hspice and IBIS did NOT match very well. =
</span></font><font
size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:10.0pt;font-family:Arial;
color:navy'>Then we used transmission line and 5pf in the verification =
setup. (did
NOT match). After getting suggestions, we did verification with only 5pf =
load. Hspice
and IBIS matched well. When we used 30pf alone, hspice and IBIS are not
matching. Now, we need to find what can be the reason.</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Thanks in =
advance,</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Nirav/Venu</span></font></p>

</div>

<div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'><br>
&nbsp;</span></font></p>

</div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

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------------------------------

Date: Thu, 22 Dec 2005 19:17:25 +0530
From: "Ummalaneni, Venu Babu \(Venu\)" <venubabu@agere.com>
Subject: [IBIS-Users] Why IO buffer name is limited to a max of 20 characters

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Hi All,

=20

Is there any specific reason exist to restrict the IO buffer name to a
maximum of 20 chars in our IBIS standard? Can't we change this rule to
allow more than 20 chars as buffer name?=20

=20

Recently, I experienced some IO buffers which have more than 20 chars in
their names. So, I have to truncate the IBIS model name to support this
rule. If choice is given I do not want to truncate the IBIS model name.=20

=20

Thanks in advance,

=20

Best Regards,

Venu

=20


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<p class=3DMsoNormal><font size=3D3 color=3Dnavy face=3D"Times New =
Roman"><span
style=3D'font-size:12.0pt;color:navy'>Hi All,</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Is there any specific reason exist =
to restrict
the IO buffer name to a maximum of 20 chars in our IBIS standard? =
Can&#8217;t
we change this rule to allow more than 20 chars as buffer name? =
</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Recently, I experienced some IO =
buffers
which have more than 20 chars in their names. So, I have to truncate the =
IBIS
model name to support this rule. If choice is given I do not want to =
truncate
the IBIS model name. </span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Thanks in =
advance,</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Best Regards,</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Venu</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;</span></font></p>

</div>

</body>

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------------------------------

Date: Thu, 22 Dec 2005 19:33:10 +0530
From: Vinayak Ghatawade <vinayak@ti.com>
Subject: [IBIS-Users] R-Load 

Hi,

I had this query as to why we need to model the buffers with R-load
as in most of the cases it is c-load w/without TL line is
driven by the buffer).

does it reflect on the TL impedence that it drives? (50ohm environment)

Also are there any reading material available in the web as to how the 
I/V and ramp/VT
data get used by the boardlevel simulator. If we have I/V and V/T 
mismatches due
to buffer transient behaviour how does the tool interpret this information.

Thanks
vinayak
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------------------------------

Date: Thu, 22 Dec 2005 11:18:11 -0500
From: "Andrew Ingraham" <a.ingraham@ieee.org>
Subject: [IBIS-Users] Re: R-Load 

> I had this query as to why we need to model the buffers with R-load
> as in most of the cases it is c-load w/without TL line is
> driven by the buffer).
>
> does it reflect on the TL impedence that it drives? (50ohm environment)

I think you hit the nail right on the head.

If the buffer drives a transmission line that is 3 ns long, the device sees
an effective load of Zo (typically in the vicinity of 50-80 ohms) for the
first 6 ns after it switches.

Regards,
Andy


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------------------------------

Date: Thu, 22 Dec 2005 10:29:05 -0800
From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
Subject: [IBIS-Users] RE: [IBIS] R-Load 

Vinayak,

In addition to the answer you already got to the first
part of your message here is something to answer the
second part.

This may not how every tool vendor does it, but you can
look at p. 37 in the IBIS_class_2003_11_03.pdf file in:

http://www.eda.org/pub/ibis/training/IBIS_class_2003.zip

or p. 4-9 in:

http://www.eda.org/pub/ibis/summits/jun03b/muranyi1.pdf

to get a better understanding on how IV and Vt curves
work together.

Arpad
==========================================================

- -----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Vinayak Ghatawade
Sent: Thursday, December 22, 2005 6:03 AM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS] R-Load 

Hi,

I had this query as to why we need to model the buffers with R-load
as in most of the cases it is c-load w/without TL line is
driven by the buffer).

does it reflect on the TL impedence that it drives? (50ohm environment)

Also are there any reading material available in the web as to how the 
I/V and ramp/VT
data get used by the boardlevel simulator. If we have I/V and V/T 
mismatches due
to buffer transient behaviour how does the tool interpret this information.

Thanks
vinayak
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------------------------------

Date: Thu, 22 Dec 2005 14:15:28 -0800
From: Bob Ross <bob@teraspeed.com>
Subject: [IBIS-Users] IBIS Computers Upgrade

Hi:

The IBIS reflectors and access to the IBIS content on

   http://www.eda.org/pub/ibis/

or

   http://www.ibis-information.org/

will be down intermittantantly during the holidays for an upgrade.
Nearly all of the critical IBIS information is stored here.

Also note, that the IBIS Home site under EIA or GEIA is currently
down while a more serious problem is being resolved.

Bob
IBIS Postmaster

- ------------------------------------------------------------------------

Subject: RE: End of the year patch run on eda.org

Sorry, left out a detail. I intend to start the patch run just after
midnight Saturday morning and it usually takes between 8-10 hours to
complete. After cleanup, everything should be stable again by 4:00 PM at
the latest.


Ladies and Gentlemen,

Since we will be restructuring the support contract for the EDA.org
server with Accellera to more of a T&M contract in the new year, I need
to get in one last full patch upgrade on the server before the end of
the year. As such, I will be starting a full patch run on the server on
Saturday morning December 24, that will periodically interrupt service
through out the day. If you receive complaints from members that things
are not working, tell them that we are having a maintenance period and
to try again later.

Thank you for your patience and have a Happy Holidays and Happy New Year!


- -- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Labs
121 North River Drive              13610 SW Harness Lane
Narragansett, RI 02882             Beaverton, OR 97008
401-284-1827                       503-430-1065
http://www.teraspeed.com           503-246-8048 Direct
bob@teraspeed.com

Teraspeed is a registered service mark of Teraspeed Consulting Group LLC

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------------------------------

Date: Thu, 22 Dec 2005 19:32:58 -0800
From: "Lynne D. Green" <lgreen22@mindspring.com>
Subject: [IBIS-Users] IBIS Model Review: was: hspice vs IBIS model correlation at different capacitive loads

This is a multi-part message in MIME format.

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Happy holidays!
 
The IBIS Model Review Committee continues to accept models for review, even
during the holiday season.  Access to the IBIS web site is not required.
 
People creating models are encouraged to submit models to the IBIS Model
Review Committee at lgreen22@mindspring.com.  Please include "IBIS Model
Review" as the email subject and attach the model as a plain text file.
 
Best regards,
Lynne Green




 

  _____  

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of Ummalaneni, Venu Babu (Venu)
Sent: Thursday, December 15, 2005 3:07 AM
To: Itzik Peleg; Todd Westerhoff (twesterh); ibis-users@eda.org;
ibis@eda.org
Subject: RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model correlation at
different capacitive loads


Itzik Peleg,
 
Thanks for your concern. I think there is no such feedback.
 
Here, I am attaching the IBIS model.
 
Thanks & Regards,
Venu

 


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</HEAD>
<BODY lang=3DEN-US vLink=3Dpurple link=3Dblue>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D531272603-23122005>Happy holidays!</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D531272603-23122005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D531272603-23122005>The IBIS Model Review Committee continues to =
accept=20
models for review, even during the holiday season.&nbsp; Access to the =
IBIS web=20
site is not required.</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D531272603-23122005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D531272603-23122005>People creating models&nbsp;are encouraged to =
submit=20
models to the IBIS Model Review Committee at <A=20
href=3D"mailto:lgreen22@mindspring.com">lgreen22@mindspring.com</A>.&nbsp=
; Please=20
include "IBIS Model Review" as the email subject and attach the model as =
a plain=20
text file.</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D531272603-23122005></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D531272603-23122005>Best regards,</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3DArial color=3D#0000ff =
size=3D2><SPAN=20
class=3D531272603-23122005>Lynne Green</SPAN></FONT></DIV>
<BLOCKQUOTE dir=3Dltr style=3D"MARGIN-RIGHT: 0px">
  <DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr =
align=3Dleft><FONT=20
  face=3DTahoma size=3D2><BR></FONT><BR></DIV>
  <DIV></DIV>
  <DIV dir=3Dltr align=3Dleft>&nbsp;</DIV><BR>
  <DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr align=3Dleft>
  <HR tabIndex=3D-1>
  <FONT face=3DTahoma size=3D2><B>From:</B> owner-ibis-users@eda.org=20
  [mailto:owner-ibis-users@eda.org] <B>On Behalf Of </B>Ummalaneni, Venu =
Babu=20
  (Venu)<BR><B>Sent:</B> Thursday, December 15, 2005 3:07 =
AM<BR><B>To:</B> Itzik=20
  Peleg; Todd Westerhoff (twesterh); ibis-users@eda.org;=20
  ibis@eda.org<BR><B>Subject:</B> RE: [IBIS] RE: [IBIS-Users] hspice vs =
IBIS=20
  model correlation at different capacitive loads<BR></FONT><BR></DIV>
  <DIV></DIV>
  <DIV class=3DSection1><PRE style=3D"MARGIN-LEFT: 0.5in"><FONT =
face=3D"Courier New" color=3Dnavy size=3D2><SPAN style=3D"FONT-SIZE: =
10pt; COLOR: navy">Itzik Peleg,</SPAN></FONT></PRE><PRE =
style=3D"MARGIN-LEFT: 0.5in"><FONT face=3D"Courier New" color=3Dnavy =
size=3D2><SPAN style=3D"FONT-SIZE: 10pt; COLOR: =
navy">&nbsp;</SPAN></FONT></PRE><PRE style=3D"MARGIN-LEFT: 0.5in"><FONT =
face=3D"Courier New" color=3Dnavy size=3D2><SPAN style=3D"FONT-SIZE: =
10pt; COLOR: navy">Thanks for your concern. I think there is no such =
feedback.</SPAN></FONT></PRE><PRE style=3D"MARGIN-LEFT: 0.5in"><FONT =
face=3D"Courier New" color=3Dnavy size=3D2><SPAN style=3D"FONT-SIZE: =
10pt; COLOR: navy">&nbsp;</SPAN></FONT></PRE><PRE style=3D"MARGIN-LEFT: =
0.5in"><FONT face=3D"Courier New" color=3Dnavy size=3D2><SPAN =
style=3D"FONT-SIZE: 10pt; COLOR: navy">Here, I am attaching the IBIS =
model.</SPAN></FONT></PRE><PRE style=3D"MARGIN-LEFT: 0.5in"><FONT =
face=3D"Courier New" color=3Dnavy size=3D2><SPAN style=3D"FONT-SIZE: =
10pt; COLOR: navy">&nbsp;</SPAN></FONT></PRE><PRE style=3D"MARGIN-LEFT: =
0.5in"><FONT face=3D"Courier New" color=3Dnavy size=3D2><SPAN =
style=3D"FONT-SIZE: 10pt; COLOR: navy">Thanks &amp; =
Regards,</SPAN></FONT></PRE><PRE style=3D"MARGIN-LEFT: 0.5in"><FONT =
face=3D"Courier New" color=3Dnavy size=3D2><SPAN style=3D"FONT-SIZE: =
10pt; COLOR: navy">Venu</SPAN></FONT></PRE>
  <P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
  style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial"></SPAN></FONT>&nbsp;</P></DIV></BLOCKQUOTE></BODY></HTML>

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------------------------------

Date: Fri, 23 Dec 2005 10:46:50 +0530
From: Vinayak Ghatawade <vinayak@ti.com>
Subject: [IBIS-Users] Re: [IBIS] Re: R-Load

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Andy,

Thanks for clarifying this.

The other concern i had was
a. How does the  V/T data(Ramp) and I/V data
get used up at the boardlevel when simulted by a tool.

As far as my knowledge goes ramp rate is imp but not V/T data
for o/p and bidi buffers. I/V data generally depicts the drive strength
of a buffer, how does this correlate into tranisient behaviour by
board level tool when data(swicthing from 1 to 0 and 0 to 1 at some freq)
is applied at dummy i/p pin.

Do we have some documnt (board design) to understand how the IBIS data
is interpreted by the signal integrity tool.

Thanks again for your reply.

Regards
vinayak

Andrew Ingraham wrote:

>>I had this query as to why we need to model the buffers with R-load
>>as in most of the cases it is c-load w/without TL line is
>>driven by the buffer).
>>
>>does it reflect on the TL impedence that it drives? (50ohm environment)
>>    
>>
>
>I think you hit the nail right on the head.
>
>If the buffer drives a transmission line that is 3 ns long, the device sees
>an effective load of Zo (typically in the vicinity of 50-80 ohms) for the
>first 6 ns after it switches.
>
>Regards,
>Andy
>
>
>-----------------------------------------------------------------
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Andy,<br>
<br>
Thanks for clarifying this.<br>
<br>
The other concern i had was <br>
a. How does the&nbsp; V/T data(Ramp) and I/V data <br>
get used up at the boardlevel when simulted by a tool.<br>
<br>
As far as my knowledge goes ramp rate is imp but not V/T data <br>
for o/p and bidi buffers. I/V data generally depicts the drive strength
<br>
of a buffer, how does this correlate into tranisient behaviour by <br>
board level tool when data(swicthing from 1 to 0 and 0 to 1 at some
freq)<br>
is applied at dummy i/p pin. <br>
<br>
Do we have some documnt (board design) to understand how the IBIS data<br>
is interpreted by the signal integrity tool.<br>
<br>
Thanks again for your reply.<br>
<br>
Regards<br>
vinayak<br>
<br>
Andrew Ingraham wrote:
<blockquote cite="mid026301c60713$4f247440$0402a8c0@Ingraham"
 type="cite">
  <blockquote type="cite">
    <pre wrap="">I had this query as to why we need to model the buffers with R-load
as in most of the cases it is c-load w/without TL line is
driven by the buffer).

does it reflect on the TL impedence that it drives? (50ohm environment)
    </pre>
  </blockquote>
  <pre wrap=""><!---->
I think you hit the nail right on the head.

If the buffer drives a transmission line that is 3 ns long, the device sees
an effective load of Zo (typically in the vicinity of 50-80 ohms) for the
first 6 ns after it switches.

Regards,
Andy


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------------------------------

Date: Fri, 23 Dec 2005 09:06:22 -0700
From: rrwolff@micron.com
Subject: [IBIS-Users] [IBIS] Open forum minutes (12/16/05)

This is a multi-part message in MIME format.

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Attached are the minutes of the Friday, December 16, 2005 IBIS Open
Forum teleconference.

Randy Wolff
IBIS Open Forum Secretary

 <<m121605.txt>>=20



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<P><FONT SIZE=3D2 FACE=3D"Verdana">Attached are the minutes of the =
Friday, December 16, 2005 IBIS Open Forum teleconference.</FONT>
</P>

<P><FONT SIZE=3D2 FACE=3D"Verdana">Randy Wolff</FONT>

<BR><FONT SIZE=3D2 FACE=3D"Verdana">IBIS Open Forum Secretary</FONT>
</P>

<P><FONT FACE=3D"Arial" SIZE=3D2 COLOR=3D"#000000"> =
&lt;&lt;m121605.txt&gt;&gt; </FONT>
</P>
<BR>

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------------------------------

Date: Thu, 29 Dec 2005 17:27:02 -0600
From: "Dunbar, Tony" <tony_dunbar@mentor.com>
Subject: [IBIS-Users] Touchstone File Format Spec.

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Hi,
=20
The Touchstone File Format Specification copyright is held by the
EIA/IBIS Open Forum. At least, as far as I can tell that's the case,
given the footnote on the cover of the latest revision of the spec. I
can find.
=20
That revision is 'Rev 1.1', dated 10/1/2003, and is marked 'DRAFT'.
=20
Is there anyone who can confirm that is the latest and current version?
Is there any current work underway to move the spec. beyond the draft
version?
=20
I'm curious because the date seems so old to me and it's still in draft
form after all this time.
=20
Thanks!
Tony

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	charset="us-ascii"
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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Dus-ascii">
<META content=3D"MSHTML 6.00.2900.2769" name=3DGENERATOR></HEAD>
<BODY>
<DIV><FONT face=3DCourier size=3D2><SPAN=20
class=3D951031723-29122005>Hi,</SPAN></FONT></DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN=20
class=3D951031723-29122005></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN class=3D951031723-29122005>The =
Touchstone=20
File Format Specification copyright is held by the EIA/IBIS Open Forum. =
At=20
least, as far as I can tell that's the case, given the footnote on the =
cover of=20
the latest revision of the spec. I can find.</SPAN></FONT></DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN=20
class=3D951031723-29122005></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN class=3D951031723-29122005>That =
revision is=20
'Rev 1.1',&nbsp;dated 10/1/2003,&nbsp;and is marked =
'DRAFT'.</SPAN></FONT></DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN=20
class=3D951031723-29122005></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN class=3D951031723-29122005>Is =
there anyone=20
who can confirm that is the latest and current version? Is there any =
current=20
work underway to move the spec. beyond the draft =
version?</SPAN></FONT></DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN=20
class=3D951031723-29122005></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN class=3D951031723-29122005>I'm =
curious=20
because the date&nbsp;seems so old to me and it's still in draft form =
after all=20
this time.</SPAN></FONT></DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN=20
class=3D951031723-29122005></SPAN></FONT>&nbsp;</DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN=20
class=3D951031723-29122005>Thanks!</SPAN></FONT></DIV>
<DIV><FONT face=3DCourier size=3D2><SPAN=20
class=3D951031723-29122005>Tony</SPAN></FONT></DIV></BODY></HTML>

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------------------------------

Date: Thu, 29 Dec 2005 18:26:34 -0800
From: "Peters, Stephen" <stephen.peters@intel.com>
Subject: RE: [IBIS-Users] Touchstone File Format Spec.

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Hi Tony:

=20

   Yes, the Touchstone File Format Spec doc is copyright by the EIA/IBIS
Open Forum and rev 1.1 is the latest and current version.  And yes,
apparently version 1.1 was never officially voted on by the Open Forum.
I found the following paragraph from the Sept. 12, 2003 Open Forum
minutes (it was at this meeting the ICM spec was approved).=20

=20

Some concerns were raised regarding whether the Agilent Touchstone(TM)

document written by the Open Forum required an approval vote.  The

Open Forum members agreed that, until further information was received

from Agilent regarding the draft 1.2 document, no further action should

be taken on approving the Agilent Touchstone(TM) document.

=20

As far as I can tell, the rev 1.2 spec was never perused. Off hand, I
cannot say what the difference between rev. 1.1 and 1.2 was, but I doubt
it was major.

=20

It might be worthwhile for the Open Forum to make rev 1.1 official.

=20

Regards,

  Stephen Peters

  Intel Corp.



=20

________________________________

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Dunbar, Tony
Sent: Thursday, December 29, 2005 3:27 PM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS-Users] Touchstone File Format Spec.

=20

Hi,

=20

The Touchstone File Format Specification copyright is held by the
EIA/IBIS Open Forum. At least, as far as I can tell that's the case,
given the footnote on the cover of the latest revision of the spec. I
can find.

=20

That revision is 'Rev 1.1', dated 10/1/2003, and is marked 'DRAFT'.

=20

Is there anyone who can confirm that is the latest and current version?
Is there any current work underway to move the spec. beyond the draft
version?

=20

I'm curious because the date seems so old to me and it's still in draft
form after all this time.

=20

Thanks!

Tony


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<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Hi =
Tony:<o:p></o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'><o:p>&nbsp;</o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;&nbsp; Yes, the Touchstone =
File
Format Spec doc is copyright by the EIA/IBIS Open Forum and rev 1.1 is =
the
latest and current version.&nbsp; And yes, apparently version 1.1 was =
never
officially voted on by the Open Forum.&nbsp; I found the following =
paragraph
from the Sept. 12, 2003 Open Forum minutes (it was at this meeting the =
ICM spec
was approved). <o:p></o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'><o:p>&nbsp;</o:p></span></font></p>

<p class=3DMsoNormal =
style=3D'margin-left:.5in;text-autospace:none'><font size=3D2
face=3D"Courier New"><span =
style=3D'font-size:10.0pt;font-family:"Courier New"'>Some
concerns were raised regarding whether the Agilent =
Touchstone(TM)<o:p></o:p></span></font></p>

<p class=3DMsoNormal =
style=3D'margin-left:.5in;text-autospace:none'><font size=3D2
face=3D"Courier New"><span =
style=3D'font-size:10.0pt;font-family:"Courier New"'>document
written by the Open Forum required an approval vote.&nbsp; =
The<o:p></o:p></span></font></p>

<p class=3DMsoNormal =
style=3D'margin-left:.5in;text-autospace:none'><font size=3D2
face=3D"Courier New"><span =
style=3D'font-size:10.0pt;font-family:"Courier New"'>Open
Forum members agreed that, until further information was =
received<o:p></o:p></span></font></p>

<p class=3DMsoNormal =
style=3D'margin-left:.5in;text-autospace:none'><font size=3D2
face=3D"Courier New"><span =
style=3D'font-size:10.0pt;font-family:"Courier New"'>from
Agilent regarding the draft 1.2 document, no further action =
should<o:p></o:p></span></font></p>

<p class=3DMsoNormal =
style=3D'margin-left:.5in;text-autospace:none'><font size=3D2
face=3D"Courier New"><span =
style=3D'font-size:10.0pt;font-family:"Courier New"'>be
taken on approving the Agilent Touchstone(TM) =
document.<o:p></o:p></span></font></p>

<p class=3DMsoNormal style=3D'text-autospace:none'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier =
New"'><o:p>&nbsp;</o:p></span></font></p>

<p class=3DMsoNormal style=3D'text-autospace:none'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>As far as I can =
tell, the
rev 1.2 spec was never perused. Off hand, I cannot say what the =
difference
between rev. 1.1 and 1.2 was, but I doubt it was =
major.<o:p></o:p></span></font></p>

<p class=3DMsoNormal style=3D'text-autospace:none'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier =
New"'><o:p>&nbsp;</o:p></span></font></p>

<p class=3DMsoNormal style=3D'text-autospace:none'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>It might be =
worthwhile for
the Open Forum to make rev 1.1 official.<o:p></o:p></span></font></p>

<p class=3DMsoNormal style=3D'text-autospace:none'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier =
New"'><o:p>&nbsp;</o:p></span></font></p>

<p class=3DMsoNormal style=3D'text-autospace:none'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier =
New"'>Regards,<o:p></o:p></span></font></p>

<p class=3DMsoNormal style=3D'text-autospace:none'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>&nbsp; Stephen =
Peters<o:p></o:p></span></font></p>

<p class=3DMsoNormal style=3D'text-autospace:none'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>&nbsp; Intel =
Corp.<br>
<br>
<o:p></o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'><o:p>&nbsp;</o:p></span></font></p>

<div>

<div class=3DMsoNormal align=3Dcenter style=3D'text-align:center'><font =
size=3D3
face=3D"Times New Roman"><span style=3D'font-size:12.0pt'>

<hr size=3D2 width=3D"100%" align=3Dcenter tabindex=3D-1>

</span></font></div>

<p class=3DMsoNormal><b><font size=3D2 face=3DTahoma><span =
style=3D'font-size:10.0pt;
font-family:Tahoma;font-weight:bold'>From:</span></font></b><font =
size=3D2
face=3DTahoma><span style=3D'font-size:10.0pt;font-family:Tahoma'>
owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] <b><span
style=3D'font-weight:bold'>On Behalf Of </span></b>Dunbar, Tony<br>
<b><span style=3D'font-weight:bold'>Sent:</span></b> Thursday, December =
29, 2005
3:27 PM<br>
<b><span style=3D'font-weight:bold'>To:</span></b> ibis-users@eda.org;
ibis@eda.org<br>
<b><span style=3D'font-weight:bold'>Subject:</span></b> [IBIS-Users] =
Touchstone
File Format Spec.</span></font><o:p></o:p></p>

</div>

<p class=3DMsoNormal><font size=3D3 face=3D"Times New Roman"><span =
style=3D'font-size:
12.0pt'><o:p>&nbsp;</o:p></span></font></p>

<div>

<p class=3DMsoNormal><font size=3D2 face=3DCourier><span =
style=3D'font-size:10.0pt;
font-family:Courier'>Hi,</span></font><o:p></o:p></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D3 face=3D"Times New Roman"><span =
style=3D'font-size:
12.0pt'>&nbsp;<o:p></o:p></span></font></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D2 face=3DCourier><span =
style=3D'font-size:10.0pt;
font-family:Courier'>The Touchstone File Format Specification copyright =
is held
by the EIA/IBIS Open Forum. At least, as far as I can tell that's the =
case,
given the footnote on the cover of the latest revision of the spec. I =
can find.</span></font><o:p></o:p></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D3 face=3D"Times New Roman"><span =
style=3D'font-size:
12.0pt'>&nbsp;<o:p></o:p></span></font></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D2 face=3DCourier><span =
style=3D'font-size:10.0pt;
font-family:Courier'>That revision is 'Rev 1.1',&nbsp;dated =
10/1/2003,&nbsp;and
is marked 'DRAFT'.</span></font><o:p></o:p></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D3 face=3D"Times New Roman"><span =
style=3D'font-size:
12.0pt'>&nbsp;<o:p></o:p></span></font></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D2 face=3DCourier><span =
style=3D'font-size:10.0pt;
font-family:Courier'>Is there anyone who can confirm that is the latest =
and
current version? Is there any current work underway to move the spec. =
beyond
the draft version?</span></font><o:p></o:p></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D3 face=3D"Times New Roman"><span =
style=3D'font-size:
12.0pt'>&nbsp;<o:p></o:p></span></font></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D2 face=3DCourier><span =
style=3D'font-size:10.0pt;
font-family:Courier'>I'm curious because the date&nbsp;seems so old to =
me and
it's still in draft form after all this =
time.</span></font><o:p></o:p></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D3 face=3D"Times New Roman"><span =
style=3D'font-size:
12.0pt'>&nbsp;<o:p></o:p></span></font></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D2 face=3DCourier><span =
style=3D'font-size:10.0pt;
font-family:Courier'>Thanks!</span></font><o:p></o:p></p>

</div>

<div>

<p class=3DMsoNormal><font size=3D2 face=3DCourier><span =
style=3D'font-size:10.0pt;
font-family:Courier'>Tony</span></font><o:p></o:p></p>

</div>

</div>

</body>

</html>

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------------------------------

Date: Fri, 30 Dec 2005 14:33:13 -0700
From: mhaque@micron.com
Subject: [IBIS-Users] Fork-Endfork in IBIS EBD Models

Hi All,
When creating IBIS EBD model for multi die package, is multiple fork and
endfork statement allowed for one main branch? For example if the device
has 4 die and from each pad bondwires are connected to one external ball
is it okay to describe the path description as below?

Note the last fork-endfork statement. Is it necessary that the original
path needs to be continued and therefore the path description has to end
with a series path? 

[Path Description] QUAD_DIE_SIGNAL
A1
Len=0 R=16.646m L=1.406n C=0.456p /      |Substrate R, L and C 

Fork
Len=0 R=10m L=1nH C=1p /             |Bondwire r,l,c from pin A1 to U1,
pad #21
Endfork
Node U1.21

Fork
Len=0 R=10m L=1nH C=1p /             |Bondwire r,l,c from pin A1 to U2,
pad #21
Endfork
Node U2.21

Fork 				|Bondwire r,l,c from pin A1 to U3, pad
#21
Len=0 R=10m L=1nH C=1p 
Endfork 
Node U3.21

Fork 				|Bondwire r,l,c from pin A1 to U4 , pad
#21
Len=0 R=10m L=1nH C=1p 
Endfork 
Node U4.21

Best Regards
Moshiul Haque
Micron Technology Inc.

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------------------------------

Date: Fri, 30 Dec 2005 13:51:04 -0800
From: "Tom Dagostino" <tom@teraspeed.com>
Subject: RE: [IBIS-Users] Fork-Endfork in IBIS EBD Models

There is a great example of this in the EBD section of the IBIS
specification, its a good read.

Also, you can always make a prototype file and pass it by the IBIS Golden
Parser.  Which is a good idea whenever you create an IBIS file.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On
Behalf Of mhaque@micron.com
Sent: Friday, December 30, 2005 1:33 PM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS-Users] Fork-Endfork in IBIS EBD Models


Hi All,
When creating IBIS EBD model for multi die package, is multiple fork and
endfork statement allowed for one main branch? For example if the device
has 4 die and from each pad bondwires are connected to one external ball
is it okay to describe the path description as below?

Note the last fork-endfork statement. Is it necessary that the original
path needs to be continued and therefore the path description has to end
with a series path?

[Path Description] QUAD_DIE_SIGNAL
A1
Len=0 R=16.646m L=1.406n C=0.456p /      |Substrate R, L and C

Fork
Len=0 R=10m L=1nH C=1p /             |Bondwire r,l,c from pin A1 to U1,
pad #21
Endfork
Node U1.21

Fork
Len=0 R=10m L=1nH C=1p /             |Bondwire r,l,c from pin A1 to U2,
pad #21
Endfork
Node U2.21

Fork 				|Bondwire r,l,c from pin A1 to U3, pad
#21
Len=0 R=10m L=1nH C=1p
Endfork
Node U3.21

Fork 				|Bondwire r,l,c from pin A1 to U4 , pad
#21
Len=0 R=10m L=1nH C=1p
Endfork
Node U4.21

Best Regards
Moshiul Haque
Micron Technology Inc.

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------------------------------

Date: Fri, 30 Dec 2005 19:23:56 -0800
From: "Mirmak, Michael" <michael.mirmak@intel.com>
Subject: [IBIS-Users] Agenda, IBIS Open Forum teleconference for Jan. 6, 2006

                IBIS Open Forum Meeting Agenda 
                    for January 6, 2005
   
        Telephone Number    Bridge        Passcode 
         1-916-356-2663       1           260-9744
   
  All meetings are 8:00 AM to 9:55 AM US Pacific Time. When calling 
  into the meeting, provide the bridge number and passcode at 
  the automated prompts. If asked by an operator, please request 
  to join the IBIS Open Forum hosted by Michael Mirmak. 
   
  For international numbers, please contact Michael Mirmak. 

  8:00 Check-In, Intros, Announcements                     Mirmak
       - Intros of New IBIS Participants, Meeting Quorum   Mirmak 
       - Call for Patents                                  Mirmak 
       - Membership Update and Treasurer's Report          Mirmak 
       - Review of Previous Meeting's Minutes (and ARs)    Mirmak  
           December 16, 2005 Open Forum Minutes 
       - Web Page Updates                                  Huq 
       - Mailing List Administration                       Ross
       - Library Update                                    Wang 
       - Announcements, Opens for New Issues               All 
   
  8:15 Project Discussions and Subcommittee Reports
 
       International/External Progress                     

       EIA, ANSI Approval Activities                       Wolff 
       - Status of ICM 1.1 Standardization under ANSI?
       - Cookbook as GEIA Engineering Bulletin?

       Summit Status                                       All
       - Asian IBIS Summit Wrap-Up
       - DesignCon Summit (Feb. 6 -> 9)
       - DATE (Mar. 10)

       Task Group Reports           
       - Quality                                           Haller 
       - Model Review                                      Green 
       - Futures                                           Mirmak 
           International Participation?
       - Cookbook                                          Mirmak
           Reported Issues
       - Macromodeling Library                             Muranyi 
   
       New Issues                                          All 
   
  8:45 Technical Discussion 

       BIRD97.2: Gate Modulation Effect                    Muranyi

       BIRD98: Gate Modulation Effect (table format)       Muranyi
   
       BIRD100.1: Allow Pure Analog *-AMS Models           Dodd/Muranyi

       BIRD101: Section 6b, Figure 12 Example Note         Ross
       - Call for Vote

       IBISCHK4 BUG Status                                 All

       ICMCHK1 BUG Status                                  All

       New Technical Issues                                All 
   
  9:50 Wrap Up and Next Meeting Plans                      Mirmak
       - January 27, 2006 IBIS Open Forum
   
  9:55 Sign Off 


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------------------------------

Date: Mon, 2 Jan 2006 11:16:20 -0700
From: mhaque@micron.com
Subject: RE: [IBIS] RE: [IBIS-Users] Fork-Endfork in IBIS EBD Models

Hi Tom,
Thanks for the information. I have tried with a prototype file and it
passes the IBISCHK. The problem is that the description does not show
any specific example for the multiple fork-end fork statement and I am
not sure if the format of the path description is being interpreted
correctly. For example if "Node" in the ebd file if used outside the
fork statement it will still pass the IBISCHK parser without generating
any warning due to floating node. I am trying to confirm if I use
multiple fork and endfork statements the data will interpreted correctly
by the EDA simulator or if I have to use a different format for example
a dummy series section between every fork endfork statements to make it
working properly. 

Best Regards
Moshiul Haque
Micron Technology Inc.

- -----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Tom
Dagostino
Sent: Friday, December 30, 2005 2:51 PM
To: mhaque; ibis-users@eda.org; ibis@eda.org
Subject: [IBIS] RE: [IBIS-Users] Fork-Endfork in IBIS EBD Models

There is a great example of this in the EBD section of the IBIS
specification, its a good read.

Also, you can always make a prototype file and pass it by the IBIS
Golden
Parser.  Which is a good idea whenever you create an IBIS file.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On
Behalf Of mhaque@micron.com
Sent: Friday, December 30, 2005 1:33 PM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS-Users] Fork-Endfork in IBIS EBD Models


Hi All,
When creating IBIS EBD model for multi die package, is multiple fork and
endfork statement allowed for one main branch? For example if the device
has 4 die and from each pad bondwires are connected to one external ball
is it okay to describe the path description as below?

Note the last fork-endfork statement. Is it necessary that the original
path needs to be continued and therefore the path description has to end
with a series path?

[Path Description] QUAD_DIE_SIGNAL
A1
Len=0 R=16.646m L=1.406n C=0.456p /      |Substrate R, L and C

Fork
Len=0 R=10m L=1nH C=1p /             |Bondwire r,l,c from pin A1 to U1,
pad #21
Endfork
Node U1.21

Fork
Len=0 R=10m L=1nH C=1p /             |Bondwire r,l,c from pin A1 to U2,
pad #21
Endfork
Node U2.21

Fork 				|Bondwire r,l,c from pin A1 to U3, pad
#21
Len=0 R=10m L=1nH C=1p
Endfork
Node U3.21

Fork 				|Bondwire r,l,c from pin A1 to U4 , pad
#21
Len=0 R=10m L=1nH C=1p
Endfork
Node U4.21

Best Regards
Moshiul Haque
Micron Technology Inc.

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------------------------------

Date: Tue, 3 Jan 2006 09:33:38 -0800
From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
Subject: [IBIS-Users] RE: [IBIS] Why IO buffer name is limited to a max of 20 characters

This is a multi-part message in MIME format.

- ------_=_NextPart_001_01C6108B.D56F6C12
Content-Type: text/plain;
	charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable

Venu,
=20
This is rooted in the earlier versions of the spec when
the line length was limited to 80 characters, and therefore
we had limited space for each field on the lines of the
[Pin] section.  Now that the line length limit is 120
characters (if I am not mistaken), we could allow for=20
longer model names, but someone would need to write a
BIRD for it.  Do you want to volunteer?
=20
Arpad
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

________________________________

From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of =
Ummalaneni, Venu Babu (Venu)
Sent: Thursday, December 22, 2005 5:47 AM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS] Why IO buffer name is limited to a max of 20 characters



Hi All,

=20

Is there any specific reason exist to restrict the IO buffer name to a =
maximum of 20 chars in our IBIS standard? Can't we change this rule to =
allow more than 20 chars as buffer name?=20

=20

Recently, I experienced some IO buffers which have more than 20 chars in =
their names. So, I have to truncate the IBIS model name to support this =
rule. If choice is given I do not want to truncate the IBIS model name.=20

=20

Thanks in advance,

=20

Best Regards,

Venu

=20


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<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>Venu,</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>This is rooted in the earlier versions of the =
spec=20
when</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>the </SPAN></FONT><FONT face=3D"Courier New" =
size=3D2><SPAN=20
class=3D163253017-03012006>line length was limited to 80 characters, and =

therefore</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>we had limited space for each field on the =
lines of=20
the</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>[Pin] section.&nbsp; Now that the line length =
limit is=20
120</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>characters (if I am not mistaken), we could =
allow for=20
</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>longer model names, but someone would need to =
write=20
a</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>BIRD for it.&nbsp; Do you want to=20
volunteer?</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>Arpad</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D</SPAN></FONT></=
DIV><BR>
<DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr align=3Dleft>
<HR tabIndex=3D-1>
<FONT face=3DTahoma size=3D2><B>From:</B> owner-ibis@eda.org=20
[mailto:owner-ibis@eda.org] <B>On Behalf Of </B>Ummalaneni, Venu Babu=20
(Venu)<BR><B>Sent:</B> Thursday, December 22, 2005 5:47 AM<BR><B>To:</B> =

ibis-users@eda.org; ibis@eda.org<BR><B>Subject:</B> [IBIS] Why IO buffer =
name is=20
limited to a max of 20 characters<BR></FONT><BR></DIV>
<DIV></DIV>
<DIV class=3DSection1>
<P class=3DMsoNormal><FONT face=3D"Times New Roman" color=3Dnavy =
size=3D3><SPAN=20
style=3D"FONT-SIZE: 12pt; COLOR: navy">Hi All,</SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial"></SPAN></FONT>&nbsp;</P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Is there any =
specific=20
reason exist to restrict the IO buffer name to a maximum of 20 chars in =
our IBIS=20
standard? Can=92t we change this rule to allow more than 20 chars as =
buffer name?=20
</SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial"></SPAN></FONT>&nbsp;</P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Recently, I =
experienced=20
some IO buffers which have more than 20 chars in their names. So, I have =
to=20
truncate the IBIS model name to support this rule. If choice is given I =
do not=20
want to truncate the IBIS model name. </SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial"></SPAN></FONT>&nbsp;</P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Thanks in=20
advance,</SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial"></SPAN></FONT>&nbsp;</P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Best=20
Regards,</SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial">Venu</SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
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------------------------------

Date: Tue, 3 Jan 2006 10:01:05 -0800
From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
Subject: RE: [IBIS-Users] RE: [IBIS] Why IO buffer name is limited to a max of 20 characters

This is a multi-part message in MIME format.

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Sorry, the BIRD has already been written by Michael Mirmak
it is BIRD93.1
=20
http://www.vhdl.org/pub/ibis/birds/bird93.1.txt
=20
Arpad
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
=20

________________________________

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On =
Behalf Of Muranyi, Arpad
Sent: Tuesday, January 03, 2006 9:34 AM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS-Users] RE: [IBIS] Why IO buffer name is limited to a max =
of 20 characters


Venu,
=20
This is rooted in the earlier versions of the spec when
the line length was limited to 80 characters, and therefore
we had limited space for each field on the lines of the
[Pin] section.  Now that the line length limit is 120
characters (if I am not mistaken), we could allow for=20
longer model names, but someone would need to write a
BIRD for it.  Do you want to volunteer?
=20
Arpad
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

________________________________

From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of =
Ummalaneni, Venu Babu (Venu)
Sent: Thursday, December 22, 2005 5:47 AM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS] Why IO buffer name is limited to a max of 20 characters



Hi All,

=20

Is there any specific reason exist to restrict the IO buffer name to a =
maximum of 20 chars in our IBIS standard? Can't we change this rule to =
allow more than 20 chars as buffer name?=20

=20

Recently, I experienced some IO buffers which have more than 20 chars in =
their names. So, I have to truncate the IBIS model name to support this =
rule. If choice is given I do not want to truncate the IBIS model name.=20

=20

Thanks in advance,

=20

Best Regards,

Venu

=20


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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD><TITLE>hspice vs IBIS model correlation at different =
capacitive loads</TITLE>
<META http-equiv=3DContent-Type content=3D"text/html; =
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</HEAD>
<BODY lang=3DEN-US vLink=3Dpurple link=3Dblue>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D993435917-03012006>Sorry, the BIRD has already been written by =
Michael=20
Mirmak</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D993435917-03012006>it is BIRD93.1</SPAN></FONT></DIV>
<DIV>&nbsp;</DIV>
<DIV><FONT face=3D"Courier New" size=3D2><A=20
href=3D"http://www.vhdl.org/pub/ibis/birds/bird93.1.txt">http://www.vhdl.=
org/pub/ibis/birds/bird93.1.txt</A></FONT></DIV>
<DIV><FONT face=3D"Courier New" size=3D2></FONT>&nbsp;</DIV>
<DIV><SPAN class=3D993435917-03012006><FONT face=3D"Courier New"=20
size=3D2>Arpad</FONT></SPAN></DIV>
<DIV><SPAN class=3D993435917-03012006><FONT face=3D"Courier New"=20
size=3D2>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D</FONT></SPAN></DIV>
<DIV><FONT face=3D"Courier New" size=3D2></FONT>&nbsp;</DIV>
<DIV><BR></DIV>
<DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr align=3Dleft>
<HR tabIndex=3D-1>
<FONT face=3DTahoma size=3D2><B>From:</B> owner-ibis-users@eda.org=20
[mailto:owner-ibis-users@eda.org] <B>On Behalf Of </B>Muranyi,=20
Arpad<BR><B>Sent:</B> Tuesday, January 03, 2006 9:34 AM<BR><B>To:</B>=20
ibis-users@eda.org; ibis@eda.org<BR><B>Subject:</B> [IBIS-Users] RE: =
[IBIS] Why=20
IO buffer name is limited to a max of 20 characters<BR></FONT><BR></DIV>
<DIV></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>Venu,</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>This is rooted in the earlier versions of the =
spec=20
when</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>the </SPAN></FONT><FONT face=3D"Courier New" =
size=3D2><SPAN=20
class=3D163253017-03012006>line length was limited to 80 characters, and =

therefore</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>we had limited space for each field on the =
lines of=20
the</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>[Pin] section.&nbsp; Now that the line length =
limit is=20
120</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>characters (if I am not mistaken), we could =
allow for=20
</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>longer model names, but someone would need to =
write=20
a</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>BIRD for it.&nbsp; Do you want to=20
volunteer?</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006></SPAN></FONT>&nbsp;</DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>Arpad</SPAN></FONT></DIV>
<DIV dir=3Dltr align=3Dleft><FONT face=3D"Courier New" size=3D2><SPAN=20
class=3D163253017-03012006>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D</SPAN></FONT></=
DIV><BR>
<DIV class=3DOutlookMessageHeader lang=3Den-us dir=3Dltr align=3Dleft>
<HR tabIndex=3D-1>
<FONT face=3DTahoma size=3D2><B>From:</B> owner-ibis@eda.org=20
[mailto:owner-ibis@eda.org] <B>On Behalf Of </B>Ummalaneni, Venu Babu=20
(Venu)<BR><B>Sent:</B> Thursday, December 22, 2005 5:47 AM<BR><B>To:</B> =

ibis-users@eda.org; ibis@eda.org<BR><B>Subject:</B> [IBIS] Why IO buffer =
name is=20
limited to a max of 20 characters<BR></FONT><BR></DIV>
<DIV></DIV>
<DIV class=3DSection1>
<P class=3DMsoNormal><FONT face=3D"Times New Roman" color=3Dnavy =
size=3D3><SPAN=20
style=3D"FONT-SIZE: 12pt; COLOR: navy">Hi All,</SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial"></SPAN></FONT>&nbsp;</P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Is there any =
specific=20
reason exist to restrict the IO buffer name to a maximum of 20 chars in =
our IBIS=20
standard? Can=92t we change this rule to allow more than 20 chars as =
buffer name?=20
</SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial"></SPAN></FONT>&nbsp;</P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Recently, I =
experienced=20
some IO buffers which have more than 20 chars in their names. So, I have =
to=20
truncate the IBIS model name to support this rule. If choice is given I =
do not=20
want to truncate the IBIS model name. </SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial"></SPAN></FONT>&nbsp;</P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Thanks in=20
advance,</SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial"></SPAN></FONT>&nbsp;</P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: Arial">Best=20
Regards,</SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial">Venu</SPAN></FONT></P>
<P class=3DMsoNormal><FONT face=3DArial color=3Dnavy size=3D2><SPAN=20
style=3D"FONT-SIZE: 10pt; COLOR: navy; FONT-FAMILY: =
Arial"></SPAN></FONT>&nbsp;</P></DIV></BODY></HTML>

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------------------------------

Date: Wed, 04 Jan 2006 11:36:35 +0530
From: Vinayak Ghatawade <vinayak@ti.com>
Subject: Re: [IBIS] RE: [IBIS-Users] hspice vs IBIS model correlation at different capacitive loads

Hi all,

I had this query where in if the buffer is going to be
used for shorter TL (transmission line) then do we need
to generate the V-T data with C-load rather than R-load since the
buffer rise time is comparable to TL delay.

We have this case where in the *buffer has feedback* and with R-load we see
V-T table with lot of ringing(oscillations) when pad has reached steady 
state.
As this is no real situation for us as TL delay that buffer would see in 
real world is too small
comparable to buffer tr/tf.

How do we generate the V-T data in this case. Should we use C-load 
instead of R-load
or we release the V-T data with some oscillations when pad reaches 
steady state. Does
simulator really have a problem seeing such V-T data.

Thanks
vinayak

Ummalaneni, Venu Babu (Venu) wrote:

>Itzik Peleg and all,
>
> 
>
>Thank you very much for your help. Please see my answers in line with your comments.
>
> 
>
>1. This buffer operation is intended for a load resistance of more than 5k ohm. 
>
>2. Yes, you are right. I should allow more transient simulation time for min corner.
>
>However, reported behavior (correlation of hspice vs IBIS) is for typ corner.
>
> 
>
>Even I have tried with 50, 100, 500 & 5k ohm terminations for capturing V-t waveforms. But I could not see any improvement in the correlation. I am still investigating this issue.
>
> 
>
> 
>
>                 Thanks & Best Regards,
>
>Venu
>
> -----Original Message-----
> *From:* Itzik Peleg [mailto:itzikpe@marvell.com]
> *Sent:* Thursday, December 15, 2005 7:09 PM
> *To:* Ummalaneni, Venu Babu (Venu); ibis-users@eda.org; ibis@eda.org
> *Subject:* RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model 
> correlation at different capacitive loads
>
> Hello Venu
>
> Here are my comments reviewing your model:
>
> 1. The loading condition is 1k ohm !? isn’t this buffer should be used 
> in 50 ohm environment? If the answer is yes then you should use 50 ohm.
>
> 2. It seems like the slow didn’t finish the complete transition. You 
> should allow more time for the V(t) simulation in order that the 
> response get to steady state (like the maximum case in red). This also 
> causing the warning that you have when using IBIS check:
>
> **************************************************************
>
> WARNING - Model ATA4N1K000: The [Rising Waveform]
>
> with [R_fixture]=1000 Ohms and [V_fixture_min]=0V
>
> has MIN column DC endpoints of 0.00V and 2.78v, but
>
> an equivalent load applied to the model's I-V tables yields
>
> different voltages (-0.00V and 2.92V),
>
> a difference of 0.00% and 4.69%, respectively.
>
> WARNING - Model ATA4N1K000: The [Falling Waveform]
>
> with [R_fixture]=1000 Ohms and [V_fixture_min]=3V
>
> has MIN column DC endpoints of 0.21V and 3.00v, but
>
> an equivalent load applied to the model's I-V tables yields
>
> different voltages ( 0.05V and 3.00V),
>
> a difference of 5.54% and 0.00%, respectively.
>
> ****************************************************************
>
> 3. Based on the 2 previous points I can think of a buffer for slow 
> interface that should be used in 50 ohm environment. If this is the 
> case you should allow the transient simulation more time on 50 ohm.
>
> Hope this will halp.
>
>--
>
>Regards
>
> 
>
>Itzik Peleg
>
>Board Technology Group
>
> 
>
>Marvell Semiconductor Israel Ltd
>
>6 Hamada Street 
>
>
>
>
>Mordot HaCarmel Industrial Park
>
>
>
>Yokneam 20692, ISRAEL
>
> 
>
>Email - itzikpe@marvell.com <mailto:itzikpe@marvell.com>
>
>Tel   - +972 4  9091192
>
>Cell  - +972 54 4452482
>
>Fax   - +972 4  9091501
>
>WWW Page: http://www.marvell.com <BLOCKED::http://www.marvell.com>
>
>========================================================================
>
>This message may contain confidential, proprietary or legally privileged
>
>information. The information is intended only for the use of the
>
>individual or entity named above. If the reader of this message is not
>
>the intended recipient, you are hereby notified that any dissemination,
>
>distribution or copying of this communication is strictly prohibited.
>
>If you have received this communication in error, please notify us
>
>immediately by telephone, or by e-mail and delete the message from
>
>your computer.
>
> 
>
>Thank you!
>
>========================================================================
>
> ------------------------------------------------------------------------
>
> *From:* Ummalaneni, Venu Babu (Venu) [mailto:venubabu@agere.com]
> *Sent:* Thursday, December 15, 2005 1:07 PM
> *To:* Itzik Peleg; Todd Westerhoff (twesterh); ibis-users@eda.org; 
> ibis@eda.org
> *Subject:* RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model 
> correlation at different capacitive loads
>
>Itzik Peleg,
>
> 
>
>Thanks for your concern. I think there is no such feedback.
>
> 
>
>Here, I am attaching the IBIS model.
>
> 
>
>Thanks & Regards,
>
>Venu
>
> -----Original Message-----
> *From:* Itzik Peleg [mailto:itzikpe@marvell.com]
> *Sent:* Wednesday, December 14, 2005 12:50 PM
> *To:* Ummalaneni, Venu Babu (Venu); Todd Westerhoff (twesterh); 
> ibis-users@eda.org; ibis@eda.org
> *Subject:* RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model 
> correlation at different capacitive loads
>
> Hello Venu
>
> Just to add one more possibility doe’s your buffer has a feedback?
>
> Could you attached the IBIS model, or show the I(V) and V(t) curves?
>
>--
>
>Regards
>
> 
>
>Itzik Peleg
>
>Board Technology Group
>
> 
>
>Marvell Semiconductor Israel Ltd
>
>6 Hamada Street 
>
>
>
>
>
>
>
>
> 
>
>
>
>
>
>
>
>
>
> 
>
>Mordot HaCarmel Industrial Park
>
>
>
>  
>
>
>
>
>
> 
>
>
>
>
>
>
>
>
>
> 
>
>Yokneam 20692, ISRAEL
>
> 
>
>Email - itzikpe@marvell.com <mailto:itzikpe@marvell.com>
>
>Tel   - +972 4  9091192
>
>Cell  - +972 54 4452482
>
>Fax   - +972 4  9091501
>
>WWW Page: http://www.marvell.com <BLOCKED::http://www.marvell.com>
>
>========================================================================
>
>This message may contain confidential, proprietary or legally privileged
>
>information. The information is intended only for the use of the
>
>individual or entity named above. If the reader of this message is not
>
>the intended recipient, you are hereby notified that any dissemination,
>
>distribution or copying of this communication is strictly prohibited.
>
>If you have received this communication in error, please notify us
>
>immediately by telephone, or by e-mail and delete the message from
>
>your computer.
>
> 
>
>Thank you!
>
>========================================================================
>
> ------------------------------------------------------------------------
>
> *From:* owner-ibis@eda.org [mailto:owner-ibis@eda.org] *On Behalf Of 
> *Ummalaneni, Venu Babu (Venu)
> *Sent:* Tuesday, December 13, 2005 2:49 PM
> *To:* Todd Westerhoff (twesterh); ibis-users@eda.org; ibis@eda.org
> *Subject:* [IBIS] RE: [IBIS-Users] hspice vs IBIS model correlation at 
> different capacitive loads
>
> Todd,
>
> Thanks for your inputs.
>
> I have verified the programming options of driver and it’s fine. Here, 
> I am attaching the correlation waveforms of the simulations by using a 
> 0.1 ohm resistor instead of transmission line in both load (5pF & 
> 30pF) cases. Still, I am seeing a bad correlation in 30pF case.
>
> Please ignore my previously attached *.PDF.
>
> Once again thanks for your response.
>
> Best Reagrds,
>
> Venu
>
> -----Original Message-----
> *From:* Todd Westerhoff (twesterh) [mailto:twesterh@cisco.com]
> *Sent:* Tuesday, December 13, 2005 5:43 PM
> *To:* Ummalaneni, Venu Babu (Venu); ibis-users@eda.org; ibis@eda.org
> *Subject:* RE: [IBIS-Users] hspice vs IBIS model correlation at 
> different capacitive loads
>
> Venu,
>
> How long is the transmission line you're using ... about 1ns?
>
> Your IBIS driver in the 30pf case seems to be taking several 
> round-trips to charge the load where the HSpice driver doesn't - if 
> this is a programmable driver, is it possible the driver settings for 
> the two plots are different? In the top plot for the 30pf case, the 
> IBIS driver looks like a much weaker output with a faster slew rate to 
> me ...
>
> Todd.
>
>
> Todd Westerhoff
> High Speed Design Group Manager
> Cisco Systems
> 1414 Massachusetts Ave
> Boxboro, MA 01719
> email:twesterh@cisco.com
> ph: 978-936-2149
> ____________________________________________
> "Always do right.
> This will gratify some people and astonish the rest."
>
> - Mark Twain
>
> ------------------------------------------------------------------------
>
> *From:* owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] *On 
> Behalf Of *Ummalaneni, Venu Babu (Venu)
> *Sent:* Tuesday, December 13, 2005 5:38 AM
> *To:* ibis-users@eda.org; ibis@eda.org
> *Subject:* [IBIS-Users] hspice vs IBIS model correlation at different 
> capacitive loads
>
> Hi Gurus,
>
> I have an ATA* IBIS model and it is correlating well with hspice model 
> when I am using a 5pF load followed by a transmission line. If I 
> replace the 5pF load with 30pF correlation is bad (particularly in 
> 2^nd page waveform of attached PDF).
>
> Could some one comment on this, where it is going wrong?
>
> Your comments/inputs are highly appreciated.
>
> Attachments: ata4nik_5pf.pdf – hspice and IBIS model waveforms 
> captured using 5pF load
>
> ata4nik_30pf.pdf – hspice and IBIS model waveforms captured using 30pF 
> load
>
> Thanks & Best Regards,
>
> Venu
>
> <<ata4n1k_30pf.pdf>> <<ata4n1k_5pf.pdf>>
>

|------------------------------------------------------------------
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|with just the appropriate command message(s) in the body:
|
|  help
|  subscribe   ibis       <optional e-mail address, if different>
|  subscribe   ibis-users <optional e-mail address, if different>
|  unsubscribe ibis       <optional e-mail address, if different>
|  unsubscribe ibis-users <optional e-mail address, if different>
|
|or email a written request to ibis-request@eda.org.
|
|IBIS reflector archives exist under:
|
|  http://www.eda.org/pub/ibis/email_archive/  Recent
|  http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993

------------------------------

Date: Tue, 3 Jan 2006 22:40:33 -0800
From: "Tom Dagostino" <tom@teraspeed.com>
Subject: RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model correlation at different capacitive loads

I've been given many models to "fix" that had a C_fixture in them.
Universally, these models showed poor transient response into resistive
loads and had even worse problems trying to drive a reactive load.  I would
strongly recommend not to use a C_fixture in any model.

If your transmission line's length is on the order of Tr/Tf then you are
really into the range where you will see transmission line effects.  If this
line is not terminated then I would expect to see a lot of ringing in the
simulations.

You need to understand why you are seeing the ringing and proceed from
there.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

- -----Original Message-----
From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On
Behalf Of Vinayak Ghatawade
Sent: Tuesday, January 03, 2006 10:07 PM
To: ibis-users@eda.org; ibis@eda.org
Subject: Re: [IBIS] RE: [IBIS-Users] hspice vs IBIS model correlation at
different capacitive loads


Hi all,

I had this query where in if the buffer is going to be
used for shorter TL (transmission line) then do we need
to generate the V-T data with C-load rather than R-load since the
buffer rise time is comparable to TL delay.

We have this case where in the *buffer has feedback* and with R-load we see
V-T table with lot of ringing(oscillations) when pad has reached steady
state.
As this is no real situation for us as TL delay that buffer would see in
real world is too small
comparable to buffer tr/tf.

How do we generate the V-T data in this case. Should we use C-load
instead of R-load
or we release the V-T data with some oscillations when pad reaches
steady state. Does
simulator really have a problem seeing such V-T data.

Thanks
vinayak

Ummalaneni, Venu Babu (Venu) wrote:

>Itzik Peleg and all,
>
>
>
>Thank you very much for your help. Please see my answers in line with your
comments.
>
>
>
>1. This buffer operation is intended for a load resistance of more than 5k
ohm.
>
>2. Yes, you are right. I should allow more transient simulation time for
min corner.
>
>However, reported behavior (correlation of hspice vs IBIS) is for typ
corner.
>
>
>
>Even I have tried with 50, 100, 500 & 5k ohm terminations for capturing V-t
waveforms. But I could not see any improvement in the correlation. I am
still investigating this issue.
>
>
>
>
>
>                 Thanks & Best Regards,
>
>Venu
>
> -----Original Message-----
> *From:* Itzik Peleg [mailto:itzikpe@marvell.com]
> *Sent:* Thursday, December 15, 2005 7:09 PM
> *To:* Ummalaneni, Venu Babu (Venu); ibis-users@eda.org; ibis@eda.org
> *Subject:* RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model
> correlation at different capacitive loads
>
> Hello Venu
>
> Here are my comments reviewing your model:
>
> 1. The loading condition is 1k ohm !? isn’t this buffer should be used
> in 50 ohm environment? If the answer is yes then you should use 50 ohm.
>
> 2. It seems like the slow didn’t finish the complete transition. You
> should allow more time for the V(t) simulation in order that the
> response get to steady state (like the maximum case in red). This also
> causing the warning that you have when using IBIS check:
>
> **************************************************************
>
> WARNING - Model ATA4N1K000: The [Rising Waveform]
>
> with [R_fixture]=1000 Ohms and [V_fixture_min]=0V
>
> has MIN column DC endpoints of 0.00V and 2.78v, but
>
> an equivalent load applied to the model's I-V tables yields
>
> different voltages (-0.00V and 2.92V),
>
> a difference of 0.00% and 4.69%, respectively.
>
> WARNING - Model ATA4N1K000: The [Falling Waveform]
>
> with [R_fixture]=1000 Ohms and [V_fixture_min]=3V
>
> has MIN column DC endpoints of 0.21V and 3.00v, but
>
> an equivalent load applied to the model's I-V tables yields
>
> different voltages ( 0.05V and 3.00V),
>
> a difference of 5.54% and 0.00%, respectively.
>
> ****************************************************************
>
> 3. Based on the 2 previous points I can think of a buffer for slow
> interface that should be used in 50 ohm environment. If this is the
> case you should allow the transient simulation more time on 50 ohm.
>
> Hope this will halp.
>
>--
>
>Regards
>
>
>
>Itzik Peleg
>
>Board Technology Group
>
>
>
>Marvell Semiconductor Israel Ltd
>
>6 Hamada Street
>
>
>
>
>Mordot HaCarmel Industrial Park
>
>
>
>Yokneam 20692, ISRAEL
>
>
>
>Email - itzikpe@marvell.com <mailto:itzikpe@marvell.com>
>
>Tel   - +972 4  9091192
>
>Cell  - +972 54 4452482
>
>Fax   - +972 4  9091501
>
>WWW Page: http://www.marvell.com <BLOCKED::http://www.marvell.com>
>
>========================================================================
>
>This message may contain confidential, proprietary or legally privileged
>
>information. The information is intended only for the use of the
>
>individual or entity named above. If the reader of this message is not
>
>the intended recipient, you are hereby notified that any dissemination,
>
>distribution or copying of this communication is strictly prohibited.
>
>If you have received this communication in error, please notify us
>
>immediately by telephone, or by e-mail and delete the message from
>
>your computer.
>
>
>
>Thank you!
>
>========================================================================
>
> ------------------------------------------------------------------------
>
> *From:* Ummalaneni, Venu Babu (Venu) [mailto:venubabu@agere.com]
> *Sent:* Thursday, December 15, 2005 1:07 PM
> *To:* Itzik Peleg; Todd Westerhoff (twesterh); ibis-users@eda.org;
> ibis@eda.org
> *Subject:* RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model
> correlation at different capacitive loads
>
>Itzik Peleg,
>
>
>
>Thanks for your concern. I think there is no such feedback.
>
>
>
>Here, I am attaching the IBIS model.
>
>
>
>Thanks & Regards,
>
>Venu
>
> -----Original Message-----
> *From:* Itzik Peleg [mailto:itzikpe@marvell.com]
> *Sent:* Wednesday, December 14, 2005 12:50 PM
> *To:* Ummalaneni, Venu Babu (Venu); Todd Westerhoff (twesterh);
> ibis-users@eda.org; ibis@eda.org
> *Subject:* RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model
> correlation at different capacitive loads
>
> Hello Venu
>
> Just to add one more possibility doe’s your buffer has a feedback?
>
> Could you attached the IBIS model, or show the I(V) and V(t) curves?
>
>--
>
>Regards
>
>
>
>Itzik Peleg
>
>Board Technology Group
>
>
>
>Marvell Semiconductor Israel Ltd
>
>6 Hamada Street
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>Mordot HaCarmel Industrial Park
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>Yokneam 20692, ISRAEL
>
>
>
>Email - itzikpe@marvell.com <mailto:itzikpe@marvell.com>
>
>Tel   - +972 4  9091192
>
>Cell  - +972 54 4452482
>
>Fax   - +972 4  9091501
>
>WWW Page: http://www.marvell.com <BLOCKED::http://www.marvell.com>
>
>========================================================================
>
>This message may contain confidential, proprietary or legally privileged
>
>information. The information is intended only for the use of the
>
>individual or entity named above. If the reader of this message is not
>
>the intended recipient, you are hereby notified that any dissemination,
>
>distribution or copying of this communication is strictly prohibited.
>
>If you have received this communication in error, please notify us
>
>immediately by telephone, or by e-mail and delete the message from
>
>your computer.
>
>
>
>Thank you!
>
>========================================================================
>
> ------------------------------------------------------------------------
>
> *From:* owner-ibis@eda.org [mailto:owner-ibis@eda.org] *On Behalf Of
> *Ummalaneni, Venu Babu (Venu)
> *Sent:* Tuesday, December 13, 2005 2:49 PM
> *To:* Todd Westerhoff (twesterh); ibis-users@eda.org; ibis@eda.org
> *Subject:* [IBIS] RE: [IBIS-Users] hspice vs IBIS model correlation at
> different capacitive loads
>
> Todd,
>
> Thanks for your inputs.
>
> I have verified the programming options of driver and it’s fine. Here,
> I am attaching the correlation waveforms of the simulations by using a
> 0.1 ohm resistor instead of transmission line in both load (5pF &
> 30pF) cases. Still, I am seeing a bad correlation in 30pF case.
>
> Please ignore my previously attached *.PDF.
>
> Once again thanks for your response.
>
> Best Reagrds,
>
> Venu
>
> -----Original Message-----
> *From:* Todd Westerhoff (twesterh) [mailto:twesterh@cisco.com]
> *Sent:* Tuesday, December 13, 2005 5:43 PM
> *To:* Ummalaneni, Venu Babu (Venu); ibis-users@eda.org; ibis@eda.org
> *Subject:* RE: [IBIS-Users] hspice vs IBIS model correlation at
> different capacitive loads
>
> Venu,
>
> How long is the transmission line you're using ... about 1ns?
>
> Your IBIS driver in the 30pf case seems to be taking several
> round-trips to charge the load where the HSpice driver doesn't - if
> this is a programmable driver, is it possible the driver settings for
> the two plots are different? In the top plot for the 30pf case, the
> IBIS driver looks like a much weaker output with a faster slew rate to
> me ...
>
> Todd.
>
>
> Todd Westerhoff
> High Speed Design Group Manager
> Cisco Systems
> 1414 Massachusetts Ave
> Boxboro, MA 01719
> email:twesterh@cisco.com
> ph: 978-936-2149
> ____________________________________________
> "Always do right.
> This will gratify some people and astonish the rest."
>
> - Mark Twain
>
> ------------------------------------------------------------------------
>
> *From:* owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] *On
> Behalf Of *Ummalaneni, Venu Babu (Venu)
> *Sent:* Tuesday, December 13, 2005 5:38 AM
> *To:* ibis-users@eda.org; ibis@eda.org
> *Subject:* [IBIS-Users] hspice vs IBIS model correlation at different
> capacitive loads
>
> Hi Gurus,
>
> I have an ATA* IBIS model and it is correlating well with hspice model
> when I am using a 5pF load followed by a transmission line. If I
> replace the 5pF load with 30pF correlation is bad (particularly in
> 2^nd page waveform of attached PDF).
>
> Could some one comment on this, where it is going wrong?
>
> Your comments/inputs are highly appreciated.
>
> Attachments: ata4nik_5pf.pdf – hspice and IBIS model waveforms
> captured using 5pF load
>
> ata4nik_30pf.pdf – hspice and IBIS model waveforms captured using 30pF
> load
>
> Thanks & Best Regards,
>
> Venu
>
> <<ata4n1k_30pf.pdf>> <<ata4n1k_5pf.pdf>>
>

|------------------------------------------------------------------
|For help or to subscribe/unsubscribe, email majordomo@eda.org
|with just the appropriate command message(s) in the body:
|
|  help
|  subscribe   ibis       <optional e-mail address, if different>
|  subscribe   ibis-users <optional e-mail address, if different>
|  unsubscribe ibis       <optional e-mail address, if different>
|  unsubscribe ibis-users <optional e-mail address, if different>
|
|or email a written request to ibis-request@eda.org.
|
|IBIS reflector archives exist under:
|
|  http://www.eda.org/pub/ibis/email_archive/  Recent
|  http://www.eda.org/pub/ibis/users_archive/  Recent
|  http://www.eda.org/pub/ibis/email/          E-mail since 1993


|------------------------------------------------------------------
|For help or to subscribe/unsubscribe, email majordomo@eda.org
|with just the appropriate command message(s) in the body:
|
|  help
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------------------------------

Date: Wed, 04 Jan 2006 12:50:50 +0530
From: Vinayak Ghatawade <vinayak@ti.com>
Subject: Re: [IBIS] RE: [IBIS-Users] hspice vs IBIS model correlation at different capacitive loads

Tom,
Thanks for the reply.

Buffer for which IBIS is been generated will be used
with a shorter transmission line in which case c effect is more
pronounced than r-load effect. There is no termination in this case at the
recieving end since we are making sure the buffer will be used
with shorter trace.

Can we define transmission line load for V-T. The current V-T data that
we have generated has oscillations due to adaptive behaviour of the 
buffer since
this is not real case (might happen with longer trace).

Thanks again
vinayak



Tom Dagostino wrote:

>I've been given many models to "fix" that had a C_fixture in them.
>Universally, these models showed poor transient response into resistive
>loads and had even worse problems trying to drive a reactive load.  I would
>strongly recommend not to use a C_fixture in any model.
>
>If your transmission line's length is on the order of Tr/Tf then you are
>really into the range where you will see transmission line effects.  If this
>line is not terminated then I would expect to see a lot of ringing in the
>simulations.
>
>You need to understand why you are seeing the ringing and proceed from
>there.
>
>Tom Dagostino
>Teraspeed(R) Labs
>13610 SW Harness Lane
>Beaverton, OR 97008
>503-430-1065
>tom@teraspeed.com
>www.teraspeed.com
>
>Teraspeed Consulting Group LLC
>121 North River Drive
>Narragansett, RI 02882
>401-284-1827
>
>-----Original Message-----
>From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org]On
>Behalf Of Vinayak Ghatawade
>Sent: Tuesday, January 03, 2006 10:07 PM
>To: ibis-users@eda.org; ibis@eda.org
>Subject: Re: [IBIS] RE: [IBIS-Users] hspice vs IBIS model correlation at
>different capacitive loads
>
>
>Hi all,
>
>I had this query where in if the buffer is going to be
>used for shorter TL (transmission line) then do we need
>to generate the V-T data with C-load rather than R-load since the
>buffer rise time is comparable to TL delay.
>
>We have this case where in the *buffer has feedback* and with R-load we see
>V-T table with lot of ringing(oscillations) when pad has reached steady
>state.
>As this is no real situation for us as TL delay that buffer would see in
>real world is too small
>comparable to buffer tr/tf.
>
>How do we generate the V-T data in this case. Should we use C-load
>instead of R-load
>or we release the V-T data with some oscillations when pad reaches
>steady state. Does
>simulator really have a problem seeing such V-T data.
>
>Thanks
>vinayak
>
>Ummalaneni, Venu Babu (Venu) wrote:
>
>  
>
>>Itzik Peleg and all,
>>
>>
>>
>>Thank you very much for your help. Please see my answers in line with your
>>    
>>
>comments.
>  
>
>>
>>1. This buffer operation is intended for a load resistance of more than 5k
>>    
>>
>ohm.
>  
>
>>2. Yes, you are right. I should allow more transient simulation time for
>>    
>>
>min corner.
>  
>
>>However, reported behavior (correlation of hspice vs IBIS) is for typ
>>    
>>
>corner.
>  
>
>>
>>Even I have tried with 50, 100, 500 & 5k ohm terminations for capturing V-t
>>    
>>
>waveforms. But I could not see any improvement in the correlation. I am
>still investigating this issue.
>  
>
>>
>>
>>
>>                Thanks & Best Regards,
>>
>>Venu
>>
>>-----Original Message-----
>>*From:* Itzik Peleg [mailto:itzikpe@marvell.com]
>>*Sent:* Thursday, December 15, 2005 7:09 PM
>>*To:* Ummalaneni, Venu Babu (Venu); ibis-users@eda.org; ibis@eda.org
>>*Subject:* RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model
>>correlation at different capacitive loads
>>
>>Hello Venu
>>
>>Here are my comments reviewing your model:
>>
>>1. The loading condition is 1k ohm !? isn’t this buffer should be used
>>in 50 ohm environment? If the answer is yes then you should use 50 ohm.
>>
>>2. It seems like the slow didn’t finish the complete transition. You
>>should allow more time for the V(t) simulation in order that the
>>response get to steady state (like the maximum case in red). This also
>>causing the warning that you have when using IBIS check:
>>
>>**************************************************************
>>
>>WARNING - Model ATA4N1K000: The [Rising Waveform]
>>
>>with [R_fixture]=1000 Ohms and [V_fixture_min]=0V
>>
>>has MIN column DC endpoints of 0.00V and 2.78v, but
>>
>>an equivalent load applied to the model's I-V tables yields
>>
>>different voltages (-0.00V and 2.92V),
>>
>>a difference of 0.00% and 4.69%, respectively.
>>
>>WARNING - Model ATA4N1K000: The [Falling Waveform]
>>
>>with [R_fixture]=1000 Ohms and [V_fixture_min]=3V
>>
>>has MIN column DC endpoints of 0.21V and 3.00v, but
>>
>>an equivalent load applied to the model's I-V tables yields
>>
>>different voltages ( 0.05V and 3.00V),
>>
>>a difference of 5.54% and 0.00%, respectively.
>>
>>****************************************************************
>>
>>3. Based on the 2 previous points I can think of a buffer for slow
>>interface that should be used in 50 ohm environment. If this is the
>>case you should allow the transient simulation more time on 50 ohm.
>>
>>Hope this will halp.
>>
>>--
>>
>>Regards
>>
>>
>>
>>Itzik Peleg
>>
>>Board Technology Group
>>
>>
>>
>>Marvell Semiconductor Israel Ltd
>>
>>6 Hamada Street
>>
>>
>>
>>
>>Mordot HaCarmel Industrial Park
>>
>>
>>
>>Yokneam 20692, ISRAEL
>>
>>
>>
>>Email - itzikpe@marvell.com <mailto:itzikpe@marvell.com>
>>
>>Tel   - +972 4  9091192
>>
>>Cell  - +972 54 4452482
>>
>>Fax   - +972 4  9091501
>>
>>WWW Page: http://www.marvell.com <BLOCKED::http://www.marvell.com>
>>
>>========================================================================
>>
>>This message may contain confidential, proprietary or legally privileged
>>
>>information. The information is intended only for the use of the
>>
>>individual or entity named above. If the reader of this message is not
>>
>>the intended recipient, you are hereby notified that any dissemination,
>>
>>distribution or copying of this communication is strictly prohibited.
>>
>>If you have received this communication in error, please notify us
>>
>>immediately by telephone, or by e-mail and delete the message from
>>
>>your computer.
>>
>>
>>
>>Thank you!
>>
>>========================================================================
>>
>>------------------------------------------------------------------------
>>
>>*From:* Ummalaneni, Venu Babu (Venu) [mailto:venubabu@agere.com]
>>*Sent:* Thursday, December 15, 2005 1:07 PM
>>*To:* Itzik Peleg; Todd Westerhoff (twesterh); ibis-users@eda.org;
>>ibis@eda.org
>>*Subject:* RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model
>>correlation at different capacitive loads
>>
>>Itzik Peleg,
>>
>>
>>
>>Thanks for your concern. I think there is no such feedback.
>>
>>
>>
>>Here, I am attaching the IBIS model.
>>
>>
>>
>>Thanks & Regards,
>>
>>Venu
>>
>>-----Original Message-----
>>*From:* Itzik Peleg [mailto:itzikpe@marvell.com]
>>*Sent:* Wednesday, December 14, 2005 12:50 PM
>>*To:* Ummalaneni, Venu Babu (Venu); Todd Westerhoff (twesterh);
>>ibis-users@eda.org; ibis@eda.org
>>*Subject:* RE: [IBIS] RE: [IBIS-Users] hspice vs IBIS model
>>correlation at different capacitive loads
>>
>>Hello Venu
>>
>>Just to add one more possibility doe’s your buffer has a feedback?
>>
>>Could you attached the IBIS model, or show the I(V) and V(t) curves?
>>
>>--
>>
>>Regards
>>
>>
>>
>>Itzik Peleg
>>
>>Board Technology Group
>>
>>
>>
>>Marvell Semiconductor Israel Ltd
>>
>>6 Hamada Street
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>Mordot HaCarmel Industrial Park
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>Yokneam 20692, ISRAEL
>>
>>
>>
>>Email - itzikpe@marvell.com <mailto:itzikpe@marvell.com>
>>
>>Tel   - +972 4  9091192
>>
>>Cell  - +972 54 4452482
>>
>>Fax   - +972 4  9091501
>>
>>WWW Page: http://www.marvell.com <BLOCKED::http://www.marvell.com>
>>
>>========================================================================
>>
>>This message may contain confidential, proprietary or legally privileged
>>
>>information. The information is intended only for the use of the
>>
>>individual or entity named above. If the reader of this message is not
>>
>>the intended recipient, you are hereby notified that any dissemination,
>>
>>distribution or copying of this communication is strictly prohibited.
>>
>>If you have received this communication in error, please notify us
>>
>>immediately by telephone, or by e-mail and delete the message from
>>
>>your computer.
>>
>>
>>
>>Thank you!
>>
>>========================================================================
>>
>>------------------------------------------------------------------------
>>
>>*From:* owner-ibis@eda.org [mailto:owner-ibis@eda.org] *On Behalf Of
>>*Ummalaneni, Venu Babu (Venu)
>>*Sent:* Tuesday, December 13, 2005 2:49 PM
>>*To:* Todd Westerhoff (twesterh); ibis-users@eda.org; ibis@eda.org
>>*Subject:* [IBIS] RE: [IBIS-Users] hspice vs IBIS model correlation at
>>different capacitive loads
>>
>>Todd,
>>
>>Thanks for your inputs.
>>
>>I have verified the programming options of driver and it’s fine. Here,
>>I am attaching the correlation waveforms of the simulations by using a
>>0.1 ohm resistor instead of transmission line in both load (5pF &
>>30pF) cases. Still, I am seeing a bad correlation in 30pF case.
>>
>>Please ignore my previously attached *.PDF.
>>
>>Once again thanks for your response.
>>
>>Best Reagrds,
>>
>>Venu
>>
>>-----Original Message-----
>>*From:* Todd Westerhoff (twesterh) [mailto:twesterh@cisco.com]
>>*Sent:* Tuesday, December 13, 2005 5:43 PM
>>*To:* Ummalaneni, Venu Babu (Venu); ibis-users@eda.org; ibis@eda.org
>>*Subject:* RE: [IBIS-Users] hspice vs IBIS model correlation at
>>different capacitive loads
>>
>>Venu,
>>
>>How long is the transmission line you're using ... about 1ns?
>>
>>Your IBIS driver in the 30pf case seems to be taking several
>>round-trips to charge the load where the HSpice driver doesn't - if
>>this is a programmable driver, is it possible the driver settings for
>>the two plots are different? In the top plot for the 30pf case, the
>>IBIS driver looks like a much weaker output with a faster slew rate to
>>me ...
>>
>>Todd.
>>
>>
>>Todd Westerhoff
>>High Speed Design Group Manager
>>Cisco Systems
>>1414 Massachusetts Ave
>>Boxboro, MA 01719
>>email:twesterh@cisco.com
>>ph: 978-936-2149
>>____________________________________________
>>"Always do right.
>>This will gratify some people and astonish the rest."
>>
>>- Mark Twain
>>
>>------------------------------------------------------------------------
>>
>>*From:* owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] *On
>>Behalf Of *Ummalaneni, Venu Babu (Venu)
>>*Sent:* Tuesday, December 13, 2005 5:38 AM
>>*To:* ibis-users@eda.org; ibis@eda.org
>>*Subject:* [IBIS-Users] hspice vs IBIS model correlation at different
>>capacitive loads
>>
>>Hi Gurus,
>>
>>I have an ATA* IBIS model and it is correlating well with hspice model
>>when I am using a 5pF load followed by a transmission line. If I
>>replace the 5pF load with 30pF correlation is bad (particularly in
>>2^nd page waveform of attached PDF).
>>
>>Could some one comment on this, where it is going wrong?
>>
>>Your comments/inputs are highly appreciated.
>>
>>Attachments: ata4nik_5pf.pdf – hspice and IBIS model waveforms
>>captured using 5pF load
>>
>>ata4nik_30pf.pdf – hspice and IBIS model waveforms captured using 30pF
>>load
>>
>>Thanks & Best Regards,
>>
>>Venu
>>
>><<ata4n1k_30pf.pdf>> <<ata4n1k_5pf.pdf>>
>>
>>    
>>
>
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>
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------------------------------

Date: Wed, 4 Jan 2006 16:13:26 +0530
From: "Ummalaneni, Venu Babu \(Venu\)" <venubabu@agere.com>
Subject: RE: [IBIS-Users] RE: [IBIS] Why IO buffer name is limited to a max of 20 characters

This is a multi-part message in MIME format.

- ------_=_NextPart_001_01C6111B.B19BEEDC
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	charset="us-ascii"
Content-Transfer-Encoding: quoted-printable

Arpad,

=20

Thanks for your message and the pointer. Could you please tell me
when/how this BIRD93.1 will come for voting?

=20

Best Regards,

Venu

=20

=20

- -----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of
Muranyi, Arpad
Sent: Tuesday, January 03, 2006 11:31 PM
To: ibis-users@eda.org; ibis@eda.org
Subject: RE: [IBIS-Users] RE: [IBIS] Why IO buffer name is limited to a
max of 20 characters

=20

Sorry, the BIRD has already been written by Michael Mirmak

it is BIRD93.1

=20

http://www.vhdl.org/pub/ibis/birds/bird93.1.txt

=20

Arpad

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

=20

=20

  _____ =20

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On
Behalf Of Muranyi, Arpad
Sent: Tuesday, January 03, 2006 9:34 AM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS-Users] RE: [IBIS] Why IO buffer name is limited to a max
of 20 characters

Venu,

=20

This is rooted in the earlier versions of the spec when

the line length was limited to 80 characters, and therefore

we had limited space for each field on the lines of the

[Pin] section.  Now that the line length limit is 120

characters (if I am not mistaken), we could allow for=20

longer model names, but someone would need to write a

BIRD for it.  Do you want to volunteer?

=20

Arpad

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

=20

  _____ =20

From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of
Ummalaneni, Venu Babu (Venu)
Sent: Thursday, December 22, 2005 5:47 AM
To: ibis-users@eda.org; ibis@eda.org
Subject: [IBIS] Why IO buffer name is limited to a max of 20 characters

Hi All,

=20

Is there any specific reason exist to restrict the IO buffer name to a
maximum of 20 chars in our IBIS standard? Can't we change this rule to
allow more than 20 chars as buffer name?=20

=20

Recently, I experienced some IO buffers which have more than 20 chars in
their names. So, I have to truncate the IBIS model name to support this
rule. If choice is given I do not want to truncate the IBIS model name.=20

=20

Thanks in advance,

=20

Best Regards,

Venu

=20


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<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Arpad,</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Thanks for your message and the =
pointer. Could
you please tell me when/how this BIRD93.1 will come for =
voting?</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>&nbsp;</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Best Regards,</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
style=3D'font-size:
10.0pt;font-family:Arial;color:navy'>Venu</span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dnavy face=3DArial><span =
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<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3DTahoma><span
style=3D'font-size:10.0pt;font-family:Tahoma'>-----Original =
Message-----<br>
<b><span style=3D'font-weight:bold'>From:</span></b> owner-ibis@eda.org
[mailto:owner-ibis@eda.org] <b><span style=3D'font-weight:bold'>On =
Behalf Of </span></b>Muranyi,
Arpad<br>
<b><span style=3D'font-weight:bold'>Sent:</span></b> Tuesday, January =
03, 2006
11:31 PM<br>
<b><span style=3D'font-weight:bold'>To:</span></b> ibis-users@eda.org;
ibis@eda.org<br>
<b><span style=3D'font-weight:bold'>Subject:</span></b> RE: [IBIS-Users] =
RE:
[IBIS] Why IO buffer name is limited to a max of 20 =
characters</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>Sorry, the BIRD has =
already
been written by Michael Mirmak</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>it is =
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<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'><a
href=3D"http://www.vhdl.org/pub/ibis/birds/bird93.1.txt">http://www.vhdl.=
org/pub/ibis/birds/bird93.1.txt</a></span></font></p>

</div>

<div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

</div>

<div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier =
New"'>Arpad</span></font></p>

</div>

<div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier =
New"'>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D</span></font></p>

</div>

<div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

</div>

<div>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

</div>

<div class=3DMsoNormal align=3Dcenter =
style=3D'margin-left:.5in;text-align:center'><font
size=3D3 face=3D"Times New Roman"><span style=3D'font-size:12.0pt'>

<hr size=3D2 width=3D"100%" align=3Dcenter>

</span></font></div>

<p class=3DMsoNormal =
style=3D'margin-right:0in;margin-bottom:12.0pt;margin-left:
.5in'><b><font size=3D2 face=3DTahoma><span =
style=3D'font-size:10.0pt;font-family:
Tahoma;font-weight:bold'>From:</span></font></b><font size=3D2 =
face=3DTahoma><span
style=3D'font-size:10.0pt;font-family:Tahoma'> owner-ibis-users@eda.org
[mailto:owner-ibis-users@eda.org] <b><span style=3D'font-weight:bold'>On =
Behalf
Of </span></b>Muranyi, Arpad<br>
<b><span style=3D'font-weight:bold'>Sent:</span></b> Tuesday, January =
03, 2006
9:34 AM<br>
<b><span style=3D'font-weight:bold'>To:</span></b> ibis-users@eda.org;
ibis@eda.org<br>
<b><span style=3D'font-weight:bold'>Subject:</span></b> [IBIS-Users] RE: =
[IBIS]
Why IO buffer name is limited to a max of 20 =
characters</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier =
New"'>Venu,</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>This is rooted in =
the
earlier versions of the spec when</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>the line length was =
limited
to 80 characters, and therefore</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>we had limited =
space for
each field on the lines of the</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>[Pin] =
section.&nbsp; Now
that the line length limit is 120</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>characters (if I am =
not
mistaken), we could allow for </span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>longer model names, =
but
someone would need to write a</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier New"'>BIRD for it.&nbsp; =
Do you
want to volunteer?</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier =
New"'>Arpad</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
face=3D"Courier New"><span
style=3D'font-size:10.0pt;font-family:"Courier =
New"'>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

<div class=3DMsoNormal align=3Dcenter =
style=3D'margin-left:.5in;text-align:center'><font
size=3D3 face=3D"Times New Roman"><span style=3D'font-size:12.0pt'>

<hr size=3D2 width=3D"100%" align=3Dcenter>

</span></font></div>

<p class=3DMsoNormal =
style=3D'margin-right:0in;margin-bottom:12.0pt;margin-left:
.5in'><b><font size=3D2 face=3DTahoma><span =
style=3D'font-size:10.0pt;font-family:
Tahoma;font-weight:bold'>From:</span></font></b><font size=3D2 =
face=3DTahoma><span
style=3D'font-size:10.0pt;font-family:Tahoma'> owner-ibis@eda.org
[mailto:owner-ibis@eda.org] <b><span style=3D'font-weight:bold'>On =
Behalf Of </span></b>Ummalaneni,
Venu Babu (Venu)<br>
<b><span style=3D'font-weight:bold'>Sent:</span></b> Thursday, December =
22, 2005
5:47 AM<br>
<b><span style=3D'font-weight:bold'>To:</span></b> ibis-users@eda.org;
ibis@eda.org<br>
<b><span style=3D'font-weight:bold'>Subject:</span></b> [IBIS] Why IO =
buffer name
is limited to a max of 20 characters</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
color=3Dnavy
face=3D"Times New Roman"><span style=3D'font-size:12.0pt;color:navy'>Hi =
All,</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dnavy face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:navy'>Is there any =
specific
reason exist to restrict the IO buffer name to a maximum of 20 chars in =
our
IBIS standard? Can&#8217;t we change this rule to allow more than 20 =
chars as
buffer name? </span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dnavy face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:navy'>Recently, I =
experienced
some IO buffers which have more than 20 chars in their names. So, I have =
to truncate
the IBIS model name to support this rule. If choice is given I do not =
want to
truncate the IBIS model name. </span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dnavy face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:navy'>Thanks in =
advance,</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dnavy face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:navy'>Best =
Regards,</span></font></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D2 =
color=3Dnavy face=3DArial><span
style=3D'font-size:10.0pt;font-family:Arial;color:navy'>Venu</span></font=
></p>

<p class=3DMsoNormal style=3D'margin-left:.5in'><font size=3D3 =
face=3D"Times New Roman"><span
style=3D'font-size:12.0pt'>&nbsp;</span></font></p>

</div>

</body>

</html>

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------------------------------

Date: Wed, 4 Jan 2006 08:41:14 -0800
From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
Subject: RE: [IBIS-Users] RE: [IBIS] Why IO buffer name is limited to a max of 20 characters

Venu,

Reading the top section of the BIRD you will find:

"DATE ACCEPTED BY IBIS OPEN FORUM: December 10, 2004"

which means that the BIRD has been voted on already.
The question really is, which official IBIS spec will
include these changes, to which I believe the answer
is v4.2, the next one.  But don't take this as a
promise, I don't want to be held responsible for
saying this...

Arpad
=====================================================

________________________________

From: Ummalaneni, Venu Babu (Venu) [mailto:venubabu@agere.com] 
Sent: Wednesday, January 04, 2006 2:43 AM
To: Muranyi, Arpad; ibis-users@eda.org; ibis@eda.org
Cc: Patel, Nirav (Nirav); Kotikalapudi, Shiva Kumar (Shiva)
Subject: RE: [IBIS-Users] RE: [IBIS] Why IO buffer name is limited to a max of 20 characters



Arpad,

 

Thanks for your message and the pointer. Could you please tell me when/how this BIRD93.1 will come for voting?

 

Best Regards,

Venu

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|with just the appropriate command message(s) in the body:
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------------------------------

Date: Wed, 4 Jan 2006 11:49:25 -0500
From: "Andrew Ingraham" <a.ingraham@ieee.org>
Subject: [IBIS-Users] Re: hspice vs IBIS model correlation at different capacitive loads

Vinayak wrote:

> We have this case where in the *buffer has feedback* and with R-load we see
> V-T table with lot of ringing(oscillations) when pad has reached steady
> state.
> As this is no real situation for us as TL delay that buffer would see in
> real world is too small
> comparable to buffer tr/tf.

I think you are saying that you get these oscillations in your simulations
with the SPICE model that you used to create your IBIS model; and that you
see them only in simulations, not real devices.

If that is correct, then I'd investigate why the oscillations happen, and
fix it.  It isn't just because your buffer has feedback, because real
devices also have feedback and they don't oscillate.

SPICE is known to occasionally have numeric oscillations when it should be
steady-state, which can be fixed by changing to Method=Gear.

Oscillations can also happen because things are missing in the SPICE
simulation, device models are too ideal and lack resistance, etc.

If, on the other hand, your buffer really does oscillate when loaded this
way, then you've got a different problem.  One fix (not necessarily good)
would be to truncate the V/T data just before the oscillations start,
and/or smooth out the tail so it approaches the correct final value.

Regards,
Andy


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|with just the appropriate command message(s) in the body:
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|
|or email a written request to ibis-request@eda.org.
|
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|
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|  http://www.eda.org/pub/ibis/users_archive/  Recent
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------------------------------

Date: Wed, 4 Jan 2006 08:52:58 -0800
From: "Fred  Balistreri" <fred@apsimtech.com>
Subject: [IBIS-Users] IBIS Summit 2nd announcement

This is a multi-part message in MIME format.

- ------=_NextPart_000_0096_01C6110C.42A076D0
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	charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable

This is the second Announcement for the DesignCon 2006 IBIS Summit
Meeting held in Santa Clara, California.

Note, because of the interest in Monday tutorial sessions, we have
moved the IBIS Meeting to Thursday on the last 1/2 day of DesignCon.

We are seeking Sponsors for the IBIS meeting to cover the expenses
for a Free lunch and refreshments.

Also note that discounts are offered for all conference packages
through January 13, 2006, and also February 6, 2006 for free
exhibit registration.

Best Regards,
Fred

- -----------------------------------------------------------------------
                              IBIS SUMMIT
                             SECOND CALL FOR
                     PARTICIPATION & PRESENTATIONS
- -----------------------------------------------------------------------


              I B I S   S U M M I T   M E E T I N G

Time/Date:  Thursday, February 9, 2006 8:00 AM to 5:00 PM
            (MOVED FROM MONDAY)

Location:   Santa Clara Convention Center
            Santa Clara, CA

Content:    Presentations and Discussions

Purpose:    Solicit and Exchange IBIS Model Related Information and
            Ideas.

Sponsors:   Applied Simulation Technology, Cisco Systems, International
            Engineering Cornsortium (DesignCon)

            We are seeking more co-sponsors.  Please contact Bob Ross
            <bob@teraspeed.com>.  The Benefits to sponsors include
            recognition at the meeting and acknowledgement in the Calls
            for Papers and meeting minutes.

            Your financial support strengthens the organization by
            allowing IBIS to focus resources on industry activities
            rather than raising money, and you will receive generous
            thanks for your support.

DesignCon 2006 Conference:

            February 6 - February 9, 2006
            Santa Clara Convention Center
            Santa Clara, CA

            Exhibit registration is Free if you register before
            February 6, 2006, and conference discounts before.
           =20
              http://www.designcon.com/2006/
              http://www.designcon.com/2006/registration/
    =20
     Conference Catalog:

       http://www.designcon.com/2006/pdf/dc06_catalog.pdf

IBIS Booth: Come visit the IBIS Booth to meet attendees and pick up
            IBIS information.


BACKGROUND

DesignCon is the premier annual Silicon Valley event for the electronic
design automation (EDA) and semiconductor industry.  Topics of current
interest to the EIA IBIS Open Forum are addressed at DesignCon.

This meeting will be conducted as a formal IBIS Summit Meeting.
Presentations are expected to be available and archived in an electronic
format, and minutes of the meeting will be issued. Any pending formal
decisions (votes) will be announced at least two weeks prior to the
meeting.


CALL FOR PARTICIPANTS

People involved in IBIS Model development, EDA tool development, and
digital circuit design are invited to participate in the Summit meeting.
If you plan to participate, please register with the information below:

       Name:
       E-mail address:
       Company:
       Telephone:

Send to:
=20
       Fred Balistreri  <fred@apsimtech.com>

Registration deadline is Wednesday, February 1, 2003 to receive the
free lunch.
=20

CALL FOR PRESENTATIONS

We are seeking presentations from individuals who have experiences
of interest to the IBIS modeling community.  In the past, these have
included, but not limited to:

       Demonstrations of modeling techniques=20
       Explanations of behavioral algorithms
       Descriptions of difficulties encountered
       Model correlation
       Modeling building experiences
       Comparisons to other modeling methods
       New techologies for modeling buffers and component
       New technologies for modeling packaging and interconnect
       etc.

Presentations may be addressed to any and all levels of IBIS experience,
from beginning to advanced.

Presentation Format:
 =20
      A conference laptop with LCD projection.  Power Point or Acrobat
      electronic formats are favored and will pre-loaded on the
      Windows-basede meeting laptop prior to the meeting.

Time: Usually 15-30 Minutes

Electronic Archival:

      Presentations will be archived under the IBIS Summits site
      and also must be submitted in time for uploading and copying.
      Final submission deadline is:
 =20
         Wednesday, February 1, 2006

      Otherwise, you should bring 50 copies.

If you plan a presentation, please supply the following information
as soon as possible:

      Tentative Title:
      Presenter:
      E-mail address:
      Company:
      Telephone:

      Estimated Time:
 =20
Send to:

      Bob Ross <bob@teraspeed.com>


AGENDA

The agenda includes presentations, discussions, breaks, and a FREE
lunch.  The agenda details will be developed as proposals are
received.  So far, several technical and overview presentations are
planned including these subjects:

  Michael Mirmak, Intel Corp, IBIS Chair's Report and Roadmap
  Todd Westerhoff, Cisco Systems, Macromodel Committee Update
  Arpad Muranyi, Intel Corp., Technical Review of the Macromodel Library
  Bob Ross, Teraspeed Consulting Group, Asian IBIS Summit Feedback


LIST OF NEARBY HOTELS

The hotel and travel Link provides a conference hotel discount, and
use internet search engines other good lodging deals:

     http://www.designcon.com/2006/conference/hotel_and_travel.html

- -----------------------------------------------------------------



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Content-Type: text/html;
	charset="iso-8859-1"
Content-Transfer-Encoding: quoted-printable

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-1">
<META content=3D"MSHTML 6.00.2800.1528" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>This is the second Announcement for the =
DesignCon=20
2006 IBIS Summit<BR>Meeting held in Santa Clara, =
California.</FONT></DIV>
<DIV>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>Note, because of the interest in Monday =
tutorial=20
sessions, we have<BR>moved the IBIS Meeting to Thursday on the last 1/2 =
day of=20
DesignCon.</FONT></DIV>
<DIV>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>We are seeking Sponsors for the IBIS =
meeting to=20
cover the expenses<BR>for a Free lunch and refreshments.</FONT></DIV>
<DIV>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>Also note that discounts are offered =
for all=20
conference packages<BR>through January 13, 2006, and also February 6, =
2006 for=20
free<BR>exhibit registration.</FONT></DIV>
<DIV>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>Best Regards,<BR>Fred</FONT></DIV>
<DIV>&nbsp;</DIV>
<DIV><FONT face=3DArial=20
size=3D2>----------------------------------------------------------------=
- -------<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
IBIS=20
SUMMIT<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
SECOND CALL=20
FOR<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
PARTICIPATION &amp;=20
PRESENTATIONS<BR>--------------------------------------------------------=
- ---------------</FONT></DIV>
<DIV>&nbsp;</DIV><FONT face=3DArial size=3D2>
<DIV><BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp;=20
I B I S&nbsp;&nbsp; S U M M I T&nbsp;&nbsp; M E E T I N G</DIV>
<DIV>&nbsp;</DIV>
<DIV>Time/Date:&nbsp; Thursday, February 9, 2006 8:00 AM to 5:00=20
PM<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
(MOVED=20
FROM MONDAY)</DIV>
<DIV>&nbsp;</DIV>
<DIV>Location:&nbsp;&nbsp; Santa Clara Convention=20
Center<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;=20
Santa Clara, CA</DIV>
<DIV>&nbsp;</DIV>
<DIV>Content:&nbsp;&nbsp;&nbsp; Presentations and Discussions</DIV>
<DIV>&nbsp;</DIV>
<DIV>Purpose:&nbsp;&nbsp;&nbsp; Solicit and Exchange IBIS Model Related=20
Information=20
and<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
=20
Ideas.</DIV>
<DIV>&nbsp;</DIV>
<DIV>Sponsors:&nbsp;&nbsp; Applied Simulation Technology, Cisco Systems, =

International<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;&nbsp;=20
Engineering Cornsortium (DesignCon)</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
We are=20
seeking more co-sponsors.&nbsp; Please contact Bob=20
Ross<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;=20
&lt;<A =
href=3D"mailto:bob@teraspeed.com">bob@teraspeed.com</A>&gt;.&nbsp; The=20
Benefits to sponsors=20
include<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;=20
recognition at the meeting and acknowledgement in the=20
Calls<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p; for=20
Papers and meeting minutes.</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
Your=20
financial support strengthens the organization=20
by<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =

allowing IBIS to focus resources on industry=20
activities<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;=20
rather than raising money, and you will receive=20
generous<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;=20
thanks for your support.</DIV>
<DIV>&nbsp;</DIV>
<DIV>DesignCon 2006 Conference:</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
February=20
6 - February 9,=20
2006<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
; Santa=20
Clara Convention=20
Center<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;=20
Santa Clara, CA</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
Exhibit=20
registration is Free if you register=20
before<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;=20
February 6, 2006, and conference discounts=20
before.<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;=20
<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;=20
<A=20
href=3D"http://www.designcon.com/2006/">http://www.designcon.com/2006/</A=
><BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;&nbsp;=20
<A=20
href=3D"http://www.designcon.com/2006/registration/">http://www.designcon=
.com/2006/registration/</A><BR>&nbsp;&nbsp;&nbsp;&nbsp;=20
<BR>&nbsp;&nbsp;&nbsp;&nbsp; Conference Catalog:</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <A=20
href=3D"http://www.designcon.com/2006/pdf/dc06_catalog.pdf">http://www.de=
signcon.com/2006/pdf/dc06_catalog.pdf</A></DIV>
<DIV>&nbsp;</DIV>
<DIV>IBIS Booth: Come visit the IBIS Booth to meet attendees and pick=20
up<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
IBIS=20
information.</DIV>
<DIV>&nbsp;</DIV>
<DIV><BR>BACKGROUND</DIV>
<DIV>&nbsp;</DIV>
<DIV>DesignCon is the premier annual Silicon Valley event for the=20
electronic<BR>design automation (EDA) and semiconductor industry.&nbsp; =
Topics=20
of current<BR>interest to the EIA IBIS Open Forum are addressed at=20
DesignCon.</DIV>
<DIV>&nbsp;</DIV>
<DIV>This meeting will be conducted as a formal IBIS Summit=20
Meeting.<BR>Presentations are expected to be available and archived in =
an=20
electronic<BR>format, and minutes of the meeting will be issued. Any =
pending=20
formal<BR>decisions (votes) will be announced at least two weeks prior =
to=20
the<BR>meeting.</DIV>
<DIV>&nbsp;</DIV>
<DIV><BR>CALL FOR PARTICIPANTS</DIV>
<DIV>&nbsp;</DIV>
<DIV>People involved in IBIS Model development, EDA tool development,=20
and<BR>digital circuit design are invited to participate in the Summit=20
meeting.<BR>If you plan to participate, please register with the =
information=20
below:</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Name:<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; E-mail=20
address:<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Company:<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Telephone:</DIV>
<DIV>&nbsp;</DIV>
<DIV>Send to:<BR>&nbsp;<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Fred=20
Balistreri&nbsp; &lt;<A=20
href=3D"mailto:fred@apsimtech.com">fred@apsimtech.com</A>&gt;</DIV>
<DIV>&nbsp;</DIV>
<DIV>Registration deadline is Wednesday, February 1, 2003 to receive =
the<BR>free=20
lunch.<BR>&nbsp;</DIV>
<DIV>&nbsp;</DIV>
<DIV>CALL FOR PRESENTATIONS</DIV>
<DIV>&nbsp;</DIV>
<DIV>We are seeking presentations from individuals who have =
experiences<BR>of=20
interest to the IBIS modeling community.&nbsp; In the past, these=20
have<BR>included, but not limited to:</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Demonstrations of modeling =
techniques=20
<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Explanations of behavioral=20
algorithms<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Descriptions of =
difficulties=20
encountered<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Model=20
correlation<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Modeling building=20
experiences<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Comparisons to other =

modeling methods<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; New techologies =
for=20
modeling buffers and component<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
New=20
technologies for modeling packaging and=20
interconnect<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; etc.</DIV>
<DIV>&nbsp;</DIV>
<DIV>Presentations may be addressed to any and all levels of IBIS=20
experience,<BR>from beginning to advanced.</DIV>
<DIV>&nbsp;</DIV>
<DIV>Presentation Format:<BR>&nbsp; <BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; A =

conference laptop with LCD projection.&nbsp; Power Point or=20
Acrobat<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; electronic formats are favored =
and=20
will pre-loaded on the<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Windows-basede =
meeting=20
laptop prior to the meeting.</DIV>
<DIV>&nbsp;</DIV>
<DIV>Time: Usually 15-30 Minutes</DIV>
<DIV>&nbsp;</DIV>
<DIV>Electronic Archival:</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Presentations will be archived under =
the=20
IBIS Summits site<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; and also must be =
submitted=20
in time for uploading and copying.<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
Final=20
submission deadline is:<BR>&nbsp;=20
<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Wednesday, February =
1,=20
2006</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Otherwise, you should bring 50 =
copies.</DIV>
<DIV>&nbsp;</DIV>
<DIV>If you plan a presentation, please supply the following =
information<BR>as=20
soon as possible:</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Tentative=20
Title:<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Presenter:<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; E-mail=20
address:<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=20
Company:<BR>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Telephone:</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Estimated Time:<BR>&nbsp; <BR>Send =
to:</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Bob Ross &lt;<A=20
href=3D"mailto:bob@teraspeed.com">bob@teraspeed.com</A>&gt;</DIV>
<DIV>&nbsp;</DIV>
<DIV><BR>AGENDA</DIV>
<DIV>&nbsp;</DIV>
<DIV>The agenda includes presentations, discussions, breaks, and a=20
FREE<BR>lunch.&nbsp; The agenda details will be developed as proposals=20
are<BR>received.&nbsp; So far, several technical and overview =
presentations=20
are<BR>planned including these subjects:</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp; Michael Mirmak, Intel Corp, IBIS Chair's Report and=20
Roadmap<BR>&nbsp; Todd Westerhoff, Cisco Systems, Macromodel Committee=20
Update<BR>&nbsp; Arpad Muranyi, Intel Corp., Technical Review of the =
Macromodel=20
Library<BR>&nbsp; Bob Ross, Teraspeed Consulting Group, Asian IBIS =
Summit=20
Feedback</DIV>
<DIV>&nbsp;</DIV>
<DIV><BR>LIST OF NEARBY HOTELS</DIV>
<DIV>&nbsp;</DIV>
<DIV>The hotel and travel Link provides a conference hotel discount, =
and<BR>use=20
internet search engines other good lodging deals:</DIV>
<DIV>&nbsp;</DIV>
<DIV>&nbsp;&nbsp;&nbsp;&nbsp; <A=20
href=3D"http://www.designcon.com/2006/conference/hotel_and_travel.html">h=
ttp://www.designcon.com/2006/conference/hotel_and_travel.html</A></DIV>
<DIV>&nbsp;</DIV>
<DIV>-----------------------------------------------------------------</D=
IV>
<DIV>&nbsp;</DIV>
<DIV><BR></FONT>&nbsp;</DIV></BODY></HTML>

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