From: owner-ibis-users@eda.org (ibis-users) To: ibis-users-digest@eda.org Subject: ibis-users V1 #107 Reply-To: Sender: owner-ibis-users@eda.org Errors-To: owner-ibis-users@eda.org Precedence: bulk ibis-users Sunday, November 18 2007 Volume 01 : Number 107 ---------------------------------------------------------------------- Date: Tue, 23 Oct 2007 12:24:48 -0700 From: "Tom Dagostino" Subject: RE: [IBIS-Users] RE: [IBIS] I-V and V-t curve mismatch This is a multipart message in MIME format. - ------=_NextPart_000_00DF_01C8156F.B4E1CFF0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit All NC is not always the best choice for analog pins. We often use a terminator model for analog pins. It allows simulators to at least check for crosstalk into analog nets. And some simulators will complain if a net is connected in a system but has no model associated with it. The terminator model can be just the key word, the voltage range and no other elements. Having a terminator model present for true NC pins also allows the stub effect of a pin to be simulated if a net goes through a NC and connects to it. For example some static protections device like the ones from CMD recommend routing through the footprint and picking up NC pins in the path between the active pin and the input to the next IC in the net. If a NC model is used then some simulators will either not allow that connection or not simulate the stub effect of the package. Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org] On Behalf Of Muranyi, Arpad Sent: Tuesday, October 23, 2007 10:13 AM To: ibis@server.eda.org; ibis-users@server.eda.org Subject: RE: [IBIS-Users] RE: [IBIS] I-V and V-t curve mismatch If you use legacy IBIS, then yes, you will have to put NC for any analog buffers. But if you are using IBIS with *-AMS, you can also make analog models and list them on the [Pin] list. Arpad ===================================================== _____ From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Sudarshan H N Sent: Tuesday, October 23, 2007 10:06 AM To: Todd Westerhoff Cc: ibis@server.eda.org; ibis-users@server.eda.org Subject: Re: [IBIS-Users] RE: [IBIS] I-V and V-t curve mismatch Hi All, Thanks Tom ,Todd Scott and Arpad for your valuable answers. Arpad, with your clear explanation i am able to solve all the problems i had in my modeling. One general question i have to the forum is , in the IBIS website is all the mails are stored in some central location. Because i was accessing IBIS forum mails from my other email id 3 months back. Now i am accessing from other email id. I think sometime back there was a question on analog pads IBIS model. Do i need to put a NC for these pads in pin mapping section ? Regards Sudarshan On 10/23/07, Todd Westerhoff wrote: Oops, You're right: -VDDQ to 2*VDDQ. Todd. Todd Westerhoff VP, Software Products SiSoft 6 Clock Tower Place, Suite 250 Maynard, MA 01754 (978) 461-0449 x24 twesterh@sisoft.com www.sisoft.com _____ From: owner-ibis@eda.org [mailto: owner-ibis@eda.org ] On Behalf Of Muranyi, Arpad Sent: Monday, October 22, 2007 2:01 PM To: ibis@eda.org; ibis-users@eda.org Subject: RE: [IBIS-Users] RE: [IBIS] I-V and V-t curve mismatch While both Tom and Todd are suggesting the right thing, I think both need some correction, or clarification... Todd wrote "-2*VDD to 2*VDD" in which the first -2*VDD should have read -VDD. Tom's comment about using typical VDD is correct for the range calculation but you need to be careful an not apply that suggestion to the VDD of the power you apply to the device under test and the VDD-relative calculations (in case you don't measure it VDD relative directly). So to sum it up, my numbers in my first reply were calculated as follows: For the pulldown the sweep range is always: - -VDD_typ to 2*VDD_typ = -3.3 to 6.6, regardless of which case you are generating, i.e. whether the supply voltage to the chip is typ=3.3, min=3.0, or max=3.6 volts (assuming that the chip's pulldown is connected to GND or 0 volts). For the pullup, which is swept VDD relative, the numbers for the sweep ranges in GND relative orientation will work out this way: - -VDD_typ to 2*VDD_typ with respect to VDD_typ = 6.6 to -3.3 - -VDD_typ to 2*VDD_typ with respect to VDD_min = 6.3 to -3.6 - -VDD_typ to 2*VDD_typ with respect to VDD_max = 6.9 to -3.0 Note that this numbers are only this confusing because you are looking at the sweep ranges in a GND relative way, while you are really doing the same rule as above for the pulldown with respect to VDD. Of course the direction of the sweep is irrelevant, as long as the device doesn't act up. Some times devices can do funny things depending on which direction you do the sweep. Also, to help the simulator to find an operating point I suggest that you start the seep at the same rail voltage the device is driving to (i.e. VDD for logic high or GND for logic low) and then do the sweep you need for the IBIS model. There is a better chance to get the simulator converge that way... I hope this helps, Arpad =========================================================== _____ From: owner-ibis-users@server.eda.org [mailto: owner-ibis-users@server.eda.org] On Behalf Of Todd Westerhoff Sent: Monday, October 22, 2007 10:09 AM To: ibis@server.eda.org; ibis-users@server.eda.org Cc: tom@teraspeed.com Subject: [IBIS-Users] RE: [IBIS] I-V and V-t curve mismatch I agree with Tom. The choice of -2*VDD to 2*VDD is somewhat arbitrary . it's simply meant to ensure that you have valid V/I data for any voltage that the part will be exposed to. Thus, you don't need to adjust the voltage ranges based on the MIN and MAX cases. For most technologies, if you have overshoot that's equal to the supply voltage, you have bigger problems than model accuracy ! Todd. Todd Westerhoff VP, Software Products SiSoft 6 Clock Tower Place, Suite 250 Maynard, MA 01754 (978) 461-0449 x24 twesterh@sisoft.com www.sisoft.com _____ From: owner-ibis@eda.org [mailto: owner-ibis@eda.org ] On Behalf Of Tom Dagostino Sent: Monday, October 22, 2007 12:11 PM To: 'Sudarshan H N'; 'Mirmak, Michael' Cc: ibis@eda.org; ibis-users@eda.org Subject: RE: [IBIS] I-V and V-t curve mismatch Model all three corners from -Vdd to 2*Vdd where Vdd is the typical voltage. Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 From: owner-ibis@server.eda.org [mailto: owner-ibis@server.eda.org] On Behalf Of Sudarshan H N Sent: Monday, October 22, 2007 7:43 AM To: Mirmak, Michael Cc: ibis@server.eda.org; ibis-users@server.eda.org Subject: Re: [IBIS] I-V and V-t curve mismatch Hi Michael & All, Can you people answer to my question regarding the voltage ranges in MIN and MAX case as explained below. As Arpad mentioned in one of the earlier mails the range for MIN and MAX case is typ: -3.3 to 6.6 min: -3.6 to 6.3 max: -3.0 to 6.9 How do we select this range for MIN and MAX case. Is there any document which explains the selection criteria for these corners ? If there is no logic , then how can we decide if the supply is 1.8 V supply or 2.5V supply? Let me know your answers. Regards Sudarshan On 10/19/07, Sudarshan H N < hn.sudarshan@gmail.com> wrote: Hi Michael, Thanks for your detailed reponse. I made a small mistake in putting the voltage ranges as you mentioned. As i was writing a new tool , at this point of time i didnt give much attention to printing correct voltage range , and i was only worried about the correct extraction of V-t and I-V tables. I have considered the formula you have mentioned for calculating Vcc-relative Pullup and Powerclamp tables. I changed the voltage range to (3.3, 3.0 and 3.6 which is the actual case) and now i am able to get rid of all these errors. But still i have one query regarding the values for I-V curves when it is in the Min or MAX corner. I asked about this in my previous mail. Lynne and Arpad gave some answers but that didnt solve my problem. The problem with MIN and MAX corner is , what is the voltage range we need to consider for MIN and MAX case . For example if we consider 3.3 V supply, the typical range would be -3.3 to 6.6 and this is the voltage range in the IBIS file for all 3 corners. As per the cookbook we need to consider voltage range -Vcc to +2Vcc and hence for the MIN case the range will be -3.0 to +6.0. So in that case what current values we need to put for the voltage range -3.3 to -3.0 and +6.0 to +6.6 whose values will be missing in MIN corner simulations. I hope i have explained the problem correctly and let me know your answers. Thanks & Regards Sudarshan On 10/18/07, Mirmak, Michael > wrote: Sudarshan, Thanks for the message. The major issue appears to be problems in generating the Vcc-relative information, but some general supply issues are cropping up too. Assuming this is just a regular I/O buffer without internal terminations... 1) I would expect the Pullup I-V tables to pass through the zero V, zero I axis intercept. Yet they do not, with the max and min data shifted by ~0.3 V above and below 0 V, respectively. This suggests that the math used to generate the tables may be incorrect. Remember that, if the data at Vout is collected ground-relative, you can make the power clamp and pullup table data in Vcc-relative by the formula (Vtable_corner = Vcc_corner - Vout_corner), where xxx_corner refers to a value collected for typ, min or max. For example, if Vcc_min is 4.5 V, data collected ground-relative for 0.0 at the output would be entered in the table for the 4.5 V row. The supply voltages and the Pullup I-V axis intercepts (when plotted ground-relative) don't agree, which implies a problem with the supply listed for the [Voltage Range] keyword not matching either the real circuit or the values used to generate the Vcc-relative tables. 2) The voltage for the buffer is 5 V +/- 0.5, but the V-t fixture is 3.3 V +/- 0.3 V. This complicates the math (it gets very hard for me to calculate the intercepts if they don't match, at least before my first cup of coffee), but it also suggests that the buffer V-t and I-V data sets were collected using different settings or otherwise using different conditions. I would recommend checking the actual fixtures used for the V-t extraction; matching the fixture voltages to the voltage supply would make checking easier. Calculating the right I-V intercepts vs. V-t levels will be easier once these issues are addressed. - - Michael Mirmak Intel Corp. Chair, EIA IBIS Open Forum _____ From: owner-ibis@server.eda.org [mailto:owner-ibis@server.eda.org] On Behalf Of Sudarshan H N Sent: Thursday, October 18, 2007 2:16 AM To: ibis@server.eda.org; ibis-users@server.eda.org Subject: [IBIS] I-V and V-t curve mismatch Hello Experts, I am finding problem with one of my IBIS model in I-V and V-t curve mismatch. Please find the attached model for the refernence. ERROR - Model dummy: The [Rising Waveform] with [R_fixture]=80 Ohms and [V_fixture]=0V has TYP column DC endpoints of 0.01V and 2.66v, but an equivalent load applied to the model's I-V tables yields different voltages (-0.00V and 3.90V), a difference of 0.25% and 31.85%, respectively. I wrote a new tool to generate IBIS models and i am not able to make out where it is going wrong. I actually tried to manually calculate the currents at the points , that it has reported in the above error. As it is a rising waveform having a R_fixture to ground the current at 2.66v (steady state) would be 2.66v/50 = 33.25mA. I looked at the voltage corresponding to 33.25mA in pullup table and i found it is coming around 0.66v. There is a mismatch in the way i am caluculating also. But i observed a different voltage of 0.66v compared to what ibischk4 has reported i.e, 3.9v. Let me know is the way i am cross checking is correct or not ? If not let me know the exact procedure. Also let me know what might have been gone wrong in the curves. From the shape of the curves i am not seeing any problem with the way i have generated. Please let me know your answers as soon as possible. Note : Please dont consider any other values apart from the curves like Ramp , C_comp etc as i have dummy values for these place holders. Thanks & Regards Sudarshan - -- This message has been scanned for viruses and dangerous content by MailScanner , and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner , and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner , and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner , and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner , and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner , and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_00DF_01C8156F.B4E1CFF0 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

All

 

NC is not always the best choice for analog pins.  We o= ften use a terminator model for analog pins.  It allows simulators to at le= ast check for crosstalk into analog nets.  And some simulators will compla= in if a net is connected in a system but has no model associated with it.  The terminator model can be just the key word, the voltage range and no oth= er elements.  Having a terminator model present for true NC pins also all= ows the stub effect of a pin to be simulated if a net goes through a NC and connect= s to it.  For example some static protections device like the ones from CMD recommend routing through the footprint and picking up NC pins in the path between the active pin and the input to the next IC in the net.  If a = NC model is used then some simulators will either not allow that connection or= not simulate the stub effect of the package.

 

Tom Dag= ostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827 =

From: owner-ibis@se= rver.eda.org [mailto:owner-ibis@server.eda.org] On Behalf Of Muranyi, Arpad
Sent: Tuesday, October 23, 2007 10:13 AM
To: ibis@server.eda.org; ibis-users@server.eda.org
Subject: RE: [IBIS-Users] RE: [IBIS] I-V and V-t curve mismatch=

 

If you use legacy IBIS, then yes, you will have to

put NC for any analog buffers.  But if you are using

IBIS with *-AMS, you can also make analog models and

list them on the [Pin] list.

 

Arpad

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D

 

From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Sudarshan H N<= br> Sent: Tuesday, October 23, 2007 10:06 AM
To: Todd Westerhoff
Cc: ibis@server.eda.org; ibis-users@server.eda.org
Subject: Re: [IBIS-Users] RE: [IBIS] I-V and V-t curve mismatch

Hi All,

Thanks Tom ,Todd Scott and Arpad for your valuable answers. Arpad, with your clear explanation i am able to solve all the problems i had in my modeling.=

One general question i have to the forum is , in the IBIS website is all the mails are stored in some central location. Because i was accessing IBIS for= um mails from my other email id 3 months back. Now i am accessing from other e= mail id.

I think sometime back there was a question on analog pads IBIS model. Do i = need to put a NC for these pads in pin mapping section ?

Regards
Sudarshan

On 10/23/07, Todd Westerho= ff <twesterh@sisoft.com> wrot= e:

Oops,

 

You're right: -VDDQ to 2*VDDQ.

 

Todd.

 


Todd Westerhoff
VP, Software Products
SiSoft
6 Clock Tower Place, Suite 250
Maynard, MA 01754
(978) 461-0449 x24
twesterh@sisoft.co= m
www.sisoft.com

 

While both To= m and Todd are suggesting the right thing,

I think both = need some correction, or clarification...

 

Todd wrote "-2*VDD to 2*VDD" in which the first -2*VDD

should have r= ead - -VDD.

 

Tom's comment= about using typical VDD is correct for the

range calcula= tion but you need to be careful an not

apply that suggestion to the VDD of the power you

apply to the = device under test and the VDD-relative

calculations = (in case you don't measure it VDD relative

directly).

 

So to sum it = up, my numbers in my first reply were

calculated as follows:

 

For the pulld= own the sweep range is always:

-VDD_typ to 2*VDD_typ  =3D  -3.3 to 6.6,

regardless of= which case you are generating,

i.e. whether = the supply voltage to the chip

is typ=3D3.3, min=3D3.0, or max=3D3.6 volts (assuming

that the chip= 's pulldown is connected to GND

or 0 volts).<= /span>

 

For the pullu= p, which is swept VDD relative,

the numbers f= or the sweep ranges in GND relative

orientation w= ill work out this way:

 

-VDD_typ to 2*VDD_typ with respect to VDD_typ =3D 6.6 to -3.3

-VDD_typ to 2*VDD_typ with respect to VDD_min =3D 6.3 to -3.6

-VDD_typ to 2*VDD_typ with respect to VDD_max =3D 6.9 to -3.0

 

Note that this numbers are only this confusing because

you are looki= ng at the sweep ranges in a GND relative

way, while yo= u are really doing the same rule as above

for the pulld= own with respect to VDD.

 

Of course the direction of the sweep is irrelevant, as

long as the d= evice doesn't act up.  Some times devices

can do funny = things depending on which direction you

do the sweep.=   Also, to help the simulator to find an

operating poi= nt I suggest that you start the seep at

the same rail voltage the device is driving to (i.e.

VDD for logic= high or GND for logic low) and then do

the sweep you= need for the IBIS model.  There is a

better chance= to get the simulator converge that way...

 

I hope this h= elps,

 

Arpad<= o:p>

=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D

From: owner-ibi= s-users@server.eda.org [mailto: owner-ibis-users@server.eda.org] On Behalf Of Todd Westerhoff
Sent: Monday, October 22, 2007 10:09 AM
To: ibis@se= rver.eda.org; ibis-users@s= erver.eda.org
Cc: tom@teras= peed.com
Subject: [IBIS-Users] RE: [IBIS] I-V and V-t curve mismatch

I agree with Tom.

 

The choice of -2*VDD to 2*VDD is somewhat arbitrary … it's simply meant to ensure that you have valid V/I data for any voltage that the part will be exposed to.  Thus, you don't need to adjust the voltage ranges based on the MIN and MAX cases.  For most technologies, if you have overshoot that's equal to the supply voltage, you have bigger problems than model accuracy !

 

Todd.

 


Todd Westerhoff
VP, Software Products
SiSoft
6 Clock Tower Place, Suite 250
Maynard, MA 01754
(978) 461-0449 x24
twesterh@sisoft.co= m
www.sisoft.com

Fr= om: owner-ibis@eda.org [mailto: owner-ibis= @eda.org] On Behalf Of Tom Dagostino
Sent: Monday, October 22, 2007 12:11 PM
To: 'Sudarshan H N'; 'Mirmak, Michael'
Cc: ibis@eda.org; ibis-users@eda.org=
Subject: RE: [IBIS] I-V and V-t curve mismatch

 

Model all three corners from –Vdd to 2*Vdd where Vdd is the typical voltage= .

 

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

Fr= om: owner-ibis@serv= er.eda.org [mailto: owner-ibis@server.eda.org] On Behalf Of Sudarshan H N
Sent: Monday, October 22, 2007 7:43 AM
To: Mirmak, Michael
Cc: ibis@se= rver.eda.org; ibis-users@s= erver.eda.org
Subject: Re: [IBIS] I-V and V-t curve mismatch

 

Hi Michael & All,

Can you people answer to my question regarding the voltage ranges in MIN and MAX case as explained below. As Arpad mentioned in one of the earlier mails= the range for MIN and MAX case is

typ:  -3= .3 to 6.6

min:  -3= .6 to 6.3

max:  - -3.0 to 6.9

How do we select this range for MIN and MAX case. Is there any docum= ent which explains the selection criteria for these corners ? If there is no lo= gic , then how can we decide if the supply is 1.8 V supply or 2.5V supply?

Let me know your answers.

Regards
Sudarshan

 

On 10/19/07, Sudarshan H N < hn.sudarshan@gmail= .com> wrote:

Hi Michael,

Thanks for your detailed reponse. I made a small mistake in putting the vol= tage ranges as you mentioned. As i was writing a new tool , at this point of tim= e i didnt give much  attention to printing correct voltage range , and i w= as only worried about the correct extraction of V-t and I-V tables.

I have considered the formula you have mentioned for calculating Vcc-relati= ve Pullup and Powerclamp tables. I changed the voltage range to (3.3, 3.0 and = 3.6 which is the actual case) and now i am able to get rid of all these errors.=

But still i have one query regarding the values for I-V curves when it is in the Min or MAX corner. I asked about this in my previous mail. Lynne and Ar= pad gave some answers  but that didnt solve my problem.

The problem with MIN and MAX corner is , what is the voltage range we need = to consider for MIN and MAX case . For example if we consider 3.3 V supply, the typical range would be -3.3 to 6.6 and this is the voltage range in the IBIS file for all 3 corners. As per the cookbook we need to consider voltage ran= ge - -Vcc to +2Vcc and hence for the MIN case the range will be -3.0 to +6.0. So= in that case what current values we need to put for the voltage range -3.3 to = - -3.0 and +6.0 to +6.6 whose values will be missing in MIN corner simulations.

I hope i have explained the problem correctly and let me know your answers.=

Thanks & Regards
Sudarshan

 

On 10/18/07, Mirmak, Michael <michael.mirmak@i= ntel.com > wrote:

Sudarshan,

 

Thanks for the message.  The major issue appears to be problems in generating= the Vcc-relative information, but some general supply issues are cropping up too.  Assuming this is just a regular I/O buffer without internal terminations...

 

1) I would expect the Pullup I-V tables to pass through the zero V, zero I axis intercept.  Yet they do not, with the max and min data shifted by ~0.3= V above and below 0 V, respectively.  This suggests that the math used to generate the tables may be incorrect.  Remember that, if the data= at Vout is collected ground-relative, you can make the power clamp and pullup table data in Vcc-relative by the formula (Vtable_corner =3D Vcc_corner - V= out_corner), where xxx_corner refers to a value collected for typ, min or max.  For example, if Vcc_min is 4.5 V, data collected ground-relative for 0.0 at the output would be entered in the table for the 4.5 V row.

 

The supply voltages and the Pullup I-V axis intercepts (when plotted ground-relative) don't agree, which implies a problem with the supply listed for the [Voltage Range] keyword not matching either the real circuit or the values used to generate the Vcc-relative tables.=

 

2) The voltage for the buffer is 5 V +/- 0.5, but the V-t fixture is 3.3 V +/-= 0.3 V.  This complicates the math (it gets very hard for me to calculate t= he intercepts if they don't match, at least before my first cup of coffee), bu= t it also suggests that the buffer V-t and I-V data sets were collected using different settings or otherwise using different conditions.  I would recommend checking the actual fixtures used for the V-t extraction; matching the fixture voltages to the voltage supply would make checking easier.

 

Calculating the right I-V intercepts vs. V-t levels will be easier once these issues are addressed.

 

- Michael Mirmak

  Intel Corp.

  Chair, EIA IBIS Open Forum

 

From: owner-ibis@server.eda.org [mailto:owner-ibis@serv= er.eda.org] On Behalf Of Sudarshan H N
Sent: Thursday, October 18, 2007 2:16 AM
To: ibis@se= rver.eda.org; ibis-users@s= erver.eda.org
Subject: [IBIS] I-V and V-t curve mismatch

Hello Experts,

I am finding problem with one of my IBIS model in I-V and V-t curve mismatc= h. Please find the attached model for the refernence.

ERROR - Model dummy: The [Rising Waveform]
      with [R_fixture]=3D80 Ohms and [V_fixture]= =3D0V
      has TYP column DC endpoints of  0.01V and  2.66v, but
      an equivalent load applied to the model's I-V tables yields
      different voltages (-0.00V and  3.90V),=
      a difference of  0.25% and 31.85%, respectively.

I wrote a new tool to generate IBIS models and i am not able to make out wh= ere it is going wrong.
I actually tried to manually calculate the currents at the points , that it= has reported in the above error.

As it is a rising waveform having a R_fixture to ground  the current at 2.66v (steady state) would be 2.66v/50 =3D 33.25mA.

I looked at the voltage corresponding to 33.25mA in pullup table and i foun= d it is coming around 0.66v. There is a mismatch in the way i am caluculating al= so. But i observed a different voltage of 0.66v compared to what ibischk4 has r= eported i.e, 3.9v.

Let me know is the way i am cross checking is correct or not ? If not let me  know the exact procedure.

Also let me know what might have been gone wrong in the curves. From the sh= ape of the curves i am not seeing any problem with the way i have generated.
Please let me know your answers as soon as possible.

Note : Please dont consider any other values apart from the curves like Ram= p , C_comp etc as i have dummy values for these place holders.

Thanks & Regards
Sudarshan

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This message has been scanned for viruses and
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believed to be clean. - ------=_NextPart_000_00DF_01C8156F.B4E1CFF0-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 24 Oct 2007 23:04:29 -0700 (PDT) From: Ibis Model Subject: [IBIS-Users] re: Warning message for IO_open_drain model - --0-1734859554-1193292269=:92194 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Hi everyone, I get a warning message "TYP VI curves cannot drive through Vmeas given load Rref=1e+006 Ohms to Vref=0V" for IO_open_drain model. What does this message mean ? Regards, Timmy __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - --0-1734859554-1193292269=:92194 Content-Type: text/html; charset=iso-8859-1 Content-Transfer-Encoding: 8bit
Hi everyone,
 
I get a warning message "TYP VI curves cannot drive through Vmeas given load Rref=1e+006 Ohms to Vref=0V" for IO_open_drain model.
 
What does this message mean ?
 
Regards,
Timmy

__________________________________________________
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This message has been scanned for viruses and
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believed to be clean. - --0-1734859554-1193292269=:92194-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 25 Oct 2007 09:21:27 -0700 From: "Tom Dagostino" Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model This is a multipart message in MIME format. - ------=_NextPart_000_01AB_01C816E8.6C598910 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit An open drain buffer had a FET whose source is tied to "ground". The drain connection is brought to the outside of the IC package where a load is connected. If the load is connected between the drain and the ground (your message says Vref=0V) then there is no current allowed to flow in the FET. Try moving Vref to Vdd and it should solve your problem. Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Ibis Model Sent: Wednesday, October 24, 2007 11:04 PM To: Server EDA Subject: [IBIS-Users] re: Warning message for IO_open_drain model Hi everyone, I get a warning message "TYP VI curves cannot drive through Vmeas given load Rref=1e+006 Ohms to Vref=0V" for IO_open_drain model. What does this message mean ? Regards, Timmy __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_01AB_01C816E8.6C598910 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

An open drain buffer had a FET whose source is tied to ̶= 0;ground”. The drain connection is brought to the outside of the IC package where a lo= ad is connected.  If the load is connected between the drain and the grou= nd (your message says Vref=3D0V) then there is no current allowed to flow in t= he FET.  Try moving Vref to Vdd and it should solve your problem.

 

Tom Dag= ostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827 =

From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Ibis Model
Sent: Wednesday, October 24, 2007 11:04 PM
To: Server EDA
Subject: [IBIS-Users] re: Warning message for IO_open_drain model

 

Hi everyone,

 

I get a warning message "TYP VI curves cannot dri= ve through Vmeas given load Rref=3D1e+006 Ohms to Vref=3D0V" for IO_open_drain model.

 

What does this message mean ?

 

Regards,

Timmy

 __________________________________________________
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Tired of spam? Yahoo! Mail has the best spam protection around
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--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------=_NextPart_000_01AB_01C816E8.6C598910-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 25 Oct 2007 10:02:27 -0700 From: "Lynne D. Green" Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model This is a multi-part message in MIME format. - ------=_NextPart_000_0004_01C816EE.26726D80 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Hello, Timmy, The warning says if you hook the circuit up (in simulation), it will only switch a few millivolts, not enough for the output to cross Vmeas. You might try setting Rref and Vref to the normal load for this buffer. (Rref of 50 ohms for the transmission line load, in parallel with the pullup load.) One could also look at the V-t curves, to see where their endpoint voltages are. If you would like your model reviewed, the IBIS Model Review Committee welcomes models that pass the IBIS parser. Best regards, Lynne "IBIS training when you need it, where you need it." Dr. Lynne Green Green Streak Programs http://www.greenstreakprograms.com 425-788-0412 lgreen22@mindspring.com _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Ibis Model Sent: Wednesday, October 24, 2007 11:04 PM To: Server EDA Subject: [IBIS-Users] re: Warning message for IO_open_drain model Hi everyone, I get a warning message "TYP VI curves cannot drive through Vmeas given load Rref=1e+006 Ohms to Vref=0V" for IO_open_drain model. What does this message mean ? Regards, Timmy __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_0004_01C816EE.26726D80 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Hello, Timmy,
 
The warning says if you hook the circuit up (in=20 simulation), it will only switch a few millivolts, not enough for the outpu= t to=20 cross Vmeas.  You might try setting Rref and Vref to the normal load f= or=20 this buffer.  (Rref of 50 ohms for the transmission line load, in para= llel=20 with the pullup load.)
 
One could also look at the V-t curves, to see wher= e their=20 endpoint voltages are.
 
If you would like your model reviewed, the IBIS Mo= del=20 Review Committee welcomes models that pass the IBIS parser.
 
Best regards,
Lynne
 
 
"IBIS training when you need it, where you need=20 it."
 
Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.= com
425-788-0412
lgreen22@mindspring.com<= /SPAN>

From: owner-ibis-users@eda.org=20 [mailto:owner-ibis-users@eda.org] On Behalf Of Ibis=20 Model
Sent: Wednesday, October 24, 2007 11:04 PM
To:= =20 Server EDA
Subject: [IBIS-Users] re: Warning message for=20 IO_open_drain model

Hi everyone,
 
I get a warning message "TYP VI curves cannot drive through=20 Vmeas given load Rref=3D1e+006 Ohms to Vref=3D0V" for IO_open_drain = model.=20
 
What does this message mean ?
 
Regards,
Timmy

__________________________________________________
Do You=20 Yahoo!?
Tired of spam? Yahoo! Mail has the best spam protection around= =20
http://mail.yahoo.com
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This message has been scanned for vi= ruses=20 and
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believed to be clean.


--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------=_NextPart_000_0004_01C816EE.26726D80-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 25 Oct 2007 10:43:19 -0700 From: "Tom Dagostino" Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model This is a multipart message in MIME format. - ------=_NextPart_000_01B9_01C816F3.DC024760 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Lynne The problem is not the load resistance but the voltage it is terminated to, Vref = 0 in this case. Lowering the Rref is not going to help, Rref should be whatever resistance the datasheet says it should be. There will be no current flowing in this driver if both the load and the driver are tied to ground. From I=E/R, I will be 0 if E=0. I've seen this mistake way too many times and likely made it myself once or twice. I'm not sure what you mean by (Rref of 50 ohms for the transmission line load, in parallel with the pullup load.) Could you expand on it? What do you mean in parallel with the pullup load? Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Lynne D. Green Sent: Thursday, October 25, 2007 10:02 AM To: 'Ibis Model'; 'Server EDA' Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model Hello, Timmy, The warning says if you hook the circuit up (in simulation), it will only switch a few millivolts, not enough for the output to cross Vmeas. You might try setting Rref and Vref to the normal load for this buffer. (Rref of 50 ohms for the transmission line load, in parallel with the pullup load.) One could also look at the V-t curves, to see where their endpoint voltages are. If you would like your model reviewed, the IBIS Model Review Committee welcomes models that pass the IBIS parser. Best regards, Lynne "IBIS training when you need it, where you need it." Dr. Lynne Green Green Streak Programs http://www.greenstreakprograms.com 425-788-0412 lgreen22@mindspring.com _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Ibis Model Sent: Wednesday, October 24, 2007 11:04 PM To: Server EDA Subject: [IBIS-Users] re: Warning message for IO_open_drain model Hi everyone, I get a warning message "TYP VI curves cannot drive through Vmeas given load Rref=1e+006 Ohms to Vref=0V" for IO_open_drain model. What does this message mean ? Regards, Timmy __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_01B9_01C816F3.DC024760 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Lynne

 

The problem is not the load resistance but the voltage it is terminated to, Vref =3D 0 in this case.  Lowering the Rref is not goin= g to help, Rref should be whatever resistance the datasheet says it should be.&n= bsp; There will be no current flowing in this driver if both the load and the dr= iver are tied to ground.  From I=3DE/R, I will be 0 if E=3D0.  I’= ;ve seen this mistake way too many times and likely made it myself once or twice.

 

I’m not sure what you mean by (Rre= f of 50 ohms for the transmission line load, in parallel with the pullup load.)<= /span>   Could you expand on it? What do you mean in parallel with the pullup load?<= o:p>

 

Tom Dag= ostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827 =

From: owner-ibis-us= ers@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Lynne D. Green=
Sent: Thursday, October 25, 2007 10:02 AM
To: 'Ibis Model'; 'Server EDA'
Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain mode= l

 

Hello, Timmy,

 

The warning says if you hook the circuit up (in simulation), it will only switch a few millivolts, not enough for the output to cross Vmeas.  You might try setting Rref and Vref to the normal load for this buffer.  (Rref of 50 ohms for the transmission line load, in parallel = with the pullup load.)

 

One could also look at the V-t curves, to see where their endpo= int voltages are.

 

If you would like your model reviewed, the IBIS Model Review Co= mmittee welcomes models that pass the IBIS parser.

 

Best regards,

Lynne

 

 

"IBIS training when you need it, where you need it."<= /span>

 

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprogra= ms.com
425-788-0412
lgreen22@mindspring.com

 

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Ibis Model
Sent: Wednesday, October 24, 2007 11:04 PM
To: Server EDA
Subject: [IBIS-Users] re: Warning message for IO_open_drain model

Hi everyone,

 

I get a warning message "TYP VI curves cannot dri= ve through Vmeas given load Rref=3D1e+006 Ohms to Vref=3D0V" for IO_= open_drain model.

 

What does this message mean ?

 

Regards,

Timmy

__________________________________________________
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This message has been scanned for viruses and
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--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------=_NextPart_000_01B9_01C816F3.DC024760-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 25 Oct 2007 11:30:34 -0700 (PDT) From: bi yuanbi Subject: [IBIS-Users] LVDS buffer IBIS gereration Dear experts, I read from one paper " Details on True Differential Buffer Characterization Revisited" by Aprad Muranyi of Intel Corp, And I used this method to generate the differential and common mode I-V curves and the V-t curve for one differential LVDS buffer.But I don't know how to convert these data to the formal IBIS format, and using which version to verify the IBIS file. Can some IBIS experts give me more detailed information about it, or Could share some examples of LVDS IBIS file to study the format, it is still look like the single ended ibis file? how many data we need to pick? I'm really appreciated for your kindly help! Thanks bi - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 25 Oct 2007 12:07:46 -0700 From: "Tom Dagostino" Subject: RE: [IBIS-Users] LVDS buffer IBIS generation If you read the IBIS spec you will find that capability has not been added yet. And if it was there is likely no simulator that would take the data anyway. You can best add that level of detail by adding an external SPICE model to the file. Use IBIS Version 4.2. Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 - -----Original Message----- From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of bi yuanbi Sent: Thursday, October 25, 2007 11:31 AM To: ibis-users@server.eda.org Subject: [IBIS-Users] LVDS buffer IBIS gereration Dear experts, I read from one paper " Details on True Differential Buffer Characterization Revisited" by Aprad Muranyi of Intel Corp, And I used this method to generate the differential and common mode I-V curves and the V-t curve for one differential LVDS buffer.But I don't know how to convert these data to the formal IBIS format, and using which version to verify the IBIS file. Can some IBIS experts give me more detailed information about it, or Could share some examples of LVDS IBIS file to study the format, it is still look like the single ended ibis file? how many data we need to pick? I'm really appreciated for your kindly help! Thanks bi - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 25 Oct 2007 12:21:02 -0700 From: "Muranyi, Arpad" Subject: RE: [IBIS-Users] LVDS buffer IBIS gereration I would suggest that you look at the IBIS Cookbook first. There is a little more detail in that since it was written after my presentation. http://www.vhdl.org/pub/ibis/cookbook/cookbook-v4.pdf Unfortunately I am not aware of a tool that has automated this process yet. Arpad =========================================================== - -----Original Message----- From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of bi yuanbi Sent: Thursday, October 25, 2007 11:31 AM To: ibis-users@server.eda.org Subject: [IBIS-Users] LVDS buffer IBIS gereration Dear experts, I read from one paper " Details on True Differential Buffer Characterization Revisited" by Aprad Muranyi of Intel Corp, And I used this method to generate the differential and common mode I-V curves and the V-t curve for one differential LVDS buffer.But I don't know how to convert these data to the formal IBIS format, and using which version to verify the IBIS file. Can some IBIS experts give me more detailed information about it, or Could share some examples of LVDS IBIS file to study the format, it is still look like the single ended ibis file? how many data we need to pick? I'm really appreciated for your kindly help! Thanks bi - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 25 Oct 2007 12:27:50 -0700 From: "Muranyi, Arpad" Subject: RE: [IBIS-Users] LVDS buffer IBIS generation Tom, what capability are you referring to? As described on pg. 36-38 in the Cookbook, the data can be modeled with the [Series MOSFET], [Series Current], [R Series] keywords which have been available in the IBIS specification for years. It is a different story that not all simulators may be supporting them yet. Arpad ======================================================================= - -----Original Message----- From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Tom Dagostino Sent: Thursday, October 25, 2007 12:08 PM To: 'bi yuanbi'; ibis-users@server.eda.org Subject: RE: [IBIS-Users] LVDS buffer IBIS generation If you read the IBIS spec you will find that capability has not been added yet. And if it was there is likely no simulator that would take the data anyway. You can best add that level of detail by adding an external SPICE model to the file. Use IBIS Version 4.2. Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 - -----Original Message----- From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of bi yuanbi Sent: Thursday, October 25, 2007 11:31 AM To: ibis-users@server.eda.org Subject: [IBIS-Users] LVDS buffer IBIS gereration Dear experts, I read from one paper " Details on True Differential Buffer Characterization Revisited" by Aprad Muranyi of Intel Corp, And I used this method to generate the differential and common mode I-V curves and the V-t curve for one differential LVDS buffer.But I don't know how to convert these data to the formal IBIS format, and using which version to verify the IBIS file. Can some IBIS experts give me more detailed information about it, or Could share some examples of LVDS IBIS file to study the format, it is still look like the single ended ibis file? how many data we need to pick? I'm really appreciated for your kindly help! Thanks bi - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 25 Oct 2007 13:00:18 -0700 From: "Tom Dagostino" Subject: RE: [IBIS-Users] LVDS buffer IBIS generation My mistake, I take it back. I was thinking of something else. Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 - -----Original Message----- From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Muranyi, Arpad Sent: Thursday, October 25, 2007 12:28 PM To: ibis-users@server.eda.org Subject: RE: [IBIS-Users] LVDS buffer IBIS generation Tom, what capability are you referring to? As described on pg. 36-38 in the Cookbook, the data can be modeled with the [Series MOSFET], [Series Current], [R Series] keywords which have been available in the IBIS specification for years. It is a different story that not all simulators may be supporting them yet. Arpad ======================================================================= - -----Original Message----- From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Tom Dagostino Sent: Thursday, October 25, 2007 12:08 PM To: 'bi yuanbi'; ibis-users@server.eda.org Subject: RE: [IBIS-Users] LVDS buffer IBIS generation If you read the IBIS spec you will find that capability has not been added yet. And if it was there is likely no simulator that would take the data anyway. You can best add that level of detail by adding an external SPICE model to the file. Use IBIS Version 4.2. Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 - -----Original Message----- From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of bi yuanbi Sent: Thursday, October 25, 2007 11:31 AM To: ibis-users@server.eda.org Subject: [IBIS-Users] LVDS buffer IBIS gereration Dear experts, I read from one paper " Details on True Differential Buffer Characterization Revisited" by Aprad Muranyi of Intel Corp, And I used this method to generate the differential and common mode I-V curves and the V-t curve for one differential LVDS buffer.But I don't know how to convert these data to the formal IBIS format, and using which version to verify the IBIS file. Can some IBIS experts give me more detailed information about it, or Could share some examples of LVDS IBIS file to study the format, it is still look like the single ended ibis file? how many data we need to pick? I'm really appreciated for your kindly help! Thanks bi - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 26 Oct 2007 09:45:47 -0700 From: "Lynne D. Green" Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model This is a multi-part message in MIME format. - ------=_NextPart_000_0015_01C817B4.FCB87BC0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Hi, Tom, Thanks for the catch. I must have confused Rref with a resistor-loaded table. Another thing what caught my eye was the value of 1e6. Wouldn't this be effectively be an "open", as it is much larger than any realistic Z0? (I seem to remember values like that preventing a Vmeas crossing.) For Rref: When the buffer is driving, one sees a Thevenin equivalent of the pullup (to Vcc) in parallel with the 50-ohm transmission line (to Vcc or GND) ["parallel" when both go to Vcc]. Many people take the rule of thumb to use Z0, which works as long at ZUP>>Z0. Best regards, Lynne _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Tom Dagostino Sent: Thursday, October 25, 2007 10:43 AM To: 'Lynne D. Green'; 'Ibis Model'; 'Server EDA' Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model Lynne The problem is not the load resistance but the voltage it is terminated to, Vref = 0 in this case. Lowering the Rref is not going to help, Rref should be whatever resistance the datasheet says it should be. There will be no current flowing in this driver if both the load and the driver are tied to ground. From I=E/R, I will be 0 if E=0. I've seen this mistake way too many times and likely made it myself once or twice. I'm not sure what you mean by (Rref of 50 ohms for the transmission line load, in parallel with the pullup load.) Could you expand on it? What do you mean in parallel with the pullup load? Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Lynne D. Green Sent: Thursday, October 25, 2007 10:02 AM To: 'Ibis Model'; 'Server EDA' Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model Hello, Timmy, The warning says if you hook the circuit up (in simulation), it will only switch a few millivolts, not enough for the output to cross Vmeas. You might try setting Rref and Vref to the normal load for this buffer. (Rref of 50 ohms for the transmission line load, in parallel with the pullup load.) One could also look at the V-t curves, to see where their endpoint voltages are. If you would like your model reviewed, the IBIS Model Review Committee welcomes models that pass the IBIS parser. Best regards, Lynne "IBIS training when you need it, where you need it." Dr. Lynne Green Green Streak Programs http://www.greenstreakprograms.com 425-788-0412 lgreen22@mindspring.com _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Ibis Model Sent: Wednesday, October 24, 2007 11:04 PM To: Server EDA Subject: [IBIS-Users] re: Warning message for IO_open_drain model Hi everyone, I get a warning message "TYP VI curves cannot drive through Vmeas given load Rref=1e+006 Ohms to Vref=0V" for IO_open_drain model. What does this message mean ? Regards, Timmy __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_0015_01C817B4.FCB87BC0 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Hi, Tom,
 
Thanks for the catch.  I must have confu= sed Rref=20 with a resistor-loaded table.
 
Another thing what caught my eye was the value of= =20 1e6.  Wouldn't this be effectively be an "open", as it is much la= rger=20 than any realistic Z0?  (I seem to remember values like that preventin= g a=20 Vmeas crossing.)
 
For Rref: When the buffer is driving, one sees a T= hevenin=20 equivalent of the pullup (to Vcc) in parallel with the 50-ohm transmission = line=20 (to Vcc or GND) ["parallel" when both go to Vcc].  Many people take th= e=20 rule of thumb to use Z0, which works as long at=20 ZUP>>Z0.
 
Best regards,
Lynne
 
 

From: owner-ibis-users@eda.org=20 [mailto:owner-ibis-users@eda.org] On Behalf Of Tom=20 Dagostino
Sent: Thursday, October 25, 2007 10:43 AM
To:=20 'Lynne D. Green'; 'Ibis Model'; 'Server EDA'
Subject: RE:=20 [IBIS-Users] re: Warning message for IO_open_drain model

Lynne

 

The=20 problem is not the load resistance but the voltage it is terminated to, V= ref =3D=20 0 in this case.  Lowering the Rref is not going to help, Rref should= be=20 whatever resistance the datasheet says it should be.  There will be = no=20 current flowing in this driver if both the load and the driver are tied t= o=20 ground.  From I=3DE/R, I will be 0 if E=3D0.  I’ve seen t= his mistake way=20 too many times and likely made it myself once or twice.=

 

I’m=20 not sure what you mean by (Rref=20 of 50 ohms for the transmission line load, in parallel with the pullup=20 load.)  =20 Could you expand on it? What do you mean in parallel with the pullup=20 load?

 

Tom= =20 Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR= =20 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Te= raspeed=20 Consulting Group LLC
121 North River Drive
Narragansett, RI=20 02882
401-284-1827

From:=20 owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] = On=20 Behalf Of Lynne D. Green
Sent: Thursday, October 25, 2007 1= 0:02=20 AM
To: 'Ibis Model'; 'Server EDA'
Subject: RE:=20 [IBIS-Users] re: Warning message for IO_open_drain=20 model

 

Hello,=20 Timmy,

 

The=20 warning says if you hook the circuit up (in simulation), it will only swi= tch a=20 few millivolts, not enough for the output to cross Vmeas.  You might= try=20 setting Rref and Vref to the normal load for this buffer.  (Rref of = 50=20 ohms for the transmission line load, in parallel with the pullup=20 load.)

 

One=20 could also look at the V-t curves, to see where their endpoint voltages= =20 are.

 

If you=20 would like your model reviewed, the IBIS Model Review Committee welcomes= =20 models that pass the IBIS parser.

 

Best=20 regards,

Lynne

 

 

"IBIS=20 training when you need it, where you need it."

 

Dr.=20 Lynne Green
Green Streak Programs
http://www.greenstreakprogram= s.com
425-788-0412
lgreen22@mindspring.com

 

From:=20 owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf= Of=20 Ibis Model
Sent: Wednesday, October 24, 2007 11:04=20 PM
To: Server EDA
Subject: [IBIS-Users] re: Warning= =20 message for IO_open_drain model

Hi everyone,

 

I get a warning message "TYP VI curves cannot driv= e=20 through Vmeas given load Rref=3D1e+006 Ohms to Vref=3D0V" for IO_o= pen_drain=20 model.

 

What does this message mean ?

 

Regards,

Timmy

__________________________________________________
Do You=20 Yahoo!?
Tired of spam? Yahoo! Mail has the best spam protection arou= nd=20
http://mail.yahoo.com
--
This message has been scanned for= =20 viruses and
dangerous content by MailScanner, and is= =20
believed to be clean.


--
This message has been scanned for viruses= and=20
dangerous content by MailScanner, and is=20
believed to be clean.


--
This message ha= s=20 been scanned for viruses and
dangerous content by MailScanner, and is=20
believed to be clean.

--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------=_NextPart_000_0015_01C817B4.FCB87BC0-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 26 Oct 2007 10:22:30 -0700 From: "Tom Dagostino" Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model This is a multipart message in MIME format. - ------=_NextPart_000_027D_01C817BA.1E3AE030 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Lynne I assumed (bad engineer, bad engineer) that the 1M resistor came from the datasheet and not a made up number. I too think it is a very high value but I had no basis to question it from the information in the question. I've seen a lot of open sink drivers in all the models we have done and have found many way too weak to drive a 50 Ohm pullup to any reasonable Vmeas. Open sink driver applications seem to be split between three different categories; 1. very low power status bits, 2. LED drivers and other applications where speed is not an issue and only require a mA or so and 3. High speed wired OR applications. A 1M pullup would fall into the first category but it still seems to be on the high side. But if your application is battery powered it may make sense. I'm not sure you have your transmission line theory correct. Let's take a single 1V, 1psec edge propagating down a 6 inch transmission line terminated into 50 Ohms to ground. Let's assume the output impedance of the driver is 50 Ohms. Let's also assume the Zo of the transmission line is 50 Ohms and the speed of propagation is 170 psec per inch. When the waveform is launched into the transmission line the only impedance seen by the driver is the Zo of the line. The voltage at the output of the driver is now 0.5V The signal has not been able to propagate down to the length of the line yet. As time goes by (6*170psec) the signal eventually reaches the end of the line and is totally absorbed by the termination, there is no reflection. So the driver sees a 50 Ohm load from the time it launches the edge down the line until the power is removed. The output voltage of the driver will remain at 0.5V If we were to replace the 50 Ohm termination with a short the driver again would see a 50 Ohm transmission line when it launches the edge. Again the output voltage of the driver will be 0.5V. After 6*170psec the edge will get to the short and a large reflection will occur. This reflection will take 6*170psec to get back to the driver. Up until the reflection returns to the driver the impedance seen by the driver is 50 Ohms. So for 12*170psec the driver sees 50 Ohms. After that time the reflection returns to the driver and the driver now "knows" there is a short at end of the line. The output voltage from the driver is now 0V. And you can see the logic with a open at the end of the line. The drive sees 50 Ohms for 12*170psec and then sees an open until the power is removed. After the reflection returns from the open the output voltage is 1V. Regards Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Lynne D. Green Sent: Friday, October 26, 2007 9:46 AM To: tom@teraspeed.com; 'Ibis Model'; 'Server EDA' Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model Hi, Tom, Thanks for the catch. I must have confused Rref with a resistor-loaded table. Another thing what caught my eye was the value of 1e6. Wouldn't this be effectively be an "open", as it is much larger than any realistic Z0? (I seem to remember values like that preventing a Vmeas crossing.) For Rref: When the buffer is driving, one sees a Thevenin equivalent of the pullup (to Vcc) in parallel with the 50-ohm transmission line (to Vcc or GND) ["parallel" when both go to Vcc]. Many people take the rule of thumb to use Z0, which works as long at ZUP>>Z0. Best regards, Lynne _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Tom Dagostino Sent: Thursday, October 25, 2007 10:43 AM To: 'Lynne D. Green'; 'Ibis Model'; 'Server EDA' Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model Lynne The problem is not the load resistance but the voltage it is terminated to, Vref = 0 in this case. Lowering the Rref is not going to help, Rref should be whatever resistance the datasheet says it should be. There will be no current flowing in this driver if both the load and the driver are tied to ground. From I=E/R, I will be 0 if E=0. I've seen this mistake way too many times and likely made it myself once or twice. I'm not sure what you mean by (Rref of 50 ohms for the transmission line load, in parallel with the pullup load.) Could you expand on it? What do you mean in parallel with the pullup load? Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Lynne D. Green Sent: Thursday, October 25, 2007 10:02 AM To: 'Ibis Model'; 'Server EDA' Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model Hello, Timmy, The warning says if you hook the circuit up (in simulation), it will only switch a few millivolts, not enough for the output to cross Vmeas. You might try setting Rref and Vref to the normal load for this buffer. (Rref of 50 ohms for the transmission line load, in parallel with the pullup load.) One could also look at the V-t curves, to see where their endpoint voltages are. If you would like your model reviewed, the IBIS Model Review Committee welcomes models that pass the IBIS parser. Best regards, Lynne "IBIS training when you need it, where you need it." Dr. Lynne Green Green Streak Programs http://www.greenstreakprograms.com 425-788-0412 lgreen22@mindspring.com _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Ibis Model Sent: Wednesday, October 24, 2007 11:04 PM To: Server EDA Subject: [IBIS-Users] re: Warning message for IO_open_drain model Hi everyone, I get a warning message "TYP VI curves cannot drive through Vmeas given load Rref=1e+006 Ohms to Vref=0V" for IO_open_drain model. What does this message mean ? Regards, Timmy __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner , and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner , and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_027D_01C817BA.1E3AE030 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Lynne

 

I assumed (bad engineer, bad engineer) that the 1M resistor = came from the datasheet and not a made up number.  I too think it is a very high value but I had no basis to question it from the information in the question.  I’ve seen a lot of open sink drivers in all the model= s we have done and have found many way too weak to drive a 50 Ohm pullup to any reasonable Vmeas.  Open sink driver applications seem to be split betw= een three different categories; 1. very low power status bits, 2.  LED drivers a= nd other applications where speed is not an issue and only require a mA or so = and  3. High speed wired OR applications.  A 1M pullup would fall into the fir= st category but it still seems to be on the high side.  But if your application is battery powered it may make sense.

 

I’m not sure you have your transmission line theory co= rrect.  Let’s take a single 1V, 1psec edge propagating down a 6 inch transmis= sion line terminated into 50 Ohms to ground.  Let’s assume the output= impedance of the driver is 50 Ohms.  Let’s also assume the Zo of the transmission line is 50 Ohms and the speed of propagation is 170 psec per inch.  When the waveform is launched into the transmission line the on= ly impedance seen by the driver is the Zo of the line.  The voltage at the output of the driver is now 0.5V  The signal has not been able to propagate down to the length of the line yet.  As time goes by (6*170p= sec) the signal eventually reaches the end of the line and is totally absorbed by the termination, there is no reflection.  So the driver sees a 50 Ohm = load from the time it launches the edge down the line until the power is removed.  The output voltage of the driver will remain at 0.5V

 

If we were to replace the 50 Ohm termination with a short the driver again would see a 50 Ohm transmission line when it launches the edge= .  Again the output voltage of the driver will be 0.5V.  After 6*170psec = the edge will get to the short and a large reflection will occur.  This reflection will take 6*170psec to get back to the driver.  Up until the reflection returns to the driver the impedance seen by the driver is 50 Ohms.  So for 12*170psec the driver sees 50 Ohms. After that time the reflection returns to the driver and the driver now “knows” the= re is a short at end of the line.  The output voltage from the driver is = now 0V.  And you can see the logic with a open at the end of the line.&nbs= p; The drive sees 50 Ohms for 12*170psec and then sees an open until the power= is removed.  After the reflection returns from the open the output voltag= e is 1V.

 

Regards

 

Tom Dag= ostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827 =

From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Lynne D. Green
Sent: Friday, October 26, 2007 9:46 AM
To: tom@teraspeed.com; 'Ibis Model'; 'Server EDA'
Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain mode= l

 

Hi, Tom,

 

Thanks for the catch.  I must have confused Rref with= a resistor-loaded table.

 

Another thing what caught my eye was the value of 1e6.  Wouldn't this be effectively be an "open", as it is much lar= ger than any realistic Z0?  (I seem to remember values like that preventin= g a Vmeas crossing.)

 

For Rref: When the buffer is driving, one sees a Thevenin equivalent of the pullup (to Vcc) in parallel with the 50-ohm transmission = line (to Vcc or GND) ["parallel" when both go to Vcc].  Many peop= le take the rule of thumb to use Z0, which works as long at ZUP>>Z0.

 

Best regards,

Lynne

 

 

 

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Tom Dagostino
Sent: Thursday, October 25, 2007 10:43 AM
To: 'Lynne D. Green'; 'Ibis Model'; 'Server EDA'
Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain mode= l

Lynne

 

The problem is not the load resistance but the voltage it is terminated to, Vref =3D 0 in this case.  Lowering the Rref is not goin= g to help, Rref should be whatever resistance the datasheet says it should be.&n= bsp; There will be no current flowing in this driver if both the load and the dr= iver are tied to ground.  From I=3DE/R, I will be 0 if E=3D0.  I’= ;ve seen this mistake way too many times and likely made it myself once or twice.

 

I’m not sure what you mean by (Rre= f of 50 ohms for the transmission line load, in parallel with the pullup load.)<= /span>   Could you expand on it? What do you mean in parallel with the pullup load?<= o:p>

 

Tom Dag= ostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827 =

From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Lynne D. Green
Sent: Thursday, October 25, 2007 10:02 AM
To: 'Ibis Model'; 'Server EDA'
Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain mode= l

 

Hello, Timmy,

 

The warning says if you hook the circuit up (in simulation), it will only switch a few millivolts, not enough for the output to cross Vmeas.  You might try setting Rref and Vref to the normal load for this buffer.  (Rref of 50 ohms for the transmission line load, in parallel = with the pullup load.)

 

One could also look at the V-t curves, to see where their endpo= int voltages are.

 

If you would like your model reviewed, the IBIS Model Review Committee welcomes models that pass the IBIS parser.

 

Best regards,

Lynne

 

 

"IBIS training when you need it, where you need it."<= /span>

 

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprogra= ms.com
425-788-0412
lgreen22@mindspring.com

 

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Ibis Model
Sent: Wednesday, October 24, 2007 11:04 PM
To: Server EDA
Subject: [IBIS-Users] re: Warning message for IO_open_drain model

Hi everyone,

 

I get a warning message "TYP VI curves cannot dri= ve through Vmeas given load Rref=3D1e+006 Ohms to Vref=3D0V" for IO_open_drain model.

 

What does this message mean ?

 

Regards,

Timmy

__________________________________________________
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--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------=_NextPart_000_027D_01C817BA.1E3AE030-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 29 Oct 2007 14:11:24 -0700 From: "Lynne D. Green" Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model This is a multi-part message in MIME format. - ------=_NextPart_000_0008_01C81A35.97996320 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Hi, Tom, It all depends on where the pullup resistor is located. I assumed that the pullup was on-die with the buffer (esp with the high value, since some I/Os are designed that way). You are right that there are other cases I should have considered, particularly the case of the pullup being at the load. I think we both qualify as good engineers with an occasional unstated assumption. - - Lynne _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Tom Dagostino Sent: Friday, October 26, 2007 10:23 AM To: 'Lynne D. Green'; 'Ibis Model'; 'Server EDA' Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model Lynne I assumed (bad engineer, bad engineer) that the 1M resistor came from the datasheet and not a made up number. I too think it is a very high value but I had no basis to question it from the information in the question. I've seen a lot of open sink drivers in all the models we have done and have found many way too weak to drive a 50 Ohm pullup to any reasonable Vmeas. Open sink driver applications seem to be split between three different categories; 1. very low power status bits, 2. LED drivers and other applications where speed is not an issue and only require a mA or so and 3. High speed wired OR applications. A 1M pullup would fall into the first category but it still seems to be on the high side. But if your application is battery powered it may make sense. I'm not sure you have your transmission line theory correct. Let's take a single 1V, 1psec edge propagating down a 6 inch transmission line terminated into 50 Ohms to ground. Let's assume the output impedance of the driver is 50 Ohms. Let's also assume the Zo of the transmission line is 50 Ohms and the speed of propagation is 170 psec per inch. When the waveform is launched into the transmission line the only impedance seen by the driver is the Zo of the line. The voltage at the output of the driver is now 0.5V The signal has not been able to propagate down to the length of the line yet. As time goes by (6*170psec) the signal eventually reaches the end of the line and is totally absorbed by the termination, there is no reflection. So the driver sees a 50 Ohm load from the time it launches the edge down the line until the power is removed. The output voltage of the driver will remain at 0.5V If we were to replace the 50 Ohm termination with a short the driver again would see a 50 Ohm transmission line when it launches the edge. Again the output voltage of the driver will be 0.5V. After 6*170psec the edge will get to the short and a large reflection will occur. This reflection will take 6*170psec to get back to the driver. Up until the reflection returns to the driver the impedance seen by the driver is 50 Ohms. So for 12*170psec the driver sees 50 Ohms. After that time the reflection returns to the driver and the driver now "knows" there is a short at end of the line. The output voltage from the driver is now 0V. And you can see the logic with a open at the end of the line. The drive sees 50 Ohms for 12*170psec and then sees an open until the power is removed. After the reflection returns from the open the output voltage is 1V. Regards Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Lynne D. Green Sent: Friday, October 26, 2007 9:46 AM To: tom@teraspeed.com; 'Ibis Model'; 'Server EDA' Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model Hi, Tom, Thanks for the catch. I must have confused Rref with a resistor-loaded table. Another thing what caught my eye was the value of 1e6. Wouldn't this be effectively be an "open", as it is much larger than any realistic Z0? (I seem to remember values like that preventing a Vmeas crossing.) For Rref: When the buffer is driving, one sees a Thevenin equivalent of the pullup (to Vcc) in parallel with the 50-ohm transmission line (to Vcc or GND) ["parallel" when both go to Vcc]. Many people take the rule of thumb to use Z0, which works as long at ZUP>>Z0. Best regards, Lynne _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Tom Dagostino Sent: Thursday, October 25, 2007 10:43 AM To: 'Lynne D. Green'; 'Ibis Model'; 'Server EDA' Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model Lynne The problem is not the load resistance but the voltage it is terminated to, Vref = 0 in this case. Lowering the Rref is not going to help, Rref should be whatever resistance the datasheet says it should be. There will be no current flowing in this driver if both the load and the driver are tied to ground. From I=E/R, I will be 0 if E=0. I've seen this mistake way too many times and likely made it myself once or twice. I'm not sure what you mean by (Rref of 50 ohms for the transmission line load, in parallel with the pullup load.) Could you expand on it? What do you mean in parallel with the pullup load? Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of Lynne D. Green Sent: Thursday, October 25, 2007 10:02 AM To: 'Ibis Model'; 'Server EDA' Subject: RE: [IBIS-Users] re: Warning message for IO_open_drain model Hello, Timmy, The warning says if you hook the circuit up (in simulation), it will only switch a few millivolts, not enough for the output to cross Vmeas. You might try setting Rref and Vref to the normal load for this buffer. (Rref of 50 ohms for the transmission line load, in parallel with the pullup load.) One could also look at the V-t curves, to see where their endpoint voltages are. If you would like your model reviewed, the IBIS Model Review Committee welcomes models that pass the IBIS parser. Best regards, Lynne "IBIS training when you need it, where you need it." Dr. Lynne Green Green Streak Programs http://www.greenstreakprograms.com 425-788-0412 lgreen22@mindspring.com _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Ibis Model Sent: Wednesday, October 24, 2007 11:04 PM To: Server EDA Subject: [IBIS-Users] re: Warning message for IO_open_drain model Hi everyone, I get a warning message "TYP VI curves cannot drive through Vmeas given load Rref=1e+006 Ohms to Vref=0V" for IO_open_drain model. What does this message mean ? Regards, Timmy __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner , and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner , and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_0008_01C81A35.97996320 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Hi, Tom,
 
It all depends on where the pullup resistor is=20 located.  I assumed that the pullup was on-die with=20 the buffer (esp with the high value, since some I/Os are designed= that=20 way). You are right that there are other cases I should have considered,=20 particularly the case of the pullup being at the load.
 
I think we both qualify as good engineers with an= =20 occasional unstated assumption.
 
-=20 Lynne

From: owner-ibis-users@eda.org=20 [mailto:owner-ibis-users@eda.org] On Behalf Of Tom=20 Dagostino
Sent: Friday, October 26, 2007 10:23 AM
To:= =20 'Lynne D. Green'; 'Ibis Model'; 'Server EDA'
Subject: RE:=20 [IBIS-Users] re: Warning message for IO_open_drain model

Lynne

 

I=20 assumed (bad engineer, bad engineer) that the 1M resistor came from the= =20 datasheet and not a made up number.  I too think it is a very high v= alue=20 but I had no basis to question it from the information in the question.&n= bsp;=20 I’ve seen a lot of open sink drivers in all the models we have done= and have=20 found many way too weak to drive a 50 Ohm pullup to any reasonable=20 Vmeas.  Open sink driver applications seem to be split between three= =20 different categories; 1. very low power status bits, 2.  LED drivers= and=20 other applications where speed is not an issue and only require a mA or s= o and=20  3. High speed wired OR applications.  A 1M pullup would fall i= nto=20 the first category but it still seems to be on the high side.  But i= f=20 your application is battery powered it may make sense.<= /P>

 

I’m=20 not sure you have your transmission line theory correct.  Let’= s take a=20 single 1V, 1psec edge propagating down a 6 inch transmission line termina= ted=20 into 50 Ohms to ground.  Let’s assume the output impedance of = the driver=20 is 50 Ohms.  Let’s also assume the Zo of the transmission line= is 50 Ohms=20 and the speed of propagation is 170 psec per inch.  When the wavefor= m is=20 launched into the transmission line the only impedance seen by the driver= is=20 the Zo of the line.  The voltage at the output of the driver is now= =20 0.5V  The signal has not been able to propagate down to the length o= f the=20 line yet.  As time goes by (6*170psec) the signal eventually reaches= the=20 end of the line and is totally absorbed by the termination, there is no= =20 reflection.  So the driver sees a 50 Ohm load from the time it launc= hes=20 the edge down the line until the power is removed.  The output volta= ge of=20 the driver will remain at 0.5V

 

If=20 we were to replace the 50 Ohm termination with a short the driver again w= ould=20 see a 50 Ohm transmission line when it launches the edge.  Again the= =20 output voltage of the driver will be 0.5V.  After 6*170psec the edge= will=20 get to the short and a large reflection will occur.  This reflection= will=20 take 6*170psec to get back to the driver.  Up until the reflection= =20 returns to the driver the impedance seen by the driver is 50 Ohms.  = So=20 for 12*170psec the driver sees 50 Ohms. After that time the reflection re= turns=20 to the driver and the driver now “knows” there is a short at = end of the line.=20  The output voltage from the driver is now 0V.  And you can see= the=20 logic with a open at the end of the line.  The drive sees 50 Ohms fo= r=20 12*170psec and then sees an open until the power is removed.  After = the=20 reflection returns from the open the output voltage is=20 1V.

 

Regards

 

Tom= =20 Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR= =20 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

Te= raspeed=20 Consulting Group LLC
121 North River Drive
Narragansett, RI=20 02882
401-284-1827

From:=20 owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] = On=20 Behalf Of Lynne D. Green
Sent: Friday, October 26, 2007 9:4= 6=20 AM
To: tom@teraspeed.com; 'Ibis Model'; 'Server=20 EDA'
Subject: RE: [IBIS-Users] re: Warning message for IO_open_= drain=20 model

 

Hi,=20 Tom,

 

Thanks=20 for the catch.  I must have confused Rref with a resistor-loade= d=20 table.

 

Another=20 thing what caught my eye was the value of 1e6.  Wouldn't this b= e=20 effectively be an "open", as it is much larger than any realistic Z0?&nbs= p; (I=20 seem to remember values like that preventing a Vmeas=20 crossing.)

 

For=20 Rref: When the buffer is driving, one sees a Thevenin equivalent of the p= ullup=20 (to Vcc) in parallel with the 50-ohm transmission line (to Vcc or GND)=20 ["parallel" when both go to Vcc].  Many people take the rule of thum= b to=20 use Z0, which works as long at ZUP>>Z0.

 

Best=20 regards,

Lynne

 

 

 

From:=20 owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf= Of=20 Tom Dagostino
Sent: Thursday, October 25, 2007 10:43=20 AM
To: 'Lynne D. Green'; 'Ibis Model'; 'Server=20 EDA'
Subject: RE: [IBIS-Users] re: Warning message for=20 IO_open_drain model

Lynne

 

The=20 problem is not the load resistance but the voltage it is terminated to,= Vref=20 =3D 0 in this case.  Lowering the Rref is not going to help, Rref = should=20 be whatever resistance the datasheet says it should be.  There wil= l be=20 no current flowing in this driver if both the load and the driver are t= ied=20 to ground.  From I=3DE/R, I will be 0 if E=3D0.  I’ve s= een this=20 mistake way too many times and likely made it myself once or=20 twice.

 

I’m=20 not sure what you mean by   =20 Could you expand on it? What do you mean in parallel with the pullup=20 load?

 

To= m=20 Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, O= R=20 97008
503-430-1065
tom@teraspeed.com
www.teraspeed.com

= Teraspeed=20 Consulting Group LLC
121 North River Drive
Narragansett, RI=20 02882
401-284-1827

From:=20 owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org= ]=20 On Behalf Of Lynne D. Green
Sent: Thursday, October 25= ,=20 2007 10:02 AM
To: 'Ibis Model'; 'Server EDA'
Subject:=20 RE: [IBIS-Users] re: Warning message for IO_open_drain=20 model

 

From:=20 owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Beha= lf Of=20 Ibis Model
Sent: Wednesday, October 24, 2007 11:04=20 PM
To: Server EDA
Subject: [IBIS-Users] re: Warni= ng=20 message for IO_open_drain model

Hi everyone,

 

I get a warning message "TYP VI curves cannot dr= ive=20 through Vmeas given load Rref=3D1e+006 Ohms to Vref=3D0V" for=20 IO_open_drain model.

 

What does this message mean ?

 

Regards,

Timmy

__________________________________________________
Do You=20 Yahoo!?
Tired of spam? Yahoo! Mail has the best spam protection ar= ound=20
http://mail.yahoo.com
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This message has been scanned fo= r=20 viruses and
dangerous content by MailScanner, and = is=20
believed to be clean.


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dangerous content by MailScanner, and is
belie= ved to=20 be clean.


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belie= ved to=20 be clean.


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believed to be clean.


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--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------=_NextPart_000_0008_01C81A35.97996320-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 14 Nov 2007 11:57:33 +0530 From: "Sudarshan H N" Subject: [IBIS-Users] S2IBIS3 Queries - ------=_Part_27377_2028470.1195021653124 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Hello, I downloaded new s2ibis3 from the site http://www.ece.ncsu.edu/erl/ibis/s2ibis3/s2ibis3.htm and tried using it. I was able generate IBIS models with the example given in that link. But i am not able to generate separate IBIS models for the spice models . While providing input to *.s2i file i have the following queries. 1. If the IO spice netlist contains all the IO pad netlists in a single file , how to give the only those IO pad names that i wish to model it. 2. In the process model file, if all the typical, min and max corner definitions are present in a single file, how do we separately mention process models for each corner. eg: .lib '/home/sudarshann/ibis/S2IBIS/new/tsl018.lib' ff_hv for fast corner .lib '/home/sudarshann/ibis/S2IBIS/new/tsl018.lib' ss_hv for slow corner How can i achieve such kind of constructs in S2IBIS setup file . 3. How can i mention the separate voltage levels for each pin. For example how can i specify , say 1.2V on Input and enable pins and 3.3V on PAD pins. Let me know your answers. Regards Sudarshan - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_Part_27377_2028470.1195021653124 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Hello,

I downloaded new s2ibis3 from the site http://www.ece.ncsu.edu/erl/ibis/s2ibis3/s2ibis3.htm and tried using it.

I was able generate IBIS models with the example given in that link. But i am not able to generate separate IBIS models for the spice models . While providing input to *.s2i file i have the following queries.

  1. If the IO spice netlist contains all the IO pad netlists in a single file , how to give the only those IO pad names that i wish to model it.
  2. In the process model file, if all the typical, min and max corner definitions are present in a single file, how do we separately mention process models for each corner.
          eg: .lib  '/home/sudarshann/ibis/S2IBIS/new/tsl018.lib' ff_hv   for fast corner
                .lib  '/home/sudarshann/ibis/S2IBIS/new/tsl018.lib' ss_hv for slow corner
 
           How can i achieve such kind of constructs in S2IBIS setup file .
     3.  How can i mention the separate voltage levels for each pin. For example how can i specify , say 1.2V on Input and enable pins and 3.3V on PAD pins.

Let me know your answers.

Regards
Sudarshan

--
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------=_Part_27377_2028470.1195021653124-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 19 Nov 2007 10:53:19 +0530 From: "Sudarshan H N" Subject: Re: [IBIS-Users] S2IBIS3 Queries - ------=_Part_19237_25449568.1195449799757 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Hi Fabio, I will show you a sample spice netlist i have. .SUBCKT pc3b01_p PAD I OEN CIN .. .. .. .ENDS .SUBCKT pc3b01d_p PAD I OEN CIN .. .. .. .ENDS With this example, suppose if i want to model only pc3b01_p, then how can i give this in the setup file. Since the pins are common to both the models how S2IBIS distinguishes between 2 models and how it will select the correct one. ? As per the tools and scripts i have written, i will always search for the particular spice netlist with .SUBCKT option and then use that model . But i am not sure how S2IBIS is doing it . Can you explain me ? Regards Sudarshan On Nov 16, 2007 2:37 PM, Fabio BRINA wrote: > Hello Sudarshan, > > I don't studied the java script. But I send you a .spi file > generated by S2ibis3, where you can see how work the > tool: > > from this file it extract Power Clamp (typical). > > firstly you can see the netlist (.subckt INVBH2, CLPDPTT, ESDINTT etc.) > secondly the models (.model DPPNWR etc : these are Eldo models) > finally you find the NET added from the tool, voltage source VOUTS2I, > VCLMPS2I etc, > connected to the pin you are considering ( OEIN in this case ) > > If you have many .subckts inside the same file, I think you > have also a top netlist were you can identify univocally the Pins. > > > Regards, > Fabio Brina > > > > > Sudarshan H N wrote: > > Hi Fabio, > > Regarding the first question, my doubt was , if we have many IO pad > netlists in a single file, how to give the names of those pads which we want > to model it. Normally the spice netlists start with .SUBCKT structure. So i > expected S2IBIS to search for this keyword and select the appropriate spice > model. But i didnt find any such statement in the java scripts which will > search for the netlists. How does S2IBIS identify different pad names ? > > Regards > Sudarshan > > On Nov 14, 2007 8:02 PM, Fabio BRINA wrote: > > > > > Hi Sudarshan, > > > > 1. The only pads that will be modeled are those included in the [Pin] > > section: > > > > [Pin] > > > > VDD VDD VDD POWER > > VGND VGND VGND GND > > EN1 EN1 EN1 mod_en > > IN1 IN1 IN1 mod_in > > OUT OUT OUT mod_out > > -> IN1 EN1 > > > > In this case only OUT , EN1 and IN1 will be modeled; > > obviously the other pad have to be fixed in the right level, with > > specific voltage source inside the netlist. > > > > 2. You have to separate the corners in three files, and insert them in > > the following specification: > > > > [Model file] corners_typ corners_min corners_max > > > > > > 3. You can consider each pin for time. Or you can fix the [Voltage > > Range ] under the [model] > > associated to your pad pin. as you can read in s2ibis3.txt file. > > > > > > I hope this helpful for your work. > > > > Regards, > > > > Fabio Brina > > > > > > > > > > Sudarshan H N wrote: > > > > Hello, > > > > I downloaded new s2ibis3 from the site > > http://www.ece.ncsu.edu/erl/ibis/s2ibis3/s2ibis3.htm and tried using it. > > > > I was able generate IBIS models with the example given in that link. But > > i am not able to generate separate IBIS models for the spice models . While > > providing input to *.s2i file i have the following queries. > > > > > > 1. If the IO spice netlist contains all the IO pad netlists in a > > single file , how to give the only those IO pad names that i wish to model > > it. > > 2. In the process model file, if all the typical, min and max > > corner definitions are present in a single file, how do we separately > > mention process models for each corner. > > > > eg: .lib '/home/sudarshann/ibis/S2IBIS/new/tsl018.lib' > > ff_hv for fast corner > > .lib '/home/sudarshann/ibis/S2IBIS/new/tsl018.lib' > > ss_hv for slow corner > > > > How can i achieve such kind of constructs in S2IBIS setup > > file . > > 3. How can i mention the separate voltage levels for each pin. For > > example how can i specify , say 1.2V on Input and enable pins and 3.3Von PAD pins. > > > > Let me know your answers. > > > > Regards > > Sudarshan > > > > -- > > This message has been scanned for viruses and > > dangerous content by *MailScanner* , and > > is > > believed to be clean. > > > > > > > > > *Typ power clamp curve for model mod_dir > *Spice Deck created by S2IBIS3 Version 1.1 > *North Carolina State University > *-------------------------------------------------------------------- > *-------------------------------------------------------------------- > ****** The NETLIST ******* > *-------------------------- > .GLOBAL GNDE > + GND > + VDD > *-------------------------------------------------------------------- > *-------------------------------------------------------------------- > *[?param] > *-------------------------------------------------------------------- > *-------------------------------------------------------------------- > .OPTION XA = 9.750000e-07 > *-------------------------------------------------------------------- > *-------------------------------------------------------------------- > .SUBCKT INVBH2 A Y > MM10 Y A GND GND EN3 W=3.5u L=5u AD=3.4125e-12 AS=3.4125e-12 > +PD=5.45e-06 PS=5.45e-06 M=1 > MM19 Y VDD NET24 NET24 EP3 W=10u L=0.45u AD=3.51e-10 AS=3.51e-10 > +PD=0.00036195 PS=0.00036195 M=1 > MM11 Y A NET24 NET24 EP3 W=5u L=1u AD=5.85e-12 AS=5.85e-12 PD=7.95e-06 > +PS=7.95e-06 M=1 > MM9 NET24 Y VDD NET24 EP3 W=310u L=0.35u AD=3.51e-10 AS=3.51e-10 > +PD=0.00036195 PS=0.00036195 M=1 > .ENDS INVBH2 > *-------------------------------------------------------------------- > *-------------------------------------------------------------------- > .SUBCKT CLPDPTT INOUT > MM41 INOUT NET64 GNDE GNDE EN3 W=74.6u L=0.4u AD=7.2735e-11 > +AS=7.2735e-11 PD=7.655e-05 PS=7.655e-05 M=1 > MM28 INOUT NET68 GNDE GNDE EN3 W=74.6u L=0.4u AD=7.2735e-11 > +AS=7.2735e-11 PD=7.655e-05 PS=7.655e-05 M=1 > MM42 INOUT NET64 GNDE GNDE EN3 W=74.6u L=0.4u AD=7.2735e-11 > +AS=7.2735e-11 PD=7.655e-05 PS=7.655e-05 M=1 > MM34 INOUT NET68 GNDE GNDE EN3 W=74.6u L=0.4u AD=7.2735e-11 > +AS=7.2735e-11 PD=7.655e-05 PS=7.655e-05 M=1 > DD37 NET64 INOUT DPPNW AREA=3.3p > DD29 NET68 INOUT DPPNW AREA=3.3p > DD32 NET68 INOUT DPPNW AREA=3.3p > DD38 NET64 INOUT DPPNW AREA=3.3p > XR36 GNDE NET64 GND RPO1M1 r=3560 w=0.35e-06 nc=1 > XR30 GNDE NET68 GND RPO1M1 r=3560 w=0.35e-06 nc=1 > XR35 GNDE NET64 GND RPO1M1 r=3560 w=0.35e-06 nc=1 > XR31 GNDE NET68 GND RPO1M1 r=3560 w=0.35e-06 nc=1 > .ENDS CLPDPTT > *-------------------------------------------------------------------- > *-------------------------------------------------------------------- > .SUBCKT ESDINTT A RECIN > XR40 NET11 RECIN GND RPO1M1 r=163 w=1.9e-06 nc=2 > XR34 A NET17 GND RPO1M1 r=87 w=4.5e-06 nc=5 > XR38 NET17 NET11 GND RNDIFFM1 r=196 w=1.9e-06 nc=2 > DD4 GND NET17 DNPPSR AREA=308p PERI=36.8u > .ENDS ESDINTT > *-------------------------------------------------------------------- > *-------------------------------------------------------------------- > .SUBCKT INV A Y > MM10 Y A GND GND EN3 W=wn L=ln M=1 > MM9 Y A VDD VDD EP3 W=wp L=lp M=1 > .ENDS INV > *-------------------------------------------------------------------- > *-------------------------------------------------------------------- > .CONNECT GND GNDE > XI11 NET23 NET9 INVBH2 > XI9 OEIN CLPDPTT > XI8 OEIN NET9 ESDINTT > XI17 OEOUT NET23 INV ln=2u lp=2u wn=7u wp=13u > XI10 NET23 OEOUT INV ln=0.35u lp=0.35u wn=44u wp=90u > XI18 NET9 NET23 INV ln=0.35u lp=0.35u wn=20u wp=55u > *--------------------------------------------------------------- > * Spice Model : DPPNWR > *--------------------------------------------------------------- > *********** THE MODELS ************* > *---------------------------------------------------------------------- > * Simulator: #ELDO 4.5 > *---------------------------------------------------------------------- > * > .model DPPNWR d > + level=8 diolev=9 tnom=27 > + vr=0 cjbr=0.001329 cjsr=3.146e-10 > + cjgr=1.864e-10 jsdbr=1.9e-07 jsdsr=4.572e-14 > + jsdgr=1e-20 jsgbr=4.057e-06 jsgsr=2.782e-11 > + jsggr=4.751e-11 vdbr=0.8 vdsr=0.8 > + vdgr=0.8 pb=0.43 ps=0.33 > + pg=0.43 > *.endl DPPNWJU_typ > > *--------------------------------------------------------------- > * Spice Model : EPMM9JU > *--------------------------------------------------------------- > * > *---------------------------------------------------------------------- > * PMOS : EP (Model : MM9JU - subckt Juncap) typ > *---------------------------------------------------------------------- > * Simulator: #ELDO 4.5 > *---------------------------------------------------------------------- > .SUBCKT EPMM9JU D G S B > + param: W=10e-6 L=10e-6 nfing=1 > + wfing={w/nfing+0} > + fd={nfing-2*trunc(nfing/2)} > + fs={2-fd} > + AD={wfing*(nfing*(1.15e-06)/2+fd*(1.15e-06)/2)} > + AS={wfing*(nfing*(1.15e-06)/2+fs*(1.15e-06)/2)} > + PD={nfing*2*(1.15e-06)/2+fd*(wfing+1.15e-06)} > + PS={nfing*2*(1.15e-06)/2+fs*(wfing+1.15e-06)} > M1 D G S B EPMM9JU W=W L=L AS=AS AD=AD PS=PS PD=PD > .ENDS > > > .MODEL EPMM9JU > + pmos > + level=59 > + tox=8.2e-09 tr=27 ler=9.954e-06 > + lvar=0 lap=2.2994e-08 wer=9.8871e-06 > + wvar=0 wot=5.6447e-08 vtor=0.605 > + slvto=2.4157e-08 sl2vto=-8.8158e-15 swvto=-2.4478e-09 > + stvto=-0.00093097 betsq=4.6238e-05 etabet=1.1695 > + the1r=0.21277 slthe1r=6.6646e-08 swthe1=-1.19e-09 > + stthe1r=-0.00045468 stlthe1=-1.8179e-10 the2r=0.33738 > + slthe2r=-3.7174e-08 swthe2=1.9299e-08 stthe2r=-0.0004339 > + stlthe2=7.9686e-11 kor=0.65138 slko=-5.6962e-08 > + swko=2.1928e-08 kr=0.65138 slk=-5.6962e-08 > + swk=2.1928e-08 vsbxr=100 slvsbx=0 > + swvsbx=0 phibr=0.84764 zet1r=1.8722 > + slzet1=-1.6842e-07 etazet=1 mor=0.30905 > + slmo=8.3171e-06 stmo=0.00010119 etamr=1 > + gamoor=0.0001689 slgamoo=1.1391e-15 etagamr=1 > + vsbtr=100 slvsbt=0 gam1r=-0.0015083 > + slgam1=1.4997e-08 swgam1=8.7524e-10 etadsr=0.6 > + vpr=10.86 alpr=0.022451 slalp=8.2822e-09 > + swalp=-1.2618e-08 etaalp=1 the3r=-0.014429 > + stlthe3=-6.7464e-11 swthe3=1.9606e-09 stthe3r=2.4982e-05 > + slthe3r=7.3895e-09 a1r=3.844 sla1=2.9719e-07 > + swa1=-9.356e-09 sta1=0.015722 a2r=29.335 > + sla2=4.8732e-10 swa2=-3.0085e-10 a3r=1.1664 > + sla3=-1.0574e-07 swa3=-3.3629e-09 col=6.1e-11 > + ntr=2.2e-20 nfr=4.182e-12 > * Parameters file : diode.dds,v 1.2 1999/01/06 10:27:17 > * -- JUNCAP Electrical Parameters for S/D regions (Simulator specific) > + diolev=9 tnom=27 vr=0 > + cjbr=0.001329 cjsr=3.146e-10 cjgr=1.864e-10 > + jsdbr=1.9e-07 jsdsr=4.572e-14 jsdgr=1e-20 > + jsgbr=4.057e-06 jsgsr=2.782e-11 jsggr=4.751e-11 > + vdbr=0.8 vdsr=0.8 vdgr=0.8 > + pb=0.43 ps=0.33 pg=0.43 > + dcaplev=0 rlev=1 alev=3 > > *(1)+rsh=2.4 rs=70 rd=70 > + ldif=0 hdif=4.875e-07 > > *--------------------------------------------------------------- > * Spice Model : ENMM9JU > *--------------------------------------------------------------- > * > *.LIB ENMM9JU_typ > *---------------------------------------------------------------------- > * NMOS : EN (Model : MM9JU - subckt Juncap) typ > *---------------------------------------------------------------------- > * Simulator: #ELDO 4.5 > *---------------------------------------------------------------------- > .SUBCKT ENMM9JU D G S B > + param: W=10e-6 L=10e-6 nfing=1 > + wfing={w/nfing+0} > + fd={nfing-2*trunc(nfing/2)} > + fs={2-fd} > + AD={wfing*(nfing*(1.15e-06)/2+fd*(1.15e-06)/2)} > + AS={wfing*(nfing*(1.15e-06)/2+fs*(1.15e-06)/2)} > + PD={nfing*2*(1.15e-06)/2+fd*(wfing+1.15e-06)} > + PS={nfing*2*(1.15e-06)/2+fs*(wfing+1.15e-06)} > M1 D G S B ENMM9JU W=W L=L AS=AS AD=AD PS=PS PD=PD > .ENDS > > > .MODEL ENMM9JU > + nmos > + level=59 > + tox=7.6e-09 tr=27 ler=9.9839e-06 > + lvar=0 lap=8.045e-09 wer=9.7552e-06 > + wvar=0 wot=1.224e-07 vtor=0.635 > + slvto=7.0216e-08 sl2vto=-2.4754e-14 swvto=2.3042e-08 > + stvto=-0.00087141 betsq=0.0002259 etabet=1.6336 > + the1r=0.2364 slthe1r=1.3077e-07 swthe1=-8.2823e-08 > + stthe1r=-6.6798e-06 stlthe1=-5.1702e-10 the2r=0.15491 > + slthe2r=-2.1137e-08 swthe2=9.6765e-08 stthe2r=0.0003788 > + stlthe2=-2.1968e-11 kor=0.536 slko=-7.6164e-08 > + swko=2.7463e-08 kr=0.536 slk=-7.3164e-08 > + swk=2.7463e-08 vsbxr=100 slvsbx=0 > + swvsbx=0 phibr=0.84764 zet1r=2.5785 > + slzet1=-0.00012272 etazet=0.5 mor=0.31129 > + slmo=-1.3606e-06 stmo=-0.00082026 etamr=1 > + gamoor=0.00096059 slgamoo=2.9931e-15 etagamr=1 > + vsbtr=100 slvsbt=0 gam1r=0.00063636 > + slgam1=1.2818e-08 swgam1=-4.7172e-10 etadsr=0.6 > + vpr=17.25 alpr=0.01 slalp=0 > + swalp=0 etaalp=1 the3r=-0.025862 > + stlthe3=-2.8694e-10 swthe3=-2.4e-08 stthe3r=-4.1862e-05 > + slthe3r=1.014e-07 a1r=5.5559 sla1=5.4355e-07 > + swa1=-3.3508e-07 sta1=0.0084971 a2r=20 > + sla2=0 swa2=0 a3r=1.1206 > + sla3=-1.4134e-07 swa3=-1.0882e-08 col=6.1e-11 > + ntr=2.2e-20 nfr=6.085e-12 > * Parameters file : diode.dds,v 1.2 1999/01/06 10:27:17 > * -- JUNCAP Electrical Parameters for S/D regions (Simulator specific) > + diolev=9 tnom=27 vr=0 > + cjbr=0.000933 cjsr=2.994e-10 cjgr=2.085e-10 > + jsdbr=1.295e-08 jsdsr=1e-20 jsdgr=9.999e-16 > + jsgbr=4.86e-07 jsgsr=2.4e-11 jsggr=1.8e-12 > + vdbr=0.8 vdsr=0.8 vdgr=0.8 > + pb=0.37 ps=0.21 pg=0.37 > + dcaplev=0 rlev=1 alev=3 > > *(1)+rsh=2.7 rs=48 rd=48 > + ldif=0 hdif=4.875e-07 > > *--------------------------------------------------------------- > * Spice Model : DNPPSR > *--------------------------------------------------------------- > *.model DNPPSR *BIB:HC6XXX_ELDO.DNPPSR_TYP > *{DNPPSJU_TYP} > *---------------------------------------------------------------------- > * DIODE : DNPPS (Model : Juncap) typ > *---------------------------------------------------------------------- > * Simulator: #ELDO 4.5 > *---------------------------------------------------------------------- > * > .model DNPPSR d > + level=8 diolev=9 tnom=27 > + vr=0 cjbr=0.000933 cjsr=2.994e-10 > + cjgr=2.085e-10 jsdbr=1.295e-08 jsdsr=1e-20 > + jsdgr=9.999e-16 jsgbr=4.86e-07 jsgsr=2.4e-11 > + jsggr=1.8e-12 vdbr=0.8 vdsr=0.8 > + vdgr=0.8 pb=0.37 ps=0.21 > + pg=0.37 > *.endl DNPPSJU_typ > > *--------------------------------------------------------------- > * Spice Model : RNDIFFM1 > *--------------------------------------------------------------- > *.subckt RNDIFFM1 *BIB:HC6XXX_ELDO.RNDIFFM1_TYP > *{RNDIFFM1_TYP} > *---------------------------------------------------------------------- > * RESISTOR : RNDIFF (Model : M1) typ > *---------------------------------------------------------------------- > *.lib RNDIFFM1_typ > .subckt RNDIFFM1 > + PLUS MINUS SUB param: r=0.0 w=0.8e-6 nc=1 > *---------------------------------------------------------------------- > .param rt_typ={4.5/nc+(4.5945e-05)/(w-(-0.17e-6))} > .param l={0.0e-6+(r-2*rt_typ)*(w-(-0.17e-6))/48.0} > *---------------------------------------------------------------------- > .param rt={4.5/nc+4.5945e-05/(w-(-0.17e-6))} > RES PLUS MINUS {48.0*(l-(0.0e-6))/(w-(-0.17e-6)) + 2*rt } tc=1.533e-3, > 2.023e-7 > *---------------------------------------------------------------------- > * Parameters file : diode.dds,v 1.2 1999/01/06 10:27:17 > .model DNPPS d level=8 diolev=9 tnom=27 > + vr=0 cjbr=0.000933 cjsr=2.994e-10 > + cjgr=2.085e-10 jsdbr=1.295e-08 jsdsr=1e-20 > + jsdgr=9.999e-16 jsgbr=4.86e-07 jsgsr=2.4e-11 > + jsggr=1.8e-12 vdbr=0.8 vdsr=0.8 > + vdgr=0.8 pb=0.37 ps=0.21 > + pg=0.37 > > .param lr={l+2*0.35e-6+2*0.0e-6+2*2.0e-7+2*0.4e-6} > D1 SUB PLUS DNPPS area={0.5*(w-(-0.17e-6))*lr} peri={w-(-0.17e-6)+lr} > D2 SUB MINUS DNPPS area={0.5*(w-(-0.17e-6))*lr} peri={w-(-0.17e-6)+lr} > .ends RNDIFFM1 > *.endl RNDIFFM1_typ > > *--------------------------------------------------------------- > * Spice Model : RPO1M1 > *--------------------------------------------------------------- > *.subckt RPO1M1 *BIB:HC6XXX_ELDO.RPO1M1_TYP > *{RPO1M1_TYP} > *---------------------------------------------------------------------- > * RESISTOR : RPO1 (Model : M1) typ > *---------------------------------------------------------------------- > .subckt RPO1M1 > + PLUS MINUS SUB param: r=0.0 w=0.8e-6 nc=1 > *---------------------------------------------------------------------- > .param rt_typ={5.5/nc+(5.577e-05)/(w-(0.02e-6))} > .param l={0.0e-6+(r-2*rt_typ)*(w-(0.02e-6))/133.0} > *---------------------------------------------------------------------- > .param rt={5.5/nc+5.577e-05/(w-(0.02e-6))} > Rres PLUS MINUS {133.0*(l-(0.0e-6))/(w-(0.02e-6)) + 2*rt } tc=-4.50e-4, > 1.450e-6 > *---------------------------------------------------------------------- > .param lr={l+2*0.35e-6+2*0.0e-6+2*2.0e-7+2*0.4e-6} > C1 PLUS SUB {8.21e-5*0.5*(w-(0.02e-6))*lr+2.26e-11*(w-(0.02e-6)+lr)} > C2 MINUS SUB {8.21e-5*0.5*(w-(0.02e-6))*lr+2.26e-11*(w-(0.02e-6)+lr)} > .ends RPO1M1 > *.endl RPO1M1_typ > > *--------------------------------------------------------------- > * Spice Model : DPPNW > *--------------------------------------------------------------- > *.model DPPNW *BIB:HC6XXX_ELDO.DPPNW_TYP > *{DPPNWJU_TYP} > *---------------------------------------------------------------------- > * DIODE : DPPNW (Model : Juncap) typ > *---------------------------------------------------------------------- > * Simulator: #ELDO 4.5 > *---------------------------------------------------------------------- > * > .model DPPNW d > + level=8 diolev=9 tnom=27 > + vr=0 cjbr=0.001329 cjsr=3.146e-10 > + cjgr=1.864e-10 jsdbr=1.9e-07 jsdsr=4.572e-14 > + jsdgr=1e-20 jsgbr=4.057e-06 jsgsr=2.782e-11 > + jsggr=4.751e-11 vdbr=0.8 vdsr=0.8 > + vdgr=0.8 pb=0.43 ps=0.33 > + pg=0.43 > *.endl DPPNWJU_typ > > *--------------------------------------------------------------- > * Spice Model : EP3 > *--------------------------------------------------------------- > *{EPMM9_TYP} > * > .MODEL EP3 pmos > *---------------------------------------------------------------------- > * Family pmos Model EP mm9 typ > *---------------------------------------------------------------------- > + level=59 > + tox=8.2e-09 tr=27 ler=9.954e-06 > + lvar=0 lap=2.2994e-08 wer=9.8871e-06 > + wvar=0 wot=5.6447e-08 vtor=0.605 > + slvto=2.4157e-08 sl2vto=-8.8158e-15 swvto=-2.4478e-09 > + stvto=-0.00093097 betsq=4.6238e-05 etabet=1.1695 > + the1r=0.21277 slthe1r=6.6646e-08 swthe1=-1.19e-09 > + stthe1r=-0.00045468 stlthe1=-1.8179e-10 the2r=0.33738 > + slthe2r=-3.7174e-08 swthe2=1.9299e-08 stthe2r=-0.0004339 > + stlthe2=7.9686e-11 kor=0.65138 slko=-5.6962e-08 > + swko=2.1928e-08 kr=0.65138 slk=-5.6962e-08 > + swk=2.1928e-08 vsbxr=100 slvsbx=0 > + swvsbx=0 phibr=0.84764 zet1r=1.8722 > + slzet1=-1.6842e-07 etazet=1 mor=0.30905 > + slmo=8.3171e-06 stmo=0.00010119 etamr=1 > + gamoor=0.0001689 slgamoo=1.1391e-15 etagamr=1 > + vsbtr=100 slvsbt=0 gam1r=-0.0015083 > + slgam1=1.4997e-08 swgam1=8.7524e-10 etadsr=0.6 > + vpr=10.86 alpr=0.022451 slalp=8.2822e-09 > + swalp=-1.2618e-08 etaalp=1 the3r=-0.014429 > + stlthe3=-6.7464e-11 swthe3=1.9606e-09 stthe3r=2.4982e-05 > + slthe3r=7.3895e-09 a1r=3.844 sla1=2.9719e-07 > + swa1=-9.356e-09 sta1=0.015722 a2r=29.335 > + sla2=4.8732e-10 swa2=-3.0085e-10 a3r=1.1664 > + sla3=-1.0574e-07 swa3=-3.3629e-09 col=6.1e-11 > + ntr=2.2e-20 nfr=4.182e-12 > * Parameters file : diode.dds,v 1.2 1999/01/06 10:27:17 > * -- JUNCAP Diode Electrical Parameters for S/D regions (Simulator > specific) > + diolev=9 tnom=27 vr=0 > + cjbr=0.001329 cjsr=3.146e-10 cjgr=1.864e-10 > + jsdbr=1.9e-07 jsdsr=4.572e-14 jsdgr=1e-20 > + jsgbr=4.057e-06 jsgsr=2.782e-11 jsggr=4.751e-11 > + vdbr=0.8 vdsr=0.8 vdgr=0.8 > + pb=0.43 ps=0.33 pg=0.43 > + dcaplev=0 rlev=1 alev=3 > > *(1)+rsh=2.4 rs=70 rd=70 > + ldif=0 hdif=4.875e-07 > *.ENDL > > *--------------------------------------------------------------- > * Spice Model : EN3 > *--------------------------------------------------------------- > *.model EN3 *BIB:HC6XXX_ELDO.EN3_TYP > *{ENMM9_TYP} > .MODEL EN3 nmos > *---------------------------------------------------------------------- > * Family nmos Model EN mm9 typ > *---------------------------------------------------------------------- > + level=59 > + tox=7.6e-09 tr=27 ler=9.9839e-06 > + lvar=0 lap=8.045e-09 wer=9.7552e-06 > + wvar=0 wot=1.224e-07 vtor=0.635 > + slvto=7.0216e-08 sl2vto=-2.4754e-14 swvto=2.3042e-08 > + stvto=-0.00087141 betsq=0.0002259 etabet=1.6336 > + the1r=0.2364 slthe1r=1.3077e-07 swthe1=-8.2823e-08 > + stthe1r=-6.6798e-06 stlthe1=-5.1702e-10 the2r=0.15491 > + slthe2r=-2.1137e-08 swthe2=9.6765e-08 stthe2r=0.0003788 > + stlthe2=-2.1968e-11 kor=0.536 slko=-7.6164e-08 > + swko=2.7463e-08 kr=0.536 slk=-7.3164e-08 > + swk=2.7463e-08 vsbxr=100 slvsbx=0 > + swvsbx=0 phibr=0.84764 zet1r=2.5785 > + slzet1=-0.00012272 etazet=0.5 mor=0.31129 > + slmo=-1.3606e-06 stmo=-0.00082026 etamr=1 > + gamoor=0.00096059 slgamoo=2.9931e-15 etagamr=1 > + vsbtr=100 slvsbt=0 gam1r=0.00063636 > + slgam1=1.2818e-08 swgam1=-4.7172e-10 etadsr=0.6 > + vpr=17.25 alpr=0.01 slalp=0 > + swalp=0 etaalp=1 the3r=-0.025862 > + stlthe3=-2.8694e-10 swthe3=-2.4e-08 stthe3r=-4.1862e-05 > + slthe3r=1.014e-07 a1r=5.5559 sla1=5.4355e-07 > + swa1=-3.3508e-07 sta1=0.0084971 a2r=20 > + sla2=0 swa2=0 a3r=1.1206 > + sla3=-1.4134e-07 swa3=-1.0882e-08 col=6.1e-11 > + ntr=2.2e-20 nfr=6.085e-12 > * Parameters file : diode.dds,v 1.2 1999/01/06 10:27:17 > * -- JUNCAP Diode Electrical Parameters for S/D regions (Simulator > specific) > + diolev=9 tnom=27 vr=0 > + cjbr=0.000933 cjsr=2.994e-10 cjgr=2.085e-10 > + jsdbr=1.295e-08 jsdsr=1e-20 jsdgr=9.999e-16 > + jsgbr=4.86e-07 jsgsr=2.4e-11 jsggr=1.8e-12 > + vdbr=0.8 vdsr=0.8 vdgr=0.8 > + pb=0.37 ps=0.21 pg=0.37 > + dcaplev=0 rlev=1 alev=3 > > *(1)+rsh=2.7 rs=48 rd=48 > + ldif=0 hdif=4.875e-07 > *.ENDL > > *** > *** ADDING NET (from S2ibis3) > *** > > VOUTS2I OEIN 0 DC 0.0 > > VCLMPS2I VDDE 0 DC 3.0 > VGCLMPS2I GNDE 0 DC 0.0 > > > .TEMP 27.0 > > > .DC VOUTS2I 3.0 6.0 0.04 > .PRINT DC I(VOUTS2I) > > .END > > > - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_Part_19237_25449568.1195449799757 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Hi Fabio,

I will show you a sample spice netlist i have.

.SUBCKT pc3b01_p   PAD I OEN CIN
..
..
..
.ENDS
.SUBCKT pc3b01d_p   PAD I OEN CIN
..
..
..
.ENDS

With this example, suppose if i want to model only pc3b01_p, then how can i give this in the setup file. Since the pins are common to both the models how S2IBIS distinguishes between 2 models and how it will select the correct one.  ?

As per the tools and scripts i have written,  i will always search for the particular spice netlist with .SUBCKT option and then use that model . But i am not sure how S2IBIS is doing it .
Can you explain me ?

Regards
Sudarshan

On Nov 16, 2007 2:37 PM, Fabio BRINA <fabio.brina@st.com> wrote:
Hello Sudarshan,

I don't studied the java script. But I send you a  .spi file
generated by S2ibis3,  where you can see how work the
tool:

from this file it extract Power Clamp (typical).

firstly you can see the netlist (.subckt INVBH2, CLPDPTT, ESDINTT etc.)
secondly the models (.model DPPNWR etc : these are Eldo models)
finally you find the NET added from the tool,  voltage source  VOUTS2I,  VCLMPS2I etc,
connected to the pin you are considering ( OEIN in this case )

If you have many  .subckts  inside the same file, I think you
have also a top netlist were you can identify univocally the Pins.


Regards,
Fabio Brina




Sudarshan H N wrote:
Hi Fabio,

Regarding the first question, my doubt was , if we have many IO pad netlists in a single file, how to give the names of those pads which we want to model it. Normally the spice netlists start with .SUBCKT structure. So i expected S2IBIS to search for this keyword and select the appropriate spice model. But i didnt find any such statement in the java scripts which will search for the netlists. How does S2IBIS identify different pad names ?

Regards
Sudarshan

On Nov 14, 2007 8:02 PM, Fabio BRINA <fabio.brina@st.com> wrote:

Hi Sudarshan,

1. The only pads that will be modeled are those included in the [Pin] section:

[Pin]

VDD      VDD     VDD       POWER
VGND   VGND  VGND    GND
EN1        EN1       EN1       mod_en
IN1         IN1         IN1        mod_in
OUT       OUT       OUT      mod_out
->  IN1    EN1

In this case only OUT , EN1 and IN1 will be modeled;
obviously the other pad have to be fixed in the right level, with specific voltage source inside the netlist.

2. You have to separate the corners in three files, and insert them in the following specification:

[Model file]    corners_typ     corners_min    corners_max


3. You can consider each pin for time.  Or you can fix the [Voltage Range ] under the [model]
    associated to your pad pin. as you can read in  s2ibis3.txt  file.


I hope this  helpful for  your work.

Regards,

Fabio Brina




Sudarshan H N wrote:
Hello,

I downloaded new s2ibis3 from the site http://www.ece.ncsu.edu/erl/ibis/s2ibis3/s2ibis3.htm and tried using it.

I was able generate IBIS models with the example given in that link. But i am not able to generate separate IBIS models for the spice models . While providing input to *.s2i file i have the following queries.

  1. If the IO spice netlist contains all the IO pad netlists in a single file , how to give the only those IO pad names that i wish to model it.
  2. In the process model file, if all the typical, min and max corner definitions are present in a single file, how do we separately mention process models for each corner.
          eg: .lib  '/home/sudarshann/ibis/S2IBIS/new/tsl018.lib' ff_hv   for fast corner
                .lib  '/home/sudarshann/ibis/S2IBIS/new/tsl018.lib' ss_hv for slow corner
 
           How can i achieve such kind of constructs in S2IBIS setup file .
     3.  How can i mention the separate voltage levels for each pin. For example how can i specify , say 1.2V on Input and enable pins and 3.3V on PAD pins.

Let me know your answers.

Regards
Sudarshan

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*Typ power clamp curve for model mod_dir
*Spice Deck created by S2IBIS3 Version 1.1
*North Carolina State University
*--------------------------------------------------------------------
*--------------------------------------------------------------------
****** The  NETLIST *******
*--------------------------
.GLOBAL GNDE
+ GND
+ VDD
*--------------------------------------------------------------------
*--------------------------------------------------------------------
*[?param]
*--------------------------------------------------------------------
*--------------------------------------------------------------------
.OPTION XA = 9.750000e-07
*--------------------------------------------------------------------
*--------------------------------------------------------------------
.SUBCKT INVBH2 A Y
MM10 Y A GND GND EN3 W=3.5u L=5u AD=3.4125e-12 AS=3.4125e-12
+PD=5.45e-06 PS=5.45e-06 M=1
MM19 Y VDD NET24 NET24 EP3 W=10u L= 0.45u AD=3.51e-10 AS=3.51e-10
+PD=0.00036195 PS=0.00036195 M=1
MM11 Y A NET24 NET24 EP3 W=5u L=1u AD=5.85e-12 AS=5.85e-12 PD=7.95e-06
+PS=7.95e-06 M=1
MM9 NET24 Y VDD NET24 EP3 W=310u L=0.35u AD=3.51e-10 AS=3.51e-10
+PD=0.00036195 PS=0.00036195 M=1
.ENDS INVBH2
*--------------------------------------------------------------------
*--------------------------------------------------------------------
.SUBCKT CLPDPTT INOUT
MM41 INOUT NET64 GNDE GNDE EN3 W=74.6u L=0.4u AD=7.2735e-11
+AS=7.2735e-11 PD=7.655e-05 PS=7.655e-05 M=1
MM28 INOUT NET68 GNDE GNDE EN3 W=74.6u L=0.4u AD=7.2735e-11
+AS=7.2735e-11 PD=7.655e-05 PS=7.655e-05 M=1
MM42 INOUT NET64 GNDE GNDE EN3 W=74.6u L=0.4u AD=7.2735e-11
+AS=7.2735e-11 PD=7.655e-05 PS=7.655e-05 M=1
MM34 INOUT NET68 GNDE GNDE EN3 W=74.6u L=0.4u AD=7.2735e-11
+AS=7.2735e-11 PD=7.655e-05 PS=7.655e-05 M=1
DD37 NET64 INOUT DPPNW AREA=3.3p
DD29 NET68 INOUT DPPNW AREA=3.3p
DD32 NET68 INOUT DPPNW AREA=3.3p
DD38 NET64 INOUT DPPNW AREA=3.3p
XR36 GNDE NET64 GND RPO1M1 r=3560 w=0.35e-06 nc=1
XR30 GNDE NET68 GND RPO1M1 r=3560 w= 0.35e-06 nc=1
XR35 GNDE NET64 GND RPO1M1 r=3560 w=0.35e-06 nc=1
XR31 GNDE NET68 GND RPO1M1 r=3560 w=0.35e-06 nc=1
.ENDS CLPDPTT
*--------------------------------------------------------------------
*--------------------------------------------------------------------
.SUBCKT ESDINTT A RECIN
XR40 NET11 RECIN GND RPO1M1 r=163 w=1.9e-06 nc=2
XR34 A NET17 GND RPO1M1 r=87 w=4.5e-06 nc=5
XR38 NET17 NET11 GND RNDIFFM1 r=196 w=1.9e-06 nc=2
DD4 GND NET17 DNPPSR AREA=308p PERI=36.8u
.ENDS ESDINTT
*--------------------------------------------------------------------
*--------------------------------------------------------------------
.SUBCKT INV A Y
MM10 Y A GND GND EN3 W=wn L=ln M=1
MM9 Y A VDD VDD EP3 W=wp L=lp M=1
.ENDS INV
*--------------------------------------------------------------------
*--------------------------------------------------------------------
.CONNECT  GND  GNDE
XI11  NET23 NET9 INVBH2
XI9  OEIN CLPDPTT
XI8  OEIN NET9 ESDINTT
XI17  OEOUT NET23 INV ln=2u lp=2u wn=7u wp=13u
XI10  NET23 OEOUT INV ln=0.35u lp=0.35u wn=44u wp=90u
XI18  NET9 NET23 INV ln=0.35u lp=0.35u wn=20u wp=55u
*---------------------------------------------------------------
* Spice Model : DPPNWR
*---------------------------------------------------------------
*********** THE MODELS *************
*----------------------------------------------------------------------
* Simulator:  #ELDO 4.5
*----------------------------------------------------------------------
*
.model  DPPNWR d
+ level=8               diolev=9               tnom=27
+ vr=0                  cjbr=0.001329         cjsr=3.146e-10
+ cjgr=1.864e-10         jsdbr=1.9e-07         jsdsr=4.572e-14
+ jsdgr=1e-20           jsgbr=4.057e-06       jsgsr=2.782e-11
+ jsggr=4.751e-11        vdbr=0.8              vdsr=0.8
+ vdgr=0.8              pb= 0.43               ps=0.33
+ pg=0.43
*.endl DPPNWJU_typ

*---------------------------------------------------------------
* Spice Model : EPMM9JU
*---------------------------------------------------------------
*
*----------------------------------------------------------------------
* PMOS : EP  (Model : MM9JU - subckt Juncap)  typ
*----------------------------------------------------------------------
* Simulator:  #ELDO 4.5
*----------------------------------------------------------------------
.SUBCKT  EPMM9JU D G S B
+       param: W=10e-6 L=10e-6 nfing=1
+       wfing={w/nfing+0}
+       fd={nfing-2*trunc(nfing/2)}
+       fs={2-fd}
+       AD={wfing*(nfing*(1.15e-06)/2+fd*(1.15e-06)/2)}
+       AS={wfing*(nfing*(1.15e-06)/2+fs*(1.15e-06)/2)}
+       PD={nfing*2*(1.15e-06)/2+fd*(wfing+1.15e-06)}
+       PS={nfing*2*(1.15e-06)/2+fs*(wfing+1.15e-06)}
M1 D G S B EPMM9JU W=W L=L AS=AS AD=AD PS=PS PD=PD
.ENDS


.MODEL EPMM9JU
+ pmos
+ level=59
+ tox=8.2e-09           tr=27                 ler=9.954e-06
+ lvar=0                lap=2.2994e-08        wer= 9.8871e-06
+ wvar=0                wot=5.6447e-08        vtor=0.605
+ slvto=2.4157e-08      sl2vto=-8.8158e-15    swvto=-2.4478e-09
+ stvto=-0.00093097     betsq=4.6238e-05      etabet=1.1695
+ the1r=0.21277         slthe1r= 6.6646e-08    swthe1=-1.19e-09
+ stthe1r=-0.00045468   stlthe1=-1.8179e-10   the2r=0.33738
+ slthe2r=-3.7174e-08   swthe2=1.9299e-08     stthe2r=-0.0004339
+ stlthe2=7.9686e-11    kor=0.65138           slko=-5.6962e-08
+ swko=2.1928e-08       kr=0.65138            slk=-5.6962e-08
+ swk=2.1928e-08        vsbxr=100             slvsbx=0
+ swvsbx=0              phibr=0.84764         zet1r=1.8722
+ slzet1=-1.6842e-07    etazet=1              mor= 0.30905
+ slmo=8.3171e-06       stmo=0.00010119       etamr=1
+ gamoor=0.0001689      slgamoo=1.1391e-15    etagamr=1
+ vsbtr=100             slvsbt=0              gam1r=-0.0015083
+ slgam1=1.4997e-08     swgam1= 8.7524e-10     etadsr=0.6
+ vpr=10.86             alpr=0.022451         slalp=8.2822e-09
+ swalp=-1.2618e-08     etaalp=1              the3r=-0.014429
+ stlthe3=-6.7464e-11   swthe3=1.9606e-09     stthe3r=2.4982e-05
+ slthe3r=7.3895e-09    a1r=3.844             sla1=2.9719e-07
+ swa1=-9.356e-09       sta1=0.015722         a2r=29.335
+ sla2=4.8732e-10       swa2=-3.0085e-10      a3r=1.1664
+ sla3=-1.0574e-07      swa3=-3.3629e-09      col=6.1e-11
+ ntr=2.2e-20           nfr=4.182e-12
* Parameters file : diode.dds,v 1.2 1999/01/06 10:27:17
* -- JUNCAP Electrical Parameters for S/D regions  (Simulator specific)
+ diolev=9              tnom=27               vr=0
+ cjbr=0.001329         cjsr=3.146e-10        cjgr=1.864e-10
+  jsdbr=1.9e-07         jsdsr=4.572e-14       jsdgr=1e-20
+ jsgbr=4.057e-06       jsgsr=2.782e-11       jsggr=4.751e-11
+  vdbr=0.8              vdsr= 0.8              vdgr=0.8
+ pb=0.43               ps=0.33               pg=0.43
+  dcaplev=0             rlev=1                alev=3

*(1)+rsh=2.4               rs=70                 rd=70
+ ldif=0                hdif= 4.875e-07

*---------------------------------------------------------------
* Spice Model : ENMM9JU
*---------------------------------------------------------------
*
*.LIB ENMM9JU_typ
*----------------------------------------------------------------------
* NMOS : EN  (Model : MM9JU - subckt Juncap)  typ
*----------------------------------------------------------------------
* Simulator:  #ELDO 4.5
*----------------------------------------------------------------------
.SUBCKT  ENMM9JU D G S B
+       param: W=10e-6 L=10e-6 nfing=1
+       wfing={w/nfing+0}
+       fd={nfing-2*trunc(nfing/2)}
+       fs={2-fd}
+       AD={wfing*(nfing*(1.15e-06)/2+fd*(1.15e-06)/2)}
+       AS={wfing*(nfing*(1.15e-06)/2+fs*(1.15e-06)/2)}
+       PD={nfing*2*(1.15e-06)/2+fd*(wfing+1.15e-06)}
+       PS={nfing*2*(1.15e-06)/2+fs*(wfing+1.15e-06)}
M1 D G S B ENMM9JU W=W L=L AS=AS AD=AD PS=PS PD=PD
.ENDS


.MODEL ENMM9JU
+ nmos
+  level=59
+ tox=7.6e-09           tr=27                 ler=9.9839e-06
+ lvar=0                lap=8.045e-09         wer=9.7552e-06
+ wvar=0                wot=1.224e-07         vtor=0.635
+ slvto=7.0216e-08      sl2vto=-2.4754e-14    swvto=2.3042e-08
+ stvto=-0.00087141     betsq=0.0002259       etabet=1.6336
+ the1r=0.2364          slthe1r=1.3077e-07    swthe1=-8.2823e-08
+ stthe1r=- 6.6798e-06   stlthe1=-5.1702e-10   the2r=0.15491
+ slthe2r=-2.1137e-08   swthe2=9.6765e-08     stthe2r=0.0003788
+ stlthe2=-2.1968e-11   kor=0.536             slko=-7.6164e-08
+ swko=2.7463e-08       kr=0.536              slk=- 7.3164e-08
+ swk=2.7463e-08        vsbxr=100             slvsbx=0
+ swvsbx=0              phibr=0.84764         zet1r=2.5785
+ slzet1=-0.00012272    etazet=0.5            mor=0.31129
+ slmo=-1.3606e-06      stmo=- 0.00082026      etamr=1
+ gamoor=0.00096059     slgamoo=2.9931e-15    etagamr=1
+ vsbtr=100             slvsbt=0              gam1r=0.00063636
+ slgam1=1.2818e-08     swgam1=-4.7172e-10    etadsr=0.6
+ vpr=17.25             alpr=0.01             slalp=0
+ swalp=0               etaalp=1              the3r=-0.025862
+ stlthe3=-2.8694e-10   swthe3=-2.4e-08       stthe3r=-4.1862e-05
+ slthe3r=1.014e-07     a1r=5.5559            sla1= 5.4355e-07
+ swa1=-3.3508e-07      sta1=0.0084971        a2r=20
+ sla2=0                swa2=0                a3r=1.1206
+ sla3=-1.4134e-07      swa3=-1.0882e-08      col=6.1e-11
+ ntr=2.2e-20           nfr=6.085e-12
* Parameters file : diode.dds,v 1.2 1999/01/06 10:27:17
* -- JUNCAP Electrical Parameters for S/D regions  (Simulator specific)
+ diolev=9              tnom=27               vr=0
+ cjbr=0.000933         cjsr= 2.994e-10        cjgr=2.085e-10
+  jsdbr=1.295e-08       jsdsr=1e-20           jsdgr=9.999e-16
+ jsgbr=4.86e-07        jsgsr=2.4e-11         jsggr=1.8e-12
+  vdbr=0.8              vdsr=0.8              vdgr=0.8
+ pb=0.37               ps=0.21               pg=0.37
+  dcaplev=0             rlev=1                alev=3

*(1)+rsh=2.7               rs=48                 rd=48
+ ldif=0                hdif=4.875e-07

*---------------------------------------------------------------
* Spice Model : DNPPSR
*---------------------------------------------------------------
*.model DNPPSR *BIB:HC6XXX_ELDO.DNPPSR_TYP
*{DNPPSJU_TYP}
*----------------------------------------------------------------------
* DIODE : DNPPS (Model : Juncap) typ
*----------------------------------------------------------------------
* Simulator:  #ELDO 4.5
*----------------------------------------------------------------------
*
.model  DNPPSR d
+ level=8               diolev=9               tnom=27
+ vr=0                  cjbr=0.000933         cjsr=2.994e-10
+ cjgr=2.085e-10         jsdbr=1.295e-08       jsdsr=1e-20
+ jsdgr=9.999e-16       jsgbr=4.86e-07        jsgsr=2.4e-11
+ jsggr=1.8e-12          vdbr=0.8              vdsr=0.8
+ vdgr=0.8              pb=0.37               ps= 0.21
+ pg=0.37
*.endl DNPPSJU_typ

*---------------------------------------------------------------
* Spice Model : RNDIFFM1
*---------------------------------------------------------------
*.subckt RNDIFFM1 *BIB:HC6XXX_ELDO.RNDIFFM1_TYP
*{RNDIFFM1_TYP}
*----------------------------------------------------------------------
* RESISTOR  : RNDIFF   (Model : M1) typ
*----------------------------------------------------------------------
*.lib RNDIFFM1_typ
.subckt  RNDIFFM1
+ PLUS MINUS SUB  param: r=0.0 w=0.8e-6 nc=1
*----------------------------------------------------------------------
.param rt_typ={4.5/nc+(4.5945e-05)/(w-(-0.17e-6))}
.param l={0.0e-6+(r-2*rt_typ)*(w-(- 0.17e-6))/48.0}
*----------------------------------------------------------------------
.param rt={4.5/nc+4.5945e-05/(w-(-0.17e-6))}
RES  PLUS MINUS  {48.0*(l-(0.0e-6))/(w-(-0.17e-6)) + 2*rt } tc=1.533e-3,2.023e-7
*----------------------------------------------------------------------
* Parameters file : diode.dds,v 1.2 1999/01/06 10:27:17
.model DNPPS d level=8               diolev=9              tnom=27
+ vr=0                  cjbr= 0.000933         cjsr=2.994e-10
+ cjgr=2.085e-10         jsdbr=1.295e-08       jsdsr=1e-20
+ jsdgr=9.999e-16       jsgbr=4.86e-07        jsgsr=2.4e-11
+ jsggr=1.8e-12          vdbr=0.8              vdsr=0.8
+ vdgr= 0.8              pb=0.37               ps=0.21
+ pg=0.37

.param lr={l+2*0.35e-6+2*0.0e-6+2*2.0e-7+2*0.4e-6}
D1  SUB PLUS  DNPPS area={0.5*(w-(-0.17e-6))*lr} peri={w-(-0.17e-6)+lr}
D2  SUB MINUS  DNPPS area={ 0.5*(w-(-0.17e-6))*lr} peri={w-(-0.17e-6)+lr}
.ends RNDIFFM1
*.endl RNDIFFM1_typ

*---------------------------------------------------------------
* Spice Model : RPO1M1
*---------------------------------------------------------------
*.subckt RPO1M1 *BIB:HC6XXX_ELDO.RPO1M1_TYP
*{RPO1M1_TYP}
*----------------------------------------------------------------------
* RESISTOR  : RPO1   (Model : M1) typ
*----------------------------------------------------------------------
.subckt  RPO1M1
+ PLUS MINUS SUB  param: r=0.0 w=0.8e-6 nc=1
*----------------------------------------------------------------------
.param rt_typ={5.5/nc+(5.577e-05)/(w-(0.02e-6))}
.param l={0.0e-6+(r-2*rt_typ)*(w-( 0.02e-6))/133.0}
*----------------------------------------------------------------------
.param rt={5.5/nc+5.577e-05/(w-(0.02e-6))}
Rres  PLUS MINUS  {133.0*(l-(0.0e-6))/(w-(0.02e-6)) + 2*rt } tc=-4.50e-4,1.450e-6
*----------------------------------------------------------------------
.param lr={l+2*0.35e-6+2*0.0e-6+2*2.0e-7+2*0.4e-6}
C1  PLUS SUB  {8.21e-5*0.5*(w-(0.02e-6))*lr+2.26e-11*(w-(0.02e-6)+lr)}
C2  MINUS SUB  { 8.21e-5*0.5*(w-(0.02e-6))*lr+2.26e-11*(w-(0.02e-6)+lr)}
.ends RPO1M1
*.endl RPO1M1_typ

*---------------------------------------------------------------
* Spice Model : DPPNW
*---------------------------------------------------------------
*.model DPPNW *BIB:HC6XXX_ELDO.DPPNW_TYP
*{DPPNWJU_TYP}
*----------------------------------------------------------------------
* DIODE : DPPNW (Model : Juncap) typ
*----------------------------------------------------------------------
* Simulator:  #ELDO 4.5
*----------------------------------------------------------------------
*
.model  DPPNW d
+ level=8               diolev=9               tnom=27
+ vr=0                  cjbr=0.001329         cjsr=3.146e-10
+ cjgr=1.864e-10         jsdbr=1.9e-07         jsdsr=4.572e-14
+ jsdgr=1e-20           jsgbr=4.057e-06       jsgsr=2.782e-11
+ jsggr=4.751e-11        vdbr=0.8              vdsr=0.8
+ vdgr= 0.8              pb=0.43               ps=0.33
+ pg=0.43
*.endl DPPNWJU_typ

*---------------------------------------------------------------
* Spice Model : EP3
*---------------------------------------------------------------
*{EPMM9_TYP}
*
.MODEL  EP3 pmos
*----------------------------------------------------------------------
* Family pmos Model EP mm9 typ
*----------------------------------------------------------------------
+ level=59
+  tox=8.2e-09           tr=27                 ler=9.954e-06
+ lvar=0                lap=2.2994e-08        wer=9.8871e-06
+ wvar=0                wot=5.6447e-08        vtor=0.605
+ slvto=2.4157e-08      sl2vto=-8.8158e-15    swvto=-2.4478e-09
+ stvto=-0.00093097     betsq=4.6238e-05      etabet=1.1695
+ the1r=0.21277         slthe1r=6.6646e-08    swthe1=-1.19e-09
+ stthe1r=-0.00045468   stlthe1=-1.8179e-10   the2r=0.33738
+ slthe2r=-3.7174e-08   swthe2=1.9299e-08     stthe2r=-0.0004339
+ stlthe2=7.9686e-11    kor=0.65138           slko=-5.6962e-08
+ swko=2.1928e-08       kr=0.65138            slk=-5.6962e-08
+ swk= 2.1928e-08        vsbxr=100             slvsbx=0
+ swvsbx=0              phibr=0.84764         zet1r=1.8722
+ slzet1=-1.6842e-07    etazet=1              mor=0.30905
+ slmo=8.3171e-06       stmo=0.00010119       etamr=1
+ gamoor=0.0001689      slgamoo=1.1391e-15    etagamr=1
+ vsbtr=100             slvsbt=0              gam1r=-0.0015083
+ slgam1=1.4997e-08     swgam1=8.7524e-10     etadsr=0.6
+ vpr=10.86             alpr=0.022451         slalp=8.2822e-09
+ swalp=-1.2618e-08     etaalp=1              the3r=-0.014429
+ stlthe3=-6.7464e-11   swthe3=1.9606e-09     stthe3r=2.4982e-05
+ slthe3r=7.3895e-09    a1r=3.844             sla1=2.9719e-07
+ swa1=-9.356e-09       sta1=0.015722         a2r=29.335
+ sla2=4.8732e-10       swa2=-3.0085e-10      a3r=1.1664
+ sla3=-1.0574e-07      swa3=-3.3629e-09      col=6.1e-11
+ ntr=2.2e-20           nfr=4.182e-12
* Parameters file : diode.dds,v 1.2 1999/01/06 10:27:17
* -- JUNCAP Diode Electrical Parameters for S/D regions  (Simulator specific)
+ diolev=9              tnom=27               vr=0
+ cjbr=0.001329         cjsr= 3.146e-10        cjgr=1.864e-10
+  jsdbr=1.9e-07         jsdsr=4.572e-14       jsdgr=1e-20
+ jsgbr=4.057e-06       jsgsr=2.782e-11       jsggr=4.751e-11
+  vdbr=0.8              vdsr=0.8              vdgr=0.8
+ pb=0.43               ps=0.33               pg=0.43
+  dcaplev=0             rlev=1                alev=3

*(1)+rsh=2.4               rs=70                 rd=70
+ ldif=0                hdif=4.875e-07
*.ENDL

*---------------------------------------------------------------
* Spice Model : EN3
*---------------------------------------------------------------
*.model EN3 *BIB:HC6XXX_ELDO.EN3_TYP
*{ENMM9_TYP}
.MODEL  EN3 nmos
*----------------------------------------------------------------------
* Family nmos Model EN mm9 typ
*----------------------------------------------------------------------
+ level=59
+  tox= 7.6e-09           tr=27                 ler=9.9839e-06
+ lvar=0                lap=8.045e-09         wer=9.7552e-06
+ wvar=0                wot=1.224e-07         vtor=0.635
+ slvto=7.0216e-08      sl2vto=-2.4754e-14    swvto=2.3042e-08
+ stvto=-0.00087141     betsq=0.0002259       etabet=1.6336
+ the1r=0.2364          slthe1r=1.3077e-07    swthe1=-8.2823e-08
+ stthe1r=-6.6798e-06   stlthe1=-5.1702e-10   the2r=0.15491
+ slthe2r=- 2.1137e-08   swthe2=9.6765e-08     stthe2r=0.0003788
+ stlthe2=-2.1968e-11   kor=0.536             slko=-7.6164e-08
+ swko=2.7463e-08       kr=0.536              slk=-7.3164e-08
+ swk=2.7463e-08        vsbxr=100             slvsbx=0
+ swvsbx=0              phibr=0.84764         zet1r=2.5785
+ slzet1=-0.00012272    etazet=0.5            mor=0.31129
+ slmo=-1.3606e-06      stmo=-0.00082026      etamr=1
+ gamoor=0.00096059     slgamoo=2.9931e-15    etagamr=1
+ vsbtr=100             slvsbt=0              gam1r=0.00063636
+ slgam1=1.2818e-08     swgam1=-4.7172e-10    etadsr=0.6
+ vpr=17.25             alpr=0.01             slalp=0
+ swalp=0               etaalp=1              the3r=- 0.025862
+ stlthe3=-2.8694e-10   swthe3=-2.4e-08       stthe3r=-4.1862e-05
+ slthe3r=1.014e-07     a1r=5.5559            sla1=5.4355e-07
+ swa1=-3.3508e-07      sta1=0.0084971        a2r=20
+ sla2=0                swa2=0                a3r= 1.1206
+ sla3=-1.4134e-07      swa3=-1.0882e-08      col=6.1e-11
+ ntr=2.2e-20           nfr=6.085e-12
* Parameters file : diode.dds,v 1.2 1999/01/06 10:27:17
* -- JUNCAP Diode Electrical Parameters for S/D regions  (Simulator specific)
+ diolev=9              tnom=27               vr=0
+ cjbr=0.000933         cjsr=2.994e-10        cjgr=2.085e-10
+  jsdbr=1.295e-08       jsdsr=1e-20           jsdgr=9.999e-16
+ jsgbr=4.86e-07        jsgsr=2.4e-11         jsggr=1.8e-12
+  vdbr=0.8              vdsr=0.8              vdgr=0.8
+ pb=0.37               ps=0.21               pg=0.37
+  dcaplev=0             rlev=1                alev=3

*(1)+rsh=2.7               rs=48                 rd=48
+ ldif=0                hdif=4.875e-07
*.ENDL

***
*** ADDING NET (from S2ibis3)
***

VOUTS2I OEIN 0 DC 0.0

VCLMPS2I VDDE 0  DC 3.0
VGCLMPS2I GNDE 0  DC 0.0


.TEMP 27.0


.DC VOUTS2I 3.0 6.0 0.04
.PRINT DC I(VOUTS2I)

.END




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