on pg. 29. I hope this helps.<= /DIV>

Arpad

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

From: owner-ibis-users@server.eda.org= =20 [mailto:owner-ibis-users@server.eda.org] On Behalf Of Anshul=20 Bansal
Sent: Tuesday, November 04, 2008 10:45 AM
To:=20 ibis-users@server.eda.org
Subject: Re: [IBIS-Users] Rising fallin= g=20 waveform timestep

Hello All,

Thanks to everyone for replying to my previous= post=20 on the usage of unequal timesteps for rising/falling waveform. I understand= that=20 usage of unequal timesteps is preferred in most cases. What I wanted to kno= w now=20 is that is there an automated method/program/scripts that exists that most= =20 people use in creation of the rising/falling waveforms with unequal=20 timesteps?

We at Cypress Semiconductor have come up with a methodolo= gy=20 for creation of rising/falling waveforms with unequal timesteps and I was= =20 thinking of submitting a paper for the Asian IBIS Summit at Japan. Before I= do=20 so, I wanted to know what other methods do people use.

Any help woul= d be=20 greatly appreciated.

Thanks,

Anshul

al davis wrote:=20

On Monday 27 October 2008, Anshul Bansal wrote:

I had a question regarding the t=
imesteps for the
rising/falling waveform. Is it legal to use unequal timestep
for the rising or falling waveforms?=20


The use of unequal timestep is preferred.  You should use more=20
points where they are needed to express detail and less points=20
in relatively flat sections.

It actually makes a difference.  If your data looks like steps,=20
with groups of consecutive values that are the same, you are=20
using too many steps.  It does matter.

You may not see a problem because files like that are common so=20
simulators will drop steps to make the waveform smooth and=20
simulateable.

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be= lieved=20 to be clean.=20 - -------------------------------------------------------------------- |For h= elp=20 or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the approp= riate=20 command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users |=20 unsubscribe ibis | unsubscribe ibis-= users=20 | |or e-mail a request to=20 ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | |=20 http://www.eda-stds.org/pub/ibis/email_archive/ Recent |=20 http://www.eda-stds.org/pub/ibis/users_archive/ Recent |=20 http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993
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This message has been scanned for viruses and
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believed to be clean. - ------_=_NextPart_001_01C93EA0.0DB40CA2-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 06 Nov 2008 10:42:30 -0600 From: Anshul Bansal Subject: [IBIS-Users] IBIS model co-relation with extracted netlist/silicon data Hello All, I wanted to know as to what kind of co-relation results are acceptable between IBIS model and the extracted netlist/silicon data. Is there a specific percentage delta between them that is recommended by the IBIS spec (if so, can you point me where to find it)? What do the IBIS model creators usually do if the co-relation does not meet the acceptable limits? What kind of updates are made to the rising/falling/clamp/pu/pd curves to make the model fit the co-relation? Any help would be greatly appreciated. Thanks, Anshul - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 6 Nov 2008 17:37:46 -0700 From: "Mirmak, Michael" Subject: [IBIS-Users] Asian IBIS Summit (Japan) - Agenda To IBIS Summit Japan Attendees: Please find below an Agenda for our IBIS Summit program on November 14. Today (November 7) is the registration deadline. If you would still like to register, please provide: Name: E-mail address: Company: Top-level Web Link: Country: Telephone: Send to BOTH: Bob ROSS, Teraspeed Consulting Group bob@teraspeed.com Kazuyoshi SHOJI, Hitachi ULSI Systems kazuyoshi.shohji.aj@hitachi.com We look forward to seeing you at the meeting. Michael Mirmak Intel Corporation Takeshi Watanabe NEC Electronics Corporation - ------------------------------------------------------------------ S U M M I T I N F O R M A T I O N Time/Date: 9:00 - 17:00, Friday November 14, 2008 Location: JEITA Headquarters (New Location) Chiyoda First Bldg. South Wing, 3-2-1 Nishi-Kanda, Chiyoda-ku Tokyo, 101-0065 JAPAN http://www.jeita.or.jp/english/about/location/index.htm Registration: FREE, send to both addresses below: Name: E-mail address: Company: Telephone: Bob ROSS, Teraspeed Consulting Group bob@teraspeed.com Kazuyoshi SHOJI, Hitachi ULSI Systems kazuyoshi.shohji.aj@hitachi.com Organizational Sponsors: Japan Electronics and Information Technology Industries Association (JEITA) EIA IBIS Open Forum Co-Sponsors: (in alphabetical order) Agilent Technologies Ansoft ATE Service Corporation (Sigrity) Cadence Cybernet Systems Fujitsu Zuken - ------------------------------------------------------------------ I B I S S U M M I T M E E T I N G A G E N D A 09:00 REFRESHMENTS & SIGN IN - Vendor Tables Open 09:30 General Announcement Shoji, Kazuyoshi (Hitachi ULSI Systems, JAPAN) 09:35 Meeting Welcome Watanabe, Takashi (NEC Electronics Corp. and JEITA, Japan) Mirmak, Michael (Intel Corporation, USA) 09:45 Japan IBIS Activities Update Shoji, Kazuyoshi (Hitachi ULSI Systems, Japan) 09:55 Micron's IBIS Model Quality Process Wolff, Randy (Micron Technology, USA) 10:25 IBIS Quality Activities in JEITA EDA WG Hamaji, Yoshihiro (Toshiba I.S. Corporation, Japan) 10:50 BREAK (Refreshments) - Vendor Tables 11:10 Look into IBIS Buffer Curves Wang, Lance (IO Methodology, USA) 11:35 Easy Use of IBIS Model with Simulation Kit Matsuzawa, Hirohiko (Zuken, Japan) 12:05 New Table-based Keywords in IBIS 5.0, A Cookbook-style Guide Mirmak, Michael (Intel Corporation, USA) 12:30 FREE BUFFET LUNCH (Hosted by Sponsors) - Vendor Tables 13:15 Touchstone 2.0 Mixed-Mode Syntax - Updated Ross, Bob (Teraspeed Consulting Group, USA) 13:45 IBIS EBD Modeling, Usage and Enhancement, An Example of Memory Channel Multi-board Simulation Xu, Tao (Sigrity, China) [Presented by Honda, Yutaka (ATE Service Corporation (Sigrity), Japan] 14:15 De-emphasis Buffer Modeling Issues with IBIS Rao, Nanditha (Intel Corporation, India) 14:45 Eye Masks in IBIS Meng, YuBao (Cadence Design Systems, China) [Presented by Masuko, Yukio (Cadence Design Systems, Japan)] 15:05 BREAK (Refreshments) - Vendor Tables 15:35 System-level Serial Link Analysis using IBIS-AMI Models Westerhoff, Todd (Signal Integrity Software (SiSoft), USA) [Presented by Wang, Lance (IO Methodology, USA)] 16:05 Noise Countermeasure Design Technology for Signal and Power Integrity Sato, Toshiro (Fujitsu Advanced Technology, Japan) 16:35 Open Discussions 16:55 Concluding Items 17:00 END OF MEETING (POST-SUMMIT REFRESHMENTS) - ------------------------------------------------------------------ - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 17 Nov 2008 12:49:06 -0700 From: "Mirmak, Michael" Subject: [IBIS-Users] Asian IBIS Summit presentations available! Last week's Asian IBIS Summits in Shanghai and Tokyo were a great success. Many thanks to the sponsors, presenters and attendees! The presentation materials from both events have been made available on-line, through the link below (the page permits sorting by author, organization and title as well): http://www.eda.org/pub/ibis/summits/index-bydate.htm - - Michael Mirmak Intel Corp. Chair, IBIS Open Forum http://www.eigroup.org/ibis/ http://www.eda.org/ibis/ - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 20 Nov 2008 20:58:41 -0800 From: dsravi Subject: [IBIS-Users] Query on S2IBIS3 This is a multi-part message in MIME format. - --------------000007000202090701080007 Content-Type: multipart/alternative; boundary="------------080002060709040906040800" - --------------080002060709040906040800 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit Hi S2IBIS users, While running s2ibis3 (linux version) in the batch mode, execution stops during convergence issue, until we enter "y" or "n". Would you like to specifiy a different sweep range? [y/n] Let me know is there any possiblity to come out automatically without asking anything.(atleast timeout feature) at this utility. Thanks, Ravi - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - --------------080002060709040906040800 Content-Type: text/html; charset=us-ascii Content-Transfer-Encoding: 7bit Hi S2IBIS users,

While running s2ibis3 (linux version) in the batch mode, execution stops during convergence issue, until we enter "y" or "n".
Would you like to specifiy a different sweep range? [y/n]
Let me know is there any possiblity to come out automatically without asking anything.(atleast timeout feature) at this utility.

Thanks,
Ravi

--
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believed to be clean. - --------------080002060709040906040800-- - --------------000007000202090701080007 Content-Type: text/x-vcard; charset=utf-8; name="dsravi.vcf" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="dsravi.vcf" begin:vcard fn:Ravi Kumar DS n:Kumar DS;Ravi org:Qualcore logic adr:Habsiguda;;7-145, new nagendra nagar, ;Hyderabad;Andhra Pradesh;500007;India email;internet:dsravi@qualcorelogic.com title:MTS engineer tel;work:91-40-27174437 tel;cell:91-9010180599 version:2.1 end:vcard - --------------000007000202090701080007-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 21 Nov 2008 14:05:10 +0100 From: rene voshol Subject: [IBIS-Users] Analog switches in IBIS - --_000_72177CB2DD50B04FA58D9CDA6AC5968E038A6B5724eu1rdcrdc1wx0_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Hi All, I have questions regarding two issues with analog switches in IBIS. 1. C_comp I usually describe a switch with a Terminator model for the clamping behavi= or of the pin, and a Series_switch model for the actual switch current tabl= es. The Switch model is then selected via the [Series Pin Mapping] and [Ser= ies Switch Groups] sections. Both models must have a C_comp defined. I assume the C_comp represents the ON capacitance of the switch. Is this co= rrect? What C_comp will be used by the simulator? (Does the value in the Series_sw= itch model replace the one in the Terminator model?) What if I have an asymmetrical switch? In this case there will be different= models with different C_comp values for the switch, but what about the C_c= omp value in the Terminator model? 2. [Series Pin Mapping] This describes which pins are connected to the switch. What if I have two p= ackages, one with a flipped die. In this case the pin mapping changes. Is there a nice way of combining this in one model? Or should I make separa= te models for each package? Kind Regards, Ren=E9 Voshol - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - --_000_72177CB2DD50B04FA58D9CDA6AC5968E038A6B5724eu1rdcrdc1wx0_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

Hi All,

I have questions regarding two issues with analog swit= ches in IBIS.

1.&n= bsp; C_comp

I usually describe a switch= with a Terminator model for the clamping behavior of the pin, and a Series_switch model for the actual switch current tables. The Switch model is then select= ed via the [Series Pin Mapping] and [Series Switch Groups] sections. Both mode= ls must have a C_comp defined.

I assume the C_comp represe= nts the ON capacitance of the switch. Is this correct?

What C_comp will be used by= the simulator? (Does the value in the Series_switch model replace the one in the Terminator model?)

What if I have an asymmetri= cal switch? In this case there will be different models with different C_comp values for the switch, but what about the C_comp value in the Terminator mo= del?

2.&n= bsp; [Series Pin Mapping]

This describes which pins a= re connected to the switch. What if I have two packages, one with a flipped di= e. In this case the pin mapping changes.

Is there a nice way of comb= ining this in one model? Or should I make separate models for each package?<= /o:p>

Kind Regards,

Ren=E9 Voshol

--=20
This message has been scanned for viruses and
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believed to be clean. - --_000_72177CB2DD50B04FA58D9CDA6AC5968E038A6B5724eu1rdcrdc1wx0_-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 21 Nov 2008 20:54:18 +0530 (IST) From: Canes Venatici Subject: [IBIS-Users] {Disarmed} Re: [SI-LIST] Re: IBIS model doubt - --0-2051318845-1227281058=:86043 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Hi all, Please see=C2=A0the=C2=A0Q&A mail thread I had with Arpad, related to IBIS = models. May be helpful to someone in future. Regards, Canes ________________________________ From: "Muranyi, Arpad" To: Canes Venatici Sent: Thursday, 20 November, 2008 11:40:36 AM Subject: RE: [SI-LIST] Re: IBIS model doubt =EF=BB=BF=20 Canes, =C2=A0 The general rule is that R_fixture should be close to the impedance of the T-line that the buffer is designed to drive.=C2=A0 However, V_fixture has an effect also on the accuracy.=C2=A0 You can see a few waveforms in one of my presentations: =C2=A0 http://www.vhdl.org/pub/ibis/summits/sep01/muranyi1.pdf =C2=A0 The conclusions don't say this, but looking at the waveforms carefully, it seems that selecting V_fixture values so that the signal and its termination in the simulation is between the two V_fixture values usually gives better results. =C2=A0 A solution to this problem could be the usage of more than two waveform per output transistor, as shown in=20 the second part of this presentation (pg. 14 and on): =C2=A0http://www.vhdl..org/pub/ibis/summits/jun03b/muranyi1.pdf=20 =C2=A0 =C2=A0 But not too many simulators support more than four V-t curves per buffer. =C2=A0 I hope this helps. =C2=A0 Arpad =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D ________________________________ ________________________________ From: Canes Venatici To: "Muranyi, Arpad" Sent: Friday, 7 November, 2008 10:16:05 AM Subject: Re: [SI-LIST] Re: IBIS model doubt Thanks Arpad for your replies.. My simple question is does/how the accuracy of IBIS models depends upon r_fixture/v_fixture values? In otherway how can we select these values for a particular interface? For e.g you were saying for DDR2 interface it=C2=A0will be=C2=A0an accurate= model to connect vfixture to vdd/2 if similar termination is provided outside also. Does it mean the model wou= ld be accurate if the board interface (for. e.g termination values, vref, rtermination) pa= rameters are incorporated into fixture values? Please explain. Regards, Canes ________________________________ From: "Muranyi, Arpad" To: Canes Venatici Sent: Wednesday, 5 November, 2008 11:51:31 AM Subject: RE: [SI-LIST] Re: IBIS model doubt =EF=BB=BF=20 Canes, =C2=A0 No one knows what exactly the algorithms are in the tools you mentioned, because the EDA vendors are not making it public.=C2=A0 However, if you looked at the waveforms in that presentation you will see a close match between my VHDL-AMS implementation and HSPICE (even in the area where they are not matching the SPICE transistor model's waveforms) which could mean that the algorithms may be the same or similar. =C2=A0 I am not sure what "cancellation" you are talking about, but after the V-t tables have been converted to K-t tables, there is no more need for the fixture values.=C2=A0 The K-t tables are triggered at an event (the stimulus going high or low) and the K-t tables simply multiply the I-V tables with respect to time. That's all there is to it... =C2=A0 Arpad =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D ________________________________ From: Canes Venatici [mailto:starsilic@yahoo.com]=20 Sent: Wednesday, October 29, 2008 7:01 AM To: Muranyi, Arpad Subject: Re: [SI-LIST] Re: IBIS model doubt Arpad, I feel I am slightly unclear with the fixture.=C2=A0Can I say, the values o= f=C2=A0Kpd(t) and Kpu(t) will be=C2=A0independent=C2=A0of fixture values? The reason for this questi= on is, in that case (yes)=C2=A0the=20 fixture values=C2=A0will be=C2=A0effectively canceled by the intrepreter.. =C2=A0 Combined with V-I, V-T and Kpx(t) the waveforms can be generated (by the in= trepreter)=C2=A0 which will=C2=A0model the IO close to spice accuracy. Am I right?=C2=A0 =C2=A0 Do you have any documents on how IBIS model is intrepreted (how algorithms= =C2=A0intreprets various keywords)=C2=A0by=20 intrepreters (HSPICE/hyperlynx)?=20 =C2=A0 Thanks and Regards, Canes ________________________________ From: "Muranyi, Arpad" To: Canes Venatici Sent: Friday, 24 October, 2008 11:16:51 PM Subject: RE: [SI-LIST] Re: IBIS model doubt =EF=BB=BF=20 Canes, =C2=A0 1)=C2=A0 I would suggest that you look at the following presentation to understand the reason for V_fixture and R_fixture: =C2=A0 http://www.vhdl.org/pub/ibis/summits/jun03b/muranyi1.pdf =C2=A0 Pg. 5 shows you the basic algorithm for an IBIS buffer model using two rising and two falling waveforms.=C2=A0 If you had no V_fixture and=20 R_fixture, you wouldn't' be able to calculate the output current=20 with respect to time for describing the transient behavior (i..e. the switching characteristics) of a buffer.The I-V curves alone would only tell you what the buffer does when it is fully on high or low, but they don;t tell you how to get there when it switches high-to-low or low-to-high.=C2=A0 This is what the V-t curves help us to figure out based on the equations shown on pg. 5. =C2=A0 2)=C2=A0 This is for generating the correct waveforms when the buffer is switching.=C2=A0 The timing aspects are quite different from the V_fixture and R_fixture numbers.=C2=A0 The other IBIS parameters, like Rload, Vload, Cload, Vmeas are telling the tool how to measure timing on the waveforms which were obtained in the simulation. These parameters do not get used in the buffer's algorithms for waveform generation, these are only used for using the correct loading conditions to get a time point where the Tco was evaluated for the buffer, and to start the timing measurement from that point to where the waveform crosses the thresholds at the receiver. =C2=A0 I hope this will help you to understand these parameters. =C2=A0 Arpad =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D ________________________________ From: Canes Venatici [mailto:starsilic@yahoo.com]=20 Sent: Thursday, October 23, 2008 8:10 AM To: Muranyi, Arpad Subject: Re: [SI-LIST] Re: IBIS model doubt Arpad, Thanks for your reply. For the time-being I am replying to you only to avoi= d=C2=A0huge number of=C2=A0"out-of-office" replies. I will put across the threads into si-list=C2=A0at the end of our discussio= n. I have seen your IBIS class_2003 documents/ videos and trying to get a clear-cut understanding of IBIS models. Even I h= ave sent=C2=A0a mail to your intel address=20 and it got bounced back. Fortunately you replied and I am able to get your = great help. Please see the inscribed queries to make sure the right back-ground is set = for my questions. ________________________________ From: "Muranyi, Arpad" To: si-list@freelists.org Sent: Wednesday, 22 October, 2008 10:47:19 PM Subject: [SI-LIST] Re: IBIS model doubt 1) The main reason=C2=A0for=C2=A0using=C2=A0the fixtures is to guarantee th= e maximun timing numbers=20 mentioned=C2=A0on the data-sheet.=C2=A0This number=C2=A0will be reflected i= n the model if we use the=20 same fixtures (as mentioned in data-sheet)=C2=A0while creating the IBIS. We= can=C2=A0create IBIS=20 at=C2=A00pF/0ohms/0v (fixtures) also but this may not give the worst case t= iming numbers as=20 reported in the data-sheet.=C2=A0 Is my understanding=C2=A0right? 2) If I use the fixtures while creating the IBIS models, the V-T curves may= represent the worst case numbers directly. Any other loading (while SPICE=C2=A0simulating= IBIS + interface) may=20 give numbers worse than worst case numbers mentioned in IBIS.=20 Under this conditions will it be correctly representing the system? 3) If I do a simulation (for=C2=A0calculating delay/SI effects)=C2=A0with S= PICE using the IBIS model + external interface,=20 the spice-engine will use only V-I tables (which=C2=A0was not using=C2=A0an= y loads while getting created) and not ramp data/rising/falling waveform. Am I correct? 4) If point.3 is correct,=C2=A0why the V-T tables are required?=20 If 'not correct' how the=C2=A0spice engine (while SPICE=C2=A0simulating IBI= S + interface)=C2=A0may remove the=20 fixture values and extract the timing data from IBIS so that only external = interfacing effects=20 on timing can be simulated? - --- Rest assured that a model generated under a specific set of conditions will work reasonably well under other conditions, but even if you have concerns about that, the IBIS specification does have provisions for providing V-t tables, for example at multiple sets of V_fixture=20 and R_fixture conditions.=C2=A0 And if this is still not enough, you can always make multiple IBIS models and use the [Model Selector] keyword to allow the user to switch between them. But you cannot make a (behavioral) model without any load. How would you obtain Vmeas, for example?=C2=A0 Or how would the internal algorithm of an IBIS tool determine what the output current was when the V-t curves were generated if there was no V_fixture and R_fixture connected to the output? - --- Canes:=20 If I=C2=A0switch an=C2=A0unloaded IO (Cload =3D 0pF) which will=C2=A0have s= ome intrinsic parasitic load=20 (factored in C_Comp) I can still get V-T curve. For Vmeas, I can specify=C2= =A0as per the standard (for e.g in LVCMOS=C2=A0I will say V(typ/min/max)/2:=C2=A0= in SSTL anyway its there in receiver spec vin(ach/l)). In otherway: I have got an IBIS model for an IO generated with v_fixture and r_fixture. = Now,=20 if I use this in my spice deck with external interface (terminations) I am = afraid I am using two terminations (one is from fixture and other from external termina= tion I am adding to the IBIS model in the spice deck). If the spice engine uses only = V-I curves while intrepreting IBIS, double counting may not occur.. If so why V-T curv= es are needed? Please clarify me=C2=A0if I am completely misunderstood. - --- I hope this helps to clarify your concern. Arpad =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=20 Regards, Canes - -----Original Message----- From: si-list-bounce@freelists.org [mailto:si-list-bounce@freelists.org] On Behalf Of Canes Venatici Sent: Friday, October 17, 2008 12:52 AM To: si-list@freelists.org Subject: [SI-LIST] IBIS model doubt Hi all, I haveA some doubts regarding the usage of IBIS models. In the IBIS model, 1. Ramp measurement is done with a default value of 50ohms (R_load)A connected to vref. 2. Also Rising/Falling waveformsA can beA simulated/measured with R_/L_/C_fixture/V_fixture. 3. Cref and RrefA=C2=A0 for specifying the way delay was measured by the manufacturer. With the above informationA incorporated in the IBIS file, if used for simulating will it be correctly representing the I/O? For e.g. with R_/L_/C_fixture/V_fixture/R_load effects included in the waveform data, if I make=20 some externalA terminations, it is in addition to the R_fixture/R_load and may not correctly represent the system. Instead, whyA don't we have only the un-loaded I/O bufferA modeled in the IBIS so that the designer who is using IBIS can put appropriate interface and do the simulations. Regards, Canes =C2=A0 =C2=A0 =C2=A0 Add more friends to your messenger and enjoy! Go to http://messenger.yahoo.com/invite/ - ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@freelists.org with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: http://www..freelists.org/webpage/si-list For help: si-list-request@freelists.org with 'help' in the Subject field List technical documents are available at: =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 http://www.si-list.= .net List archives are viewable at:=C2=A0 =C2=A0=20 =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 http://www.freelists.org/archives/si-= list or at our remote archives: =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 http://groups.yahoo.com/group/si-list= /messages Old (prior to June 6, 2001) list archives are viewable at: =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 http://www.qsl.net/wb6tpu =C2=A0=20 - ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@freelists.org with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: http://www..freelists.org/webpage/si-list For help: si-list-request@freelists.org with 'help' in the Subject field List technical documents are available at: =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 http://www.si-list.= net List archives are viewable at:=C2=A0 =C2=A0=20 =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 http://www.freelists.org/archives/si-= list or at our remote archives: =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 http://groups.yahoo.com/group/si-list= /messages Old (prior to June 6, 2001) list archives are viewable at: =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 http://www.qsl.net/wb6tpu =C2=A0=20 Canes, All of those parameters you mention are informational, that is, they do not directly influence or describe the behavior of the model.=C2=A0 They describe at what condition the data was generated, or at what conditions certain timing parameters were obtained. - --- Canes:=20 ________________________________ Unlimited freedom, unlimited storage. Get it now ________________________________ Add more friends to your messenger and enjoy! Invite them now. ________________________________ Add more friends to your messenger and enjoy! Invite them now. Be the first one to try the new Messenger 9 Beta! Go to http://in.mes= senger.yahoo.com/win/ - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - --0-2051318845-1227281058=:86043 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: quoted-printable

Hi all,

Please see the Q&A mail thread I had with Arpad, related= to IBIS models.

May be helpful to someone in future.

Regards,

Canes

From: "Muranyi, Arpad" <= Arpad_Muranyi@mentor.com>
To: Canes Venatici <starsilic@yahoo.com>
Sent: Thursday, 20 November, 2008 11:40:36 AMSubject: RE: [SI-LIST] Re= : IBIS model doubt

=EF=BB=BF=20

Canes,

The general rule is that R_fixture should be close to=

the impedance of the T-line that the buffer is design= ed

to drive. However, V_fixture has an effect also= on

the accuracy. You can see a few waveforms in on= e of

my presentations:

http://www.vh= dl.org/pub/ibis/summits/sep01/muranyi1.pdf

The conclusions don't say this, but looking at the

waveforms carefully, it seems that selecting V_fixtur= e

values so that the signal and its termination in the<= /FONT>

simulation is between the two V_fixture values usuall= y

gives better results.

A solution to this problem could be the usage of more=

than two waveform per output transistor, as shown in =

the second part of this presentation (pg. 14 and on):=

http://www.vhdl.org/pub/i= bis/summits/jun03b/muranyi1.pdf=20

But not too many simulators support more than four

V-t curves per buffer.

I hope this helps..

Arpad

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

From: Canes Venatici <st= arsilic@yahoo.com>
To: "Muranyi, Arpad" <Arpad_Muranyi@mentor.com>
Sent: Friday, 7 November, 2008 10:16:05 AM
<= B>Subject: Re: [SI-LIST] Re: I= BIS model doubt

Thanks Arpad for your replies.

My simple question is does/how the accuracy of IBIS models

depends upon r_fixture/v_fixture values?

In otherway how can we select these values for a particular interface?=

For e.g you were saying for DDR2 interface it will be an acc= urate model to connect vfixture to vdd/2

if similar termination is provided outside also. Does it mean the mode= l would be accurate

if the board interface (for. e.g termination values, vref, rterminatio= n) parameters are incorporated into fixture

values?

Please explain.

Regards,

Canes

From: "Muranyi, Arpad" <= Arpad_Muranyi@mentor.com>
To: Canes Venatici <starsilic@yahoo.com>
Sent: Wednesday, 5 November, 2008 11:51:31 AMSubject: RE: [SI-LIST] Re= : IBIS model doubt

=EF=BB=BF=20

Canes,

No one knows what exactly the algorithms are <= /SPAN>= in the

tools you mentioned, because the EDA vendors = are not

making it public. However, if you looke= d at the

waveforms in that presentation you will see a= close

match = between my VHDL-AMS implementation and = HSPICE

(even in the area where they are not matching the

SPICE transistor model's waveforms) w= hich could

mean that the algorithms may be the same or similar.

I am not sure what "cancellation" you are talking

about, but after the V-t tables have been converted

to K-t tables, there is no more need for the fixture<= /FONT>

values. The K-t tables are triggered at an even= t

(the stimulus going high or low) and the K-t tables

simply multiply the I-V tables with respect to time.<= /FONT>

That's all there is to it...

Arpad

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

From: Canes Venatici [mailto:starsilic@= yahoo.com]
Sent: Wednesday, October 29, 2008 7:01 AM
To: Muranyi, Arpad
Subject: Re: [SI-LIST] Re: IBIS model doubt
=

Arpad,

I feel I am slightly unclear with the fix= ture. Can I say, the values of Kpd(t) and Kpu(t)

will be independent of fixture va= lues? The reason for this question is, = in that case (yes) the

fixture values will be effectivel= y canceled by the intrepreter.

=

Combined with V-I, V-T and Kpx(t) the wavef= orms can be generated (by the intrepreter)

which will model the IO close to spice accuracy. Am I right?

Do you have any documents on how IBIS model= is intrepreted (how algorithms intreprets various keywords) by <= /FONT>

intrepreters (HSPICE/hyperlynx)?

Thanks and Regards,

Canes

From: "Muranyi, Arpad" <Arpad_Muranyi@mentor.com>To: Canes Venatici <st= arsilic@yahoo.com>
Sent:<= /B> Friday, 24 October, 2008 11:16:51 PM
Subject: RE: [SI-LIST] Re: IBIS model doubt

=EF=BB=BF

Canes,

1) I would suggest that you look at the fo= llowing presentation

to understand the reason for V_fixture and R_fix= ture:

MailScanner has detected a possible fraud attempt from "www..vhdl.org" cla= iming to be http://www.vhdl.org/pub/ibis/summits/jun03b/muranyi1= .pdf

Pg. 5 shows you the basic algorithm for an IBIS = buffer model using

two rising and two falling waveforms. If y= ou had no V_fixture and=20
R_fixture, you wouldn't' be able to calculate the out= put current

with respect to time for describing the transient beh= avior (i.e.

the switching characteristics) of a buffer. The I-V curves alone

would only tell you what the buffer does= when it is fully on high

or low, but they don;t tell you how to get there= when it switches

high-to-low or low-to-high. This is what t= he V-t curves help us

to figure out based on the equations shown on pg= . 5.

2) This is for generating the correct wave= forms when the buffer

is switching. The timing aspects are quite= different from the

V_fixture and R_fixture numbers. The other= IBIS parameters, like

Rload, Vload, Cload, Vmeas are telling the tool = how to measure

timing on the waveforms which were obtained in t= he simulation.

These parameters do not get used in the buffer's= algorithms

for waveform generation, these are only used for= using the

correct loading conditions to get a time point w= here the Tco

was evaluated for the buffer, and to start the t= iming measurement

from that point to where the waveform crosses th= e thresholds

at the receiver.

I hope this will help you to understand these pa= rameters.

Arpad

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D

From: Canes Venatici [mailto:starsilic@= yahoo.com]
Sent: Thursday, October 23, 2008 8:10 AM
To: Muranyi, Arpad
Subject: Re: [SI-LIST] Re: IBIS model doubt
<= /FONT>

Arpad,

Thanks for your reply. For the time-being I am replying to you only to= avoid huge number of "out-of-office" replies.

I will put across the threads into si-list at the end of our disc= ussion. I have seen your IBIS class_2003 documents/

videos and trying to get a clear-cut understanding of IBIS models. Eve= n I have sent a mail to your intel address

and it got bounced back. Fortunately you replied and I am able to get = your great help.

Please see the inscribed queries to make sure the right back-ground is= set for my questions.

From: "Muranyi, Arpad"= <Arpad_Muranyi@mentor.com>
T= o: si-list@freelists.org
Sent: Wednesday, 22 October, 2008 10:47:19 PM
Subject: [SI-LIST] Re: IBIS model doubt
Canes,

All of those parameters you mention are informat= ional,
that is, they do not directly influence or describe the
behavi= or of the model. They describe at what condition
the data was gene= rated, or at what conditions certain
timing parameters were obtained.---
Canes:

1) The main reason for using the fixtures is to guarant= ee the maximun timing numbers

mentioned on the data-sheet. This number will be reflec= ted in the model if we use the

same fixtures (as mentioned in data-sheet) while creating the IBI= S. We can create IBIS

at 0pF/0ohms/0v (fixtures) also but this may not give the worst c= ase timing numbers as

reported in the data-sheet.

Is my understanding right?

2) If I use the fixtures while creating the IBIS models, the V-T curve= s may represent the

worst case numbers directly. Any other loading (while SPICE simul= ating IBIS + interface) may

give numbers worse than worst case numbers mentioned in IBIS.

Under this conditions will it be correctly representing the system?

3) If I do a simulation (for calculating delay/SI effects) w= ith SPICE using the IBIS model + external interface,

the spice-engine will use only V-I tables (which was not using&nb= sp;any loads while getting created) and not

ramp data/rising/falling waveform.

Am I correct?

4) If point.3 is correct, why the V-T tables are required?

If 'not correct' how the spice engine (while SPICE simulatin= g IBIS + interface) may remove the

fixture values and extract the timing data from IBIS so that only exte= rnal interfacing effects

on timing can be simulated?

---

Rest assured that a model generated under a specific
set of conditi= ons will work reasonably well under other
conditions, but even if you ha= ve concerns about that,
the IBIS specification does have provisions for = providing
V-t tables, for example at multiple sets of V_fixture
and = R_fixture conditions. And if this is still not
enough, you can alw= ays make multiple IBIS models and
use the [Model Selector] keyword to al= low the user to
switch between them.

But you cannot make a (behav= ioral) model without any load.
How would you obtain Vmeas, for example?&= nbsp; Or how would the
internal algorithm of an IBIS tool determine what= the
output current was when the V-t curves were generated if
there w= as no V_fixture and R_fixture connected to the
output?

---

Canes:
If I switch an unloaded IO (Cload =3D 0pF) which = will have some intrinsic parasitic load

(factored in C_Comp) I can still get V-T curve. For Vmeas, I can speci= fy as

per the standard (for e.g in LVCMOS I will say V(typ/min/max)/2:&= nbsp; in SSTL anyway its

there in receiver spec vin(ach/l)).

In otherway:

I have got an IBIS model for an IO generated with v_fixture and r_fixt= ure. Now,

if I use this in my spice deck with external interface (terminations) = I am afraid I am

using two terminations (one is from fixture and other from external te= rmination I am

adding to the IBIS model in the spice deck). If the spice engine uses = only V-I curves

while intrepreting IBIS, double counting may not occur.. If so why V-T= curves are needed?

Please clarify me if I am completely misunderstood.

---

I hope this helps to clarify your concern.

Arpad
=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D

Regards,

Canes

-----Original Message-----
From: si-list-bounce@freelists.org [mailto:si-list-bounce@freelists.org]<= BR>On Behalf Of Canes Venatici
Sent: Friday, October 17, 2008 12:52 AMTo: si-list@freelists.org
Su= bject: [SI-LIST] IBIS model doubt

Hi all,
I haveA some doubts reg= arding the usage of IBIS models.
In the IBIS model,
1. Ramp measureme= nt is done with a default value of 50ohms (R_load)A
connected to vref.2. Also Rising/Falling waveformsA can beA simulated/measured with
R_/L= _/C_fixture/V_fixture.
3. Cref and RrefA for specifying the way de= lay was measured by the
manufacturer.

With the above informationA incorporated in= the IBIS file, if used for
simulating
will it be correctly represent= ing the I/O?
For e.g. with R_/L_/C_fixture/V_fixture/R_load effects incl= uded in the
waveform data, if I make
some externalA terminations, it= is in addition to the R_fixture/R_load
and may not correctly represent = the system.

Instead, whyA don't we have only the un-loaded I/O buffe= rA modeled in
the IBIS so that
the designer who is using IBIS can put= appropriate interface and do the
simulations.

Regards,
Canes<= BR>

Add more friends to your messenger and enjo= y! Go to
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The benefits to sponsors include recognition at the meeting and acknowledgement in the Calls for Papers and meeting minutes. =20 Your financial support strengthens the organization by allowing IBIS to focus resources on industry activities rather than raising money, and you will receive generous thanks for your support. =20 DesignCon 2009 Conference: =20 February 2 - 5, 2009 Santa Clara Convention Center Santa Clara, CA =20 http://www.designcon.com/2009/ =20 IBIS Summit participants can register at discounted rates through this link: =20 http://www.designcon.com/2009/register/ibis_reg.html =20 However, please also notify Syed Huq (huqs@cisco.com) if you are planning to attend the IBIS Summit. =20 Conference Schedule: =20 http://www.designcon.com/2009/conference/schedule.html =20 IBIS Booth: Come visit the IBIS Booth to meet attendees and pick up IBIS information. =20 =20 BACKGROUND =20 DesignCon is the premier annual Silicon Valley event for the electronic design automation (EDA) and semiconductor industry. Topics of current interest to the IBIS Open Forum are addressed at DesignCon. =20 This meeting will be conducted as a formal IBIS Summit Meeting. =20 Presentations are expected to be available and archived in an electronic format, and minutes of the meeting will be issued. Any pending formal decisions (votes) will be announced at least two weeks prior to the meeting. =20 =20 CALL FOR PARTICIPANTS =20 People involved in IBIS Model development, EDA tool development, and digital circuit design are invited to participate in the Summit meeting. If you plan to participate, please register with the information below: =20 Name: E-mail address: Company: Telephone: =20 Send to: =20 Syed Huq =20 Registration deadline is Wednesday, January 28, 2009 to receive the free lunch. =20 You can also register through the DesignCon link and also get VIP discounted rates at DesignCon. But please also notify Syed that you are registering. =20 =20 CALL FOR PRESENTATIONS =20 We are seeking presentations from individuals who have experiences of interest to the IBIS modeling community. In the past, these have included, but not limited to: =20 =20 Demonstrations of modeling techniques Explanations of behavioral algorithms Descriptions of difficulties encountered Model correlation Modeling building experiences Comparisons to other modeling methods New technologies for modeling buffers and component New technologies for modeling packaging and interconnects Algorithmic modeling topics Etc. =20 Presentations may be addressed to any and all levels of IBIS experience, from beginning to advanced. =20 Presentation Format: =20 A conference laptop with LCD projector. Powerpoint* or Acrobat* electronic formats are favored and will pre-loaded on the Windows*-based meeting laptop prior to the meeting. =20 Time: Usually 15-30 Minutes =20 Electronic Archival: =20 Presentations will be archived under the IBIS Summits site and also must be submitted in time for uploading and copying. Final submission deadline is: =20 Wednesday, January 28, 2009 =20 Otherwise, you should bring 50 copies for distribution. =20 If you plan a presentation, please supply the following information as soon as possible: =20 Tentative Title: Presenter: E-mail address: Company: Telephone: Estimated Time: =20 Send to: =20 Bob Ross =20 AGENDA =20 The agenda includes presentations, discussions, breaks, and a FREE lunch. The agenda details will be developed as proposals are received. =20 =20 LIST OF NEARBY HOTELS =20 The Hotel and Travel Link provides a conference hotel discount, and use internet search engines other good lodging deals: =20 http://www.designcon.com/2009/conference/hotel_and_travel.html =20 - ----------------------------------------------------------------- =20 =20 =20 =20 =20 =20 - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------_=_NextPart_001_01C95FC5.2D0181C0 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
To=20 All:

This is the first=20 Announcement for the DesignCon 2009 IBIS Summit

Meeting held at the= =20 Santa Clara Convention Center in Santa Clara,

California.

The IBIS Open Forum i= s=20 sponsoring the event, but we welcome additional

sponsors to cover som= e of=20 the meeting expenses and the free lunch and

refreshments.

Also note that VIP di= scounts=20 are offered for all DesignCon 2009

conference packages= =20 (including free exhibition admission) through

links given below. Many IBIS members are also active= ly=20 participating

and presenting materi= al in=20 the DesignCon program.

Best=20 Regards,

Michael Mirmak -=20 Chair

Syed Huq -=20 Vice-Chair

Randy Wolff - Secretary

Lance Wang -=20 Librarian

Bob Ross -=20 Postmaster

---------------------= - --------------------------------------------------

        = ;            &n= bsp;        =20 IBIS SUMMIT

        = ;            &n= bsp;       =20 FIRST CALL FOR

        = ;            = =20 PARTICIPATION & PRESENTATIONS

---------------------= - --------------------------------------------------

        = ;     =20 I B I S   S U M M= I=20 T   M E E T I N=20 G

Time/Date: Thursday, February 5, 2009 8:00 A= M to=20 5:00 PM

Location:   Santa Clara Convention Center=

        = ;   =20 5101 Great America= =20 Parkway,

        = ;   =20 Santa Clara,= =20 California, USA

Room:       209= &=20 210 (2nd floor)

Content:    Presentations and=20 Discussions

Purpose:    Solicit and Exchange = IBIS=20 Model Related Information and

        = ;   =20 ideas.

Sponsors:   IBIS, International Enginee= ring=20 Consortium (DesignCon)

        = ;   =20 We are seeking more co-sponsors.&n= bsp;=20 Please contact Syed Huq

        = ;   =20 <huqs@cisco.com>. The=20 benefits to sponsors include

        = ;   =20 recognition at the meeting and acknowledgement in the=20 Calls

        = ;   =20 for Papers and meeting minutes.

        = ;   =20 Your financial support strengthens the organization=20 by

        = ;   =20 allowing IBIS to focus resources on industry=20 activities

        = ;   =20 rather than raising money, and you will receive=20 generous

        = ;   =20 thanks for your support.

DesignCon 2009=20 Conference:

        = ;   =20 February 2 - 5, 2009

        = ;   =20 Santa Clara=20 Convention=20 Center

        = ;   =20 Santa Clara,= =20 CA

        = ;     =20 http://www.designcon.com/2009/

        = ;   =20 IBIS Summit participants can register at disc= ounted=20 rates

        = ;   =20 through this link:

        = ;     =20 http://www.designcon.com/2009/register/ibis_reg.html

        = ;   =20 However, please also notify Syed Huq=20 (huqs@cisco.com)

        = ;   =20 if you are planning to attend the IBIS Summit.

     Conference=20 Schedule:

      =20 http://www.designcon.com/2009/conference/schedule.html

IBIS Booth: Come visi= t the=20 IBIS Booth to meet attendees and pick up

        = ;   =20 IBIS information.

BACKGROUND=

DesignCon is the prem= ier=20 annual Silicon Valley event for the=20 electronic

design automation (ED= A) and=20 semiconductor industry. Topi= cs of=20 current

interest to the IBIS = Open=20 Forum are addressed at DesignCon.

This meeting will be= =20 conducted as a formal IBIS Summit Meeting.

Presentations are exp= ected=20 to be available and archived in an electronic

format, and minutes o= f the=20 meeting will be issued. Any pending formal

decisions (votes) wil= l be=20 announced at least two weeks prior to the

meeting.

CALL FOR=20 PARTICIPANTS

People involved in IB= IS=20 Model development, EDA tool development, and

digital circuit desig= n are=20 invited to participate in the Summit meeting.

If you plan to partic= ipate,=20 please register with the information below:

   Name:

   E-mail=20 address:

   Company:<= /P>
= =20 Telephone:

Send=20 to:

   Syed Huq=20 <huqs@cisco.com>

Registration deadline= is=20 Wednesday, January 28, 2009 to receive the

free=20 lunch.

You can also register= =20 through the DesignCon link and also get VIP

discounted rates at= =20 DesignCon. But please also n= otify=20 Syed that

you are=20 registering.

CALL FOR=20 PRESENTATIONS

We are seeking presen= tations=20 from individuals who have experiences

of interest to the IB= IS=20 modeling community. In the p= ast,=20 these have

included, but not lim= ited=20 to:

   Demonstrations of modeling= =20 techniques

   Explanations of behavioral= =20 algorithms

   Descriptions of difficultie= s=20 encountered

   Model=20 correlation

   Modeling building=20 experiences

   Comparisons to other modeli= ng=20 methods

   New technologies for modeli= ng=20 buffers and component

   New technologies for modeli= ng=20 packaging and interconnects

   Algorithmic modeling=20 topics

   Etc.

Presentations may be= =20 addressed to any and all levels of IBIS experience,

from beginning to=20 advanced.

Presentation=20 Format:

   A conference laptop with LC= D=20 projector. Powerpoint* or=20 Acrobat*

   electronic formats are favo= red and=20 will pre-loaded on the

   Windows*-based meeting lapt= op=20 prior to the meeting.

Time: Usually 15-30= =20 Minutes

Electronic=20 Archival:

   Presentations will be archi= ved=20 under the IBIS Summits site

   and also must be submitted = in time=20 for uploading and copying.

   Final submission deadline= =20 is:

     Wednesday, Janu= ary 28,=20 2009

   Otherwise, you should bring= 50=20 copies for distribution.

If you plan a present= ation,=20 please supply the following information

as soon as=20 possible:

   Tentative=20 Title:

   Presenter:

   E-mail=20 address:

   Company:<= /P>
   Telephone:

   Estimated=20 Time:

Send=20 to:

       Bob= Ross=20 <bob@teraspeed.com>

AGENDA

The agenda includes= =20 presentations, discussions, breaks, and a FREE

lunch. The agenda details will be develo= ped as=20 proposals are

received.<= /SPAN>

LIST OF NEARBY=20 HOTELS

The Hotel and Travel = Link=20 provides a conference hotel discount, and

use internet search e= ngines=20 other good lodging deals:

  =20 http://www.designcon.com/2009/conference/hotel_and_travel.html<= /o:p>

---------------------= - --------------------------------------------

--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------_=_NextPart_001_01C95FC5.2D0181C0-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 17 Dec 2008 09:05:26 +0530 From: "gaurav Singh" Subject: [IBIS-Users] I/O model with dynamically changing pullup This is a multipart message in MIME format. - ------=_NextPart_000_0063_01C96026.9F289330 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Dear all, I have a special case where the pullup of an I/O pin changes dynamically. This is how it works: 1. The I/O has a 100kOhm resistor pullup in parallel with the clamp 2. While the pin is HIGH, it can be pulled LOW externally - behaving like a open-drain I/O with a 100K pullup 3. When the pin is pulled LOW by the device - it is a strong pull-down 4. Here is the problem: When this pin is pulled HIGH from a LOW state - a strong internal pullup acts on it for (~)1us - after this time, the strong pullup is disabled and it acts like the point 2 above. Sequence: Pin is LOW -> Pulled high with a strong pullup (20Ohm) for 1us -> Strong pullup is disabled and pin acts as an open-drain I/O with an weak internal pullup Any ideas on how this pin needs to be modeled? I understand that the resistive pullup should be accounted for in the Clamp currents. However, how do I account for the fact that the pull-up table changes dynamically. Your help would be greatly appreciated. Thanks, Gaurav - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_0063_01C96026.9F289330 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Dear all,

I have a special case where the pullup of an I/O pin c= hanges dynamically. This is how it works:

1.&n= bsp;      The I/O has a 100kOhm resistor pullup in parallel w= ith the clamp

2.&n= bsp;      While the pin is HIGH, it can be pulled LOW externa= lly – behaving like a open-drain I/O with a 100K pullup

3.&n= bsp;      When the pin is pulled LOW by the device – it= is a strong pull-down

4.&n= bsp;      Here is the problem:

When this pin is pulled HIG= H from a LOW state – a strong internal pullup acts on it for (~)1us – af= ter this time, the strong pullup is disabled and it acts like the point 2 above.

Sequence:

Pin is LOW -> Pulled hig= h with a strong pullup (20Ohm) for 1us -> Strong pullup is disabled and pin acts = as an open-drain I/O with an weak internal pullup

Any ideas on how this pin needs to be modeled?

I understand that the resistive pullup should be accou= nted for in the Clamp currents. However, how do I account for the fact that the pull-up table changes dynamically.

Your help would be greatly appreciated.

Thanks,

Gaurav

--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------=_NextPart_000_0063_01C96026.9F289330-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Tue, 16 Dec 2008 20:35:53 -0800 From: "Muranyi, Arpad" Subject: RE: [IBIS-Users] I/O model with dynamically changing pullup This is a multi-part message in MIME format. - ------_=_NextPart_001_01C96000.F407A143 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Gaurav, =20 You can model this type of behavior using the [Driver Schedule] keyword. Make the pullup a single shot with a 1 us timeout. =20 Arpad =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 ________________________________ From: owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On Behalf Of gaurav Singh Sent: Tuesday, December 16, 2008 9:35 PM To: ibis-users@server.eda.org Subject: [IBIS-Users] I/O model with dynamically changing pullup Dear all, =20 I have a special case where the pullup of an I/O pin changes dynamically. This is how it works: =20 1. The I/O has a 100kOhm resistor pullup in parallel with the clamp=20 2. While the pin is HIGH, it can be pulled LOW externally - behaving like a open-drain I/O with a 100K pullup 3. When the pin is pulled LOW by the device - it is a strong pull-down 4. Here is the problem: When this pin is pulled HIGH from a LOW state - a strong internal pullup acts on it for (~)1us - after this time, the strong pullup is disabled and it acts like the point 2 above. =20 Sequence: Pin is LOW -> Pulled high with a strong pullup (20Ohm) for 1us -> Strong pullup is disabled and pin acts as an open-drain I/O with an weak internal pullup =20 Any ideas on how this pin needs to be modeled? I understand that the resistive pullup should be accounted for in the Clamp currents. However, how do I account for the fact that the pull-up table changes dynamically. =20 Your help would be greatly appreciated. =20 Thanks, Gaurav - --=20 This message has been scanned for viruses and=20 dangerous content by MailScanner , and is believed to be clean.=20 - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------_=_NextPart_001_01C96000.F407A143 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Gaurav,

You can model this type of behavior using=20 the

[Driver Schedule] keyword. Make the=20 pullup

a single shot with a 1 us timeout.=

Arpad

=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D

From:=20 owner-ibis-users@server.eda.org [mailto:owner-ibis-users@server.eda.org] On=20 Behalf Of gaurav Singh
Sent: Tuesday, December 16, 2008 9:35= =20 PM
To: ibis-users@server.eda.org
Subject: [IBIS-Users] = I/O=20 model with dynamically changing pullup

Dear all,

I have a special case where the pullup of an I/O pin c= hanges=20 dynamically. This is how it works:

1.      = =20 The I/O has a 100kOhm resistor pullup in parallel w= ith=20 the clamp

2.      = =20 While the pin is HIGH, it can be pulled LOW externa= lly –=20 behaving like a open-drain I/O with a 100K pullup

3.      = =20 When the pin is pulled LOW by the device – it= is a=20 strong pull-down

4.      = =20 Here is the problem:

When this pin is pulled H= IGH from=20 a LOW state – a strong internal pullup acts on it for (~)1us – = after this time,=20 the strong pullup is disabled and it acts like the point 2 above.

Sequence:

Pin is LOW -> Pulled h= igh with=20 a strong pullup (20Ohm) for 1us -> Strong pullup is disabled and pin act= s as=20 an open-drain I/O with an weak internal pullup

Any ideas on how this pin needs to be modeled?

I understand that the resistive pullup should be accou= nted=20 for in the Clamp currents. However, how do I account for the fact that the= =20 pull-up table changes dynamically.

Your help would be greatly appreciated.

Thanks,

Gaurav

--
This message has= been=20 scanned for viruses and
dangerous content by MailScanner, and is
be= lieved=20 to be clean.
--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------_=_NextPart_001_01C96000.F407A143-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 18 Dec 2008 09:25:16 +0530 From: "Prasanna R" Subject: [IBIS-Users] Re: IBIS Reflector Message - Re-send This is a multi-part message in MIME format. - ------=_NextPart_000_003D_01C960F2.89C808F0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Hi All, Can anyone please let me know how to find if On-Die Termination(ODT) / = On-Chip Termination(OCT) option is available in the=20 given IBIS file ? PS: Thanks Bob! for helping towards my subscription on IBIS forum. Thanks and Regards Prasanna R Si2 Microsystems P Ltd, Bangalore|Ph: 080-67171108. - ----- Original Message -----=20 From: "Bob Ross" To: Cc: Sent: Thursday, December 18, 2008 3:02 AM Subject: IBIS Reflector Message - Re-send > Hi >=20 > Your message below did not go out on the IBIS Reflectors because > it needs to be sent from an address from which you are subscribed. >=20 > I have subscribed you to the above address. >=20 > You can now re-send the message on the IBIS Users Reflector >=20 > What does OCT stand for? >=20 > Best Regards, > Bob >=20 >=20 > ---------------------------------------------- > Hi All, >=20 > Can anyone please let me know how to find if ODT/OCT option is available = in the=20 > given IBIS file ? >=20 > Thanks and Regards > Prasanna R > Si2 Microsystems P Ltd, Bangalore|Ph: 080-67171108. > --=3D20 > This message has been scanned for viruses and > dangerous content by MailScanner, and is > believed to be clean. >=20 > ----------------------------------------------- > --=20 > Bob Ross > Teraspeed Consulting Group LLC Teraspeed Labs > 121 North River Drive 13610 SW Harness Lane > Narragansett, RI 02882 Beaverton, OR 97008 > 401-284-1827 503-430-1065 > http://www.teraspeed.com 503-246-8048 Direct > bob@teraspeed.com >=20 > Teraspeed is a registered service mark of Teraspeed Consulting Group LLC >=20 > - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_003D_01C960F2.89C808F0 Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable
Hi All,

    Can any= one please=20 let me know how to find if On-Die Termination(ODT) / On-Chip Termination(OC= T)=20 option is available in the
given IBIS file ?

   PS: Than= ks Bob! for=20 helping towards my subscription on IBIS forum.

Thanks and Regards
Prasanna R
Si2=20 Microsystems P Ltd, Bangalore|Ph: 080-67171108.

----- Original Message -----
From: "Bob Ross" <bob@teraspeed.com>

To: <prasanna@si2micro.com>

Cc: <bob@teraspeed.com>

Sent: Thursday, December 18, 2008 3:02=20 AM

Subject: IBIS Reflector Message -=20 Re-send

> Hi
>
> Your message below did not go out on the = IBIS=20 Reflectors because
> it needs to be sent from an address from which y= ou=20 are subscribed.
>
> I have subscribed you to the above=20 address.
>
> You can now re-send the message on the IBIS Users= =20 Reflector
>
> What does OCT stand for?
>
> Best= =20 Regards,
> Bob
>
>
>=20 - ----------------------------------------------
> Hi All,
>
= >=20 Can anyone please let me know how to find if ODT/OCT option is available in= the=20
> given IBIS file ?
>
> Thanks and Regards
> Pras= anna=20 R
> Si2 Microsystems P Ltd, Bangalore|Ph: 080-67171108.
>=20 - --=3D20
> This message has been scanned for viruses and
> dange= rous=20 content by MailScanner, and is
> believed to be clean.
>
&g= t;=20 - -----------------------------------------------
> --
> Bob=20 Ross
> Teraspeed Consulting Group LLC     Teraspe= ed=20 Labs
> 121 North River=20 Drive           &nbs= p; =20 13610 SW Harness Lane
> Narragansett, RI=20 02882           &nbs= p;=20 Beaverton, OR 97008
>=20 401-284-1827          &nb= sp;           =20 503-430-1065
> http://www.teraspeed.com           503-2= 46-8048=20 Direct
> bob@teraspeed.com
> <= BR>>=20 Teraspeed is a registered service mark of Teraspeed Consulting Group LLC>=20
>
--=20
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean. - ------=_NextPart_000_003D_01C960F2.89C808F0-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 18 Dec 2008 09:38:33 +0530 From: "Muniswara Reddy Vorugu" Subject: RE: [IBIS-Users] Re: IBIS Reflector Message - Re-send This is a multi-part message in MIME format. - ------_=_NextPart_001_01C960C6.4B9EA7AE Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Prasanna, Refer to the following documents. http://www.eda-stds.org/ibis/summits/jun03b/muranyi3.pdf =20 http://www.eda.org/ibis/summits/sep05/ross2.pdf =20 Thanks, Muniswar =20 =20 ________________________________ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Prasanna R Sent: Thursday, December 18, 2008 9:25 AM To: ibis-users@eda.org Cc: Bob Ross Subject: [IBIS-Users] Re: IBIS Reflector Message - Re-send =20 Hi All, =20 Can anyone please let me know how to find if On-Die Termination(ODT) / On-Chip Termination(OCT) option is available in the=20 given IBIS file ? PS: Thanks Bob! for helping towards my subscription on IBIS forum. =20 Thanks and Regards Prasanna R Si2 Microsystems P Ltd, Bangalore|Ph: 080-67171108. =20 - ----- Original Message -----=20 From: "Bob Ross" > To: > Cc: > Sent: Thursday, December 18, 2008 3:02 AM Subject: IBIS Reflector Message - Re-send =20 > Hi >=20 > Your message below did not go out on the IBIS Reflectors because > it needs to be sent from an address from which you are subscribed. >=20 > I have subscribed you to the above address. >=20 > You can now re-send the message on the IBIS Users Reflector >=20 > What does OCT stand for? >=20 > Best Regards, > Bob >=20 >=20 > ---------------------------------------------- > Hi All, >=20 > Can anyone please let me know how to find if ODT/OCT option is available in the=20 > given IBIS file ? >=20 > Thanks and Regards > Prasanna R > Si2 Microsystems P Ltd, Bangalore|Ph: 080-67171108. > --=3D20 > This message has been scanned for viruses and > dangerous content by MailScanner, and is > believed to be clean. >=20 > ----------------------------------------------- > --=20 > Bob Ross > Teraspeed Consulting Group LLC Teraspeed Labs > 121 North River Drive 13610 SW Harness Lane > Narragansett, RI 02882 Beaverton, OR 97008 > 401-284-1827 503-430-1065 > http://www.teraspeed.com 503-246-8048 Direct > bob@teraspeed.com =20 >=20 > Teraspeed is a registered service mark of Teraspeed Consulting Group LLC >=20 > - --=20 This message has been scanned for viruses and=20 dangerous content by MailScanner , and is believed to be clean.=20 - --=20 IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. If you are not the intended recipient, p= lease notify the sender immediately and do not disclose the contents to any= other person, use it for any purpose, or store or copy the information in = any medium. Thank you. - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------_=_NextPart_001_01C960C6.4B9EA7AE Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hi Prasanna,<= /p>
Refer to the following documents.=

http://ww= w.eda-stds.org/ibis/summits/jun03b/muranyi3.pdf

http://www.eda.org= /ibis/summits/sep05/ross2.pdf

Thanks,

Muniswar

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Prasanna R
Sent: Thursday, December 18,= 2008 9:25 AM
To: ibis-users@eda.org
Cc: Bob Ross
Subject: [IBIS-Users] Re: IB= IS Reflector Message - Re-send

Hi All,

    Can anyone please l= et me know how to find if On-Die Termination(ODT) / On-Chip Termination(OCT) option is available in the
given IBIS file ?

   PS: Thanks Bob! for helping towards my subscription on IBIS forum.

Thanks and Regards
Prasanna R
Si2 Microsystems P Ltd, Bangalore|Ph: 080-67171108.

----- Original Message -----

From: "Bob Ross" <bob@teraspeed.com>=

To: <pr= asanna@si2micro.com&g= t;

Cc: <bo= b@teraspeed.com&g= t;

Sent: Thursday, December 18, 2008 3:02 AM<= o:p>

Subject: IBIS Reflector Message - Re-send<= o:p>

> Hi
>
> Your message below did not go out on the IBIS Reflectors because
> it needs to be sent from an address from which you are subscribed.
>
> I have subscribed you to the above address.
>
> You can now re-send the message on the IBIS Users Reflector
>
> What does OCT stand for?
>
> Best Regards,
> Bob
>
>
> ----------------------------------------------
> Hi All,
>
> Can anyone please let me know how to find if ODT/OCT option is availab= le in the
> given IBIS file ?
>
> Thanks and Regards
> Prasanna R
> Si2 Microsystems P Ltd, Bangalore|Ph: 080-67171108.
> --=3D20
> This message has been scanned for viruses and
> dangerous content by MailScanner, and is
> believed to be clean.
>
> -----------------------------------------------
> --
> Bob Ross
> Teraspeed Consulting Group LLC     Teraspeed Labs<= br> > 121 North River Drive=         =       13610 SW Harness Lane
> Narragansett, = RI 02882    &= nbsp;        Beaverton, OR 97008
> 401-284-1827          &nb= sp;            503-430-1065
> http://www.teraspeed.com&n= bsp;          503-246-8048 Direct
> bob@teraspeed.com
>
> Teraspeed is a registered service mark of Teraspeed Consulting Group L= LC
>
>

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IMPORTANT NOTICE: The contents = of this email and any attachments are confidential and may also be privileg= ed. If you are not the intended recipient, please notify the sender immedia= tely and do not disclose the contents to any other person, use it for any p= urpose, or store or copy the information in any medium. Thank you.

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