From: owner-ibis-users@eda.org (ibis-users) To: ibis-users-digest@eda.org Subject: ibis-users V1 #138 Reply-To: Sender: owner-ibis-users@eda.org Errors-To: owner-ibis-users@eda.org Precedence: bulk ibis-users Wednesday, March 17 2010 Volume 01 : Number 138 ---------------------------------------------------------------------- Date: Tue, 16 Mar 2010 11:21:23 +0530 From: Amit KUMAR Subject: [IBIS-Users] FW: IBIS 5.0 EMI Parameter confusion? This is a multi-part message in MIME format. - ------=_NextPart_000_0080_01CAC4FA.CFC51BF0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Hello Members, =20 I have been reading about the EMI support in IBIS. I have a few queries related to it. =20 1. What is "Cpd" parameter in IBIS 5.0 EMI component level description. I read the definition but still its not clear to me. Also I want to know how can we calculate Cpd for a component? =20=20=20=20=20 2. The domain keyword in EMI component level description says we can d= efine it as analog,digital or digital_analog. Does that specify if the IC is purely analog,digital or having both digital= or analog parts? Whats the significance of this keyword.=20 =20 Regards Amit - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_0080_01CAC4FA.CFC51BF0 Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable

Hello Members,

I have been reading about the EMI support in IBIS.<= /span>

I have a few queries related to it.

1. What is "Cpd" parameter in IBIS 5.0 EMI component level description.

I read the definition but still its not clear to me.=

Also I want to know how can we calculate Cpd for a component?<= o:p>

2. The domain keyword in EMI component level description says we = can define it as analog,digital or digital_analog.

Does that specify if the IC is purely analog,digital or having both digital or analog parts?

Whats the significance of this keyword.

Regards

Amit

--=20
This message has been scanned for viruses and
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believed to be clean. - ------=_NextPart_000_0080_01CAC4FA.CFC51BF0-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 03 Feb 2010 07:15:28 -0800 From: Bob Ross Subject: Re: [IBIS-Users] IBIS-AMI Tool Support Eric: A better place to have this discussion is on the SI list. We do not allow vendor-specific discussions on the IBIS lists. If anyone wants to respond, respond privately to Eric. Bob Eric Monteiro wrote: > Hello > > Forgive me if I posted this is the wrong place. > > I have been looking at channel designers from Mentor, Cadence, SiSoft, and Sigrity that claim to support AMI models. However, to date I have only seen Sigrity's channel designer support AMI models "out of the box", and can generate the BER curves, and statistical eye's. > > In the case of Mentor, it looks like they only have special support for the Xilinx models embedded within the kit (? is this correrct ?). I assume this means Mentor does not yet have a tool where you can take any vendors AMI model and just drop into a schematic unless you work with them to develop a kit similar to Xilinx. > > Does anyone know how Mentor (Hyperlynx GHz), Cadence (Signal Explorer), and SiSoft (Quantum Channel Designer) support out of the box AMI models? > > Best Regards, > Eric > > This communication contains confidential information intended only for the addressee(s). If you have received this communication in error, please notify us immediately and delete this communication from your mail box. > - -- Bob Ross Teraspeed Consulting Group LLC Teraspeed Labs 121 North River Drive 13610 SW Harness Lane Narragansett, RI 02882 Beaverton, OR 97008 401-284-1827 503-430-1065 http://www.teraspeed.com 503-246-8048 Direct bob@teraspeed.com Teraspeed is a registered service mark of Teraspeed Consulting Group LLC - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Mar 2010 22:44:57 -0500 From: "Lance Wang" Subject: RE: [IBIS-Users] FW: C_comp calculation for high speed IOs This is a multi-part message in MIME format. - ------=_NextPart_000_0124_01CAC0A3.4FD9DA80 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Hi, Ajay, To echo Randy's comments, I also recommend using AC simulations for C_comp extraction. I did a presentation about C_comp at last year IBIS Asian Summit. Here is the link: http://www.vhdl.org/pub/ibis/summits/nov09b/wang.pdf Just for the reference. Lance Wang 978-764-2298 IO Methodology Inc. SIMDET V2.0 - The best tool for IBIS modeling intergrated with HSpice, Spectre and Eldo simulators. www.iometh.com _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of rrwolff@micron.com Sent: Wednesday, March 10, 2010 11:19 AM To: ibis-users@eda.org Cc: akap.31@gmail.com Subject: RE: [IBIS-Users] FW: C_comp calculation for high speed IOs Ajay, I prefer to use an AC simulation to look at C_comp. You can sweep various DC bias points and frequencies if you want to make a 3D plot of C_comp versus DC bias and frequency. The HSPICE syntax is below for this method, where pad is the I/O node of the buffer. I suggest VDDQ/2 as the bias point of most interest, and you can decide which frequency to use, maybe one close to the maximum clock frequency. You just need to ensure that ODT is enabled to the right value for the DC operating point (so if you need a clock signal in the model to toggle before ODT turns on, you'll be in trouble and will need to use .IC statements to ensure control lines are at the right state). .AC lin 2 400MEG 667MEG sweep dcsweep 0.7125 0.7875 .0375 .measure ac incap find par('-1*ii(Vpad)/(hertz* 2 * 3.1415926)') at=667000000hertz Vpad pad 0 DC dcsweep AC 1 Regards, Randy Randy Wolff SI Modeling Manager Signal Integrity R&D Group Micron Technology, Inc. 208-363-1764 From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Mirmak, Michael Sent: Wednesday, March 10, 2010 2:17 AM To: ibis-users@eda.org Cc: akap.31@gmail.com Subject: [IBIS-Users] FW: C_comp calculation for high speed IOs Forwarded on behalf of Ajay Kapoor. From: ajay kapoor [mailto:akap.31@gmail.com] Sent: Wednesday, March 10, 2010 4:34 PM To: Mirmak, Michael Subject: C_comp calculation for high speed IOs [.] I needed help on follwoing: I am developing IBIS models for DDR3 IO with following condition that On Die Termination is turned ON and DDR3 is recieving data. Can you please suggest a method / setup to calculate accurate Ccomp value for this model ? Thanks in Advance AK - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_0124_01CAC0A3.4FD9DA80 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hi, Ajay,

To echo Randy’s comments, I also= recommend using AC simulations for C_comp extraction.

I did a presentation about C_comp at l= ast year IBIS Asian Summit. Here is the link:

ht= tp://www.vhdl.org/pub/ibis/summits/nov09b/wang.pdf

Just for the reference.

Lance Wang

978-764-2298

IO Methodology Inc.<= /font>

SIMDE™ V2.0 - The best tool for = IBIS modeling intergrated with HSpice, Spectre and Eldo simulators.

<= span style=3D'font-size:12.0pt;color:navy'>ww= w.iometh.com

<= span style=3D'font-size:12.0pt;color:navy'>

From:= owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of rrwolff@micron.com
Sent: Wednesday, March 10, 2= 010 11:19 AM
To: ibis-users@eda.org
Cc: akap.31@gmail.com
Subject: RE: [IBIS-Users] FW: C_comp calculation for high speed IOs

Ajay,

I prefer to use an AC simulation to look at C_comp. You can sweep vario= us DC bias points and frequencies if you want to make a 3D plot of C_comp vers= us DC bias and frequency. The HSPICE syntax is below for this method, wh= ere pad is the I/O node of the buffer. I suggest VDDQ/2 as the bias point= of most interest, and you can decide which frequency to use, maybe one close to the maximum clock frequency. You just need to ensure that ODT is enab= led to the right value for the DC operating point (so if you need a clock signa= l in the model to toggle before ODT turns on, you’ll be in trouble and will need to use .IC statements to ensure control lines are at the right state).=

.AC lin 2 400MEG 667MEG sweep dcsweep 0.7125 0.7875 .0375

.measure ac incap find par('-1*ii(Vpad)/(hertz* 2 * 3.1415926)') at=3D667000000hertz

Vpad pad 0 DC dcsweep AC 1

Regards,

Randy

Randy Wolff
SI Modeling Manager
Signal Integrity R&D Group
Micron Technology, Inc.
208-363-1764

From:= owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Mirmak, Michael
Sent: Wednesday, March 10, 2= 010 2:17 AM
To: ibis-users@eda.org
Cc: akap.31@gmail.com
Subject: [IBIS-Users] FW: C_= comp calculation for high speed IOs

Forwarded on behalf of Ajay Kapoor…

From:= = ajay kapoor [mailto:akap.31@gmail.com]
Sent: Wednesday, March 10, 2= 010 4:34 PM
To: Mirmak, Michael
Subject: C_comp calculation = for high speed IOs

[&#= 8230;]

I needed help on follwoing:
I am developing IBIS models for DDR3 IO with following condition that On Die Termination is turned ON and DDR3 is recieving data.
Can you please suggest a method / setup to calculate accurate Ccomp value f= or this model ?

Thanks in Advance
AK

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This message has been scanned for viruses and
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believed to be clean. - ------=_NextPart_000_0124_01CAC0A3.4FD9DA80-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 4 Feb 2010 19:07:49 -0000 From: "Mandel, Cary" Subject: RE: [IBIS-Users] IBIS File Help Hello Eric, It could be bad Rising/Falling table data, with bad DC values. But then IBISCHK should throw out an error. So that can't be it. Do the Rising/Falling tables have an exceedingly long leading delay? If that's the case. Then the model might be over-clocked and the simulator might never reach its final DC level. Try running the simulation at a lower data rate. If there is a large initial delay, then that probably indicates a bad model. Most simulators can remove this initial delay, but it would be better if that delay wasn't in the model in the first place (because initial delay removal algorithms can never be guaranteed to always produce a "correct" model). If that doesn't help, I would suggest contacting customer support for the Vendor of the simulator Vendor that produces the wrong DC levels. Cary Mandel Mentor Graphics - -----Original Message----- From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Eric Monteiro Sent: 04 February 2010 18:22 To: ibis-users@eda.org Subject: [IBIS-Users] IBIS File Help Hello I have generated an IBIS file for an ECL open collector driver. When I do the IBISCKH, I get 0 warnings and 0 errors. However, when I try to use the model in a certain tool, the output swings are not as expected. 1) My [Rising Waveform] and [Falling Waveform] shows the wave go from 1.7 to 3.3 volts. 2) IBIS CHK comes back clean, so my DC tables must agree that those are the end points. 3) I place the part into the tool, terminate the open collector to the same R_fixture and V_fixture in the IBIS file 4) I run at the correct data rate, and the output comes out at 1.7 to 2.2 volts... However in a different simulator I get 1.7 to 3.3 with the same test bench... BUT if I delete the [Rising Waveform] and [Falling Waveform] data, the two simulators agree. Has anyone seen this with thier models? Does this mean there is an issue with my IBIS files DC data? I am quite puzzled on this one. (The file is quite large, I can send it to anyone interested in this issue) Best Regards, Eric This communication contains confidential information intended only for the addressee(s). If you have received this communication in error, please notify us immediately and delete this communication from your mail box. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 3 Feb 2010 10:04:45 -0500 From: Eric Monteiro Subject: [IBIS-Users] IBIS-AMI Tool Support Hello Forgive me if I posted this is the wrong place. I have been looking at channel designers from Mentor, Cadence, SiSoft, and Sigrity that claim to support AMI models. However, to date I have only seen Sigrity's channel designer support AMI models "out of the box", and can generate the BER curves, and statistical eye's. In the case of Mentor, it looks like they only have special support for the Xilinx models embedded within the kit (? is this correrct ?). I assume this means Mentor does not yet have a tool where you can take any vendors AMI model and just drop into a schematic unless you work with them to develop a kit similar to Xilinx. Does anyone know how Mentor (Hyperlynx GHz), Cadence (Signal Explorer), and SiSoft (Quantum Channel Designer) support out of the box AMI models? Best Regards, Eric This communication contains confidential information intended only for the addressee(s). If you have received this communication in error, please notify us immediately and delete this communication from your mail box. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Sun, 21 Feb 2010 22:02:56 +0530 (IST) From: "Gowtham M" Subject: Re: [IBIS-Users] Complementary Differential Input Buffer modeling help Eric, I had attempted this sometime back. Details here: http://www.vhdl.org/pub/ibis/summits/oct03/muranyi.pdf 1) Search for series mosfet in this doc: http://eda.org/pub/ibis/ver5.0/ver5_0.txt 2) Since this is a receiver, pullup/pulldown tables are perhaps not required. The common mode current should go to clamp tables and the differential currents should go to the series model. I hope this helps... - - Gowtham > Hello, > > I am trying to model a complementary differential input buffer (full > differential as defined in the ibis spec), and the IBIS cookbook suggests I use > the Series Mosfet keyword (I guess the device doesn't actually have to be a mos > to use this keyword) since my 3D plots contain non-linearity's. > > The problems I am having are: > > 1) I am not quite sure how to format the IBIS file to use this (the example > isn't very clear). > > 2) With my Vpos vs. Vneg vs. i curves, do I still need to remove the common > mode and place them in the pullup/down tables when I use Series mosfet, or is > that only for when you use Series R. > > Also, if anyone has a model of this type that can be disclosed, it would be > greatly appreciated. > > Best Regards, > Eric > > > This communication contains confidential information intended only for the > addressee(s). If you have received this communication in error, please notify > us immediately and delete this communication from your mail box. > > -- > This message has been scanned for viruses and > dangerous content by MailScanner, and is > believed to be clean. > > > -------------------------------------------------------------------- > |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org > |with the appropriate command message(s) in the body: > | > | help > | subscribe ibis > | subscribe ibis-users > | unsubscribe ibis > | unsubscribe ibis-users > | > |or e-mail a request to ibis-request@eda-stds.org. > | > |IBIS reflector archives exist under: > | > | http://www.eda-stds.org/pub/ibis/email_archive/ Recent > | http://www.eda-stds.org/pub/ibis/users_archive/ Recent > | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 > - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 18 Feb 2010 14:21:51 -0500 From: Eric Monteiro Subject: [IBIS-Users] Complementary Differential Input Buffer modeling help Hello, I am trying to model a complementary differential input buffer (full differential as defined in the ibis spec), and the IBIS cookbook suggests I use the Series Mosfet keyword (I guess the device doesn't actually have to be a mos to use this keyword) since my 3D plots contain non-linearity's. The problems I am having are: 1) I am not quite sure how to format the IBIS file to use this (the example isn't very clear). 2) With my Vpos vs. Vneg vs. i curves, do I still need to remove the common mode and place them in the pullup/down tables when I use Series mosfet, or is that only for when you use Series R. Also, if anyone has a model of this type that can be disclosed, it would be greatly appreciated. Best Regards, Eric This communication contains confidential information intended only for the addressee(s). If you have received this communication in error, please notify us immediately and delete this communication from your mail box. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 8 Feb 2010 11:10:12 -0800 From: "Muranyi, Arpad" Subject: [IBIS-Users] RE: Test message, please ignore... This is a test, please ignore it... Arpad ==================================== - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Mar 2010 09:19:29 -0700 From: Subject: RE: [IBIS-Users] FW: C_comp calculation for high speed IOs This is a multi-part message in MIME format. - ------_=_NextPart_001_01CAC06D.7598A030 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Ajay, =20 I prefer to use an AC simulation to look at C_comp. You can sweep various DC bias points and frequencies if you want to make a 3D plot of C_comp versus DC bias and frequency. The HSPICE syntax is below for this method, where pad is the I/O node of the buffer. I suggest VDDQ/2 as the bias point of most interest, and you can decide which frequency to use, maybe one close to the maximum clock frequency. You just need to ensure that ODT is enabled to the right value for the DC operating point (so if you need a clock signal in the model to toggle before ODT turns on, you'll be in trouble and will need to use .IC statements to ensure control lines are at the right state). =20 .AC lin 2 400MEG 667MEG sweep dcsweep 0.7125 0.7875 .0375 .measure ac incap find par('-1*ii(Vpad)/(hertz* 2 * 3.1415926)') at=3D667000000hertz Vpad pad 0 DC dcsweep AC 1 =20 Regards, Randy =20 Randy Wolff SI Modeling Manager Signal Integrity R&D Group Micron Technology, Inc. 208-363-1764=20 =20 =20 From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Mirmak, Michael Sent: Wednesday, March 10, 2010 2:17 AM To: ibis-users@eda.org Cc: akap.31@gmail.com Subject: [IBIS-Users] FW: C_comp calculation for high speed IOs =20 Forwarded on behalf of Ajay Kapoor... =20 From: ajay kapoor [mailto:akap.31@gmail.com]=20 Sent: Wednesday, March 10, 2010 4:34 PM To: Mirmak, Michael Subject: C_comp calculation for high speed IOs =20 [...]=20 =20 I needed help on follwoing: I am developing IBIS models for DDR3 IO with following condition that On Die Termination is turned ON and DDR3 is recieving data.=20 Can you please suggest a method / setup to calculate accurate Ccomp value for this model ? =20 Thanks in Advance AK=20 - --=20 This message has been scanned for viruses and=20 dangerous content by MailScanner , and is believed to be clean.=20 - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------_=_NextPart_001_01CAC06D.7598A030 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Ajay,

I prefer to use an AC simulation to look at C_comp. You can sweep various DC bias points and frequencies if you want to make a 3D p= lot of C_comp versus DC bias and frequency. The HSPICE syntax is below for this method, where pad is the I/O node of the buffer. I suggest VDDQ/= 2 as the bias point of most interest, and you can decide which frequency to use,= maybe one close to the maximum clock frequency. You just need to ensure that ODT is enabled to the right value for the DC operating point (so if you nee= d a clock signal in the model to toggle before ODT turns on, you’ll be in trouble and will need to use .IC statements to ensure control lines are at = the right state).

.AC lin 2 400MEG 667MEG sweep dcsweep 0.7125 0.7875 .0375

.measure ac incap find par('-1*ii(Vpad)/(hertz* 2 * 3.1415926)') at=3D667000000hertz

Vpad pad 0 DC dcsweep AC 1

Regards,

Randy

Randy Wolff
SI Modeling Manager
Signal Integrity R&D Group
Micron Technology, Inc.
208-363-1764 =

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of = Mirmak, Michael
Sent: Wednesday, March 10, 2010 2:17 AM
To: ibis-users@eda.org
Cc: akap.31@gmail.com
Subject: [IBIS-Users] FW: C_comp calculation for high speed IOs=

Forwarded on behalf of Ajay Kapoor…<= /p>

From: ajay kapoor [mailto:akap.31@gmail.com]
Sent: Wednesday, March 10, 2010 4:34 PM
To: Mirmak, Michael
Subject: C_comp calculation for high speed IOs

[…]

I needed help on follwoing:
I am developing IBIS models for DDR3 IO with following condition that On Di= e Termination is turned ON and DDR3 is recieving data.
Can you please suggest a method / setup to calculate accurate Ccomp value f= or this model ?

Thanks in Advance
AK

- --
This message has been scanned for viruses and
dangerous content by MailScanne= r, and is
believed to be clean.

--=20
This message has been scanned for viruses and
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believed to be clean. - ------_=_NextPart_001_01CAC06D.7598A030-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 05 Feb 2010 11:53:32 -0800 From: Bob Ross Subject: [IBIS-Users] IBIS Summit at DesignCon 2010 Presentations All: The presentations for the IBIS Summit at DesignCon 2010 are now uploaded: http://www.vhdl.org/pub/ibis/summits/feb10/ or http://www.vhdl.org/pub/ibis/summits/index-bydate.htm Bob - -- Bob Ross Teraspeed Consulting Group LLC Teraspeed Labs 121 North River Drive 13610 SW Harness Lane Narragansett, RI 02882 Beaverton, OR 97008 401-284-1827 503-430-1065 http://www.teraspeed.com 503-246-8048 Direct bob@teraspeed.com Teraspeed is a registered service mark of Teraspeed Consulting Group LLC - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 4 Feb 2010 13:22:25 -0500 From: Eric Monteiro Subject: [IBIS-Users] IBIS File Help Hello I have generated an IBIS file for an ECL open collector driver. When I do the IBISCKH, I get 0 warnings and 0 errors. However, when I try to use the model in a certain tool, the output swings are not as expected. 1) My [Rising Waveform] and [Falling Waveform] shows the wave go from 1.7 to 3.3 volts. 2) IBIS CHK comes back clean, so my DC tables must agree that those are the end points. 3) I place the part into the tool, terminate the open collector to the same R_fixture and V_fixture in the IBIS file 4) I run at the correct data rate, and the output comes out at 1.7 to 2.2 volts... However in a different simulator I get 1.7 to 3.3 with the same test bench... BUT if I delete the [Rising Waveform] and [Falling Waveform] data, the two simulators agree. Has anyone seen this with thier models? Does this mean there is an issue with my IBIS files DC data? I am quite puzzled on this one. (The file is quite large, I can send it to anyone interested in this issue) Best Regards, Eric This communication contains confidential information intended only for the addressee(s). If you have received this communication in error, please notify us immediately and delete this communication from your mail box. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 17 Mar 2010 16:11:27 -0400 From: "Timothy Coyle" Subject: RE: [IBIS-Users] Series Pin Mapping This is a multi-part message in MIME format. - ------=_NextPart_000_0013_01CAC5EC.801983F0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Hi Eric, You have to be careful with using model selectors in Series Pin Mapping as some commercial EDA tools don't support it although I believe it is valid from the IBIS Spec point of view. Depending on what tools you have available you may want to try out your various implementations to make sure they are going to work. Best, Timothy Coyle President Signal Consulting Group LLC 405 Western Ave #430 South Portland, ME 04106 Tel: 617.297.2566 Email: tim.coyle@siconsultant.com Web: http://www.siconsultant.com SharkSim - Signal Integrity IBIS Modeling Software From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Eric Monteiro Sent: Wednesday, March 17, 2010 3:07 PM To: ibis-users@eda.org Subject: [IBIS-Users] Series Pin Mapping Hello I have a differential input that has 2 different models in the model selector. In addition, this model makes use of the series pin mapping keyword. The issue I am having is that the 2 derivatives have different series models. The IBIS parser does not complain (though I'm skeptical), but is the following valid? [Pin] signal_name model_name R_pin L_pin C_pin 1 SDI_IN SDI x x x 2 SDI_INb SDI x x x [Diff Pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max 1 2 NA NA NA NA [Series Pin Mapping] pin_2 model_name 1 2 sdi_input_term [Model Selector] SDI model1 description model2 description [Model Selector] sdi_input_term model3 description model4 description The goal is for when the user selects SDI model1, the must also select sdi_input_term model3. Thanks in advance, Eric _____ From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Tom Dagostino Sent: Wednesday, March 17, 2010 12:17 PM To: 'ji xiao'; ibis-users@eda.org Subject: RE: [IBIS-Users] question about IBIS simulation for a complete inverter Ji Historically IBIS Signal Integrity simulators are not designed to simulate the transfer function of the parts in the nets you are simulating, they only concern themselves with the interaction of the I/O buffers and the transmission line medium that is between them. There is no description of the logic function, delay or any of the other requirements that may be needed to generate the timing of signals from input to output in an IBIS model. There are some timing simulators that do at least some level of input to output simulation. Tom Dagostino Teraspeed(R) Labs 13610 SW Harness Lane Beaverton, OR 97008 503-430-1065 503-430-1285 FAX tom@teraspeed.com www.teraspeed.com Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 401-284-1827 From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of ji xiao Sent: Wednesday, March 17, 2010 8:06 AM To: ibis-users@eda.org Subject: [IBIS-Users] question about IBIS simulation for a complete inverter Dear Sir/Madam, As a beginner worked with IBIS model, I met a problem about the IBIS simulation for a complete device. Let's take an inverter as an example. If I want to model a complete inverter including the transfer function by using IBIS, do I just need to simulate the output model only(i.e. does the output model contain the transfer function) ? or cascade IBIS input model with output model? If we need to cascade them, does that mean just to receive the output signal of the input model as the input signal of the output model? Thanks and regards, Ji Yuancheng - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. _____ This communication contains confidential information intended only for the addressee(s). If you have received this communication in error, please notify us immediately and delete this communication from your mail box. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_0013_01CAC5EC.801983F0 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hi Eric,

You have to be careful with using model selectors in Series = Pin Mapping as some commercial EDA tools don’t support it although I beli= eve it is valid from the IBIS Spec point of view. Depending on what tools you h= ave available you may want to try out your various implementations to make sure they are going to work.

Best,

Timothy Coyle

President

Signal Consulting Group LLC

405 Western Ave #430

South Portland, ME 04106

Tel: 617.297.2566

Email: = tim.= coyle@siconsultant.com<= o:p>

Web: http= ://www.siconsultant.com<= o:p>

SharkSim - Signal Integrity IBIS Modeling Software

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of = Eric Monteiro
Sent: Wednesday, March 17, 2010 3:07 PM
To: ibis-users@eda.org
Subject: [IBIS-Users] Series Pin Mapping

Hello

I have a differential input that has 2 different models in the model selector. In addition, this model makes use of the series pin mapping keyword. The issue I am having is that the 2 derivatives have different series models. The IBIS parser does not complain (though I'm skeptical), but is the following valid?

[Pin] signal_name model_name = ; R_pin L_pin C_pin

1 SDI_IN &nb= sp; SDI &nb= sp; = x&n= bsp; x x

2 SDI_INb &n= bsp; SDI &n= bsp; = ; x &= nbsp; x x =

[Diff Pin] inv_pin vdiff tdelay_typ tdelay_min tdelay_max

1 &= nbsp; 2 &n= bsp; NA NA &= nbsp; NA &= nbsp; NA

[Series Pin Mapping] pin_2 model_name=

1 &= nbsp; &nbs= p; 2 sdi_input_term

[Model Selector] SDI

model1 description

model2 description

[Model Selector] sdi_input_term

model3 description

model4 description

The goal is for when the user selects SDI model1, the must also select sdi_input_term model3.

Thanks in advance,

Eric

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Tom Dagostino
Sent: Wednesday, March 17, 2010 12:17 PM
To: 'ji xiao'; ibis-users@eda.org
Subject: RE: [IBIS-Users] question about IBIS simulation for a compl= ete inverter

Historically IBIS Signal Integrity simulators are not design= ed to simulate the transfer function of the parts in the nets you are simulati= ng, they only concern themselves with the interaction of the I/O buffers and the transmission line medium that is between them. There is no descriptio= n of the logic function, delay or any of the other requirements that may be need= ed to generate the timing of signals from input to output in an IBIS model.&nb= sp; There are some timing simulators that do at least some level of input to ou= tput simulation.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065

503-430-1285 FAX
tom@teraspeed.com
www.teraspeed.com

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of = ji xiao
Sent: Wednesday, March 17, 2010 8:06 AM
To: ibis-users@eda.org
Subject: [IBIS-Users] question about IBIS simulation for a complete inverter

Dear Sir/Madam,

As a beginner worked with IBIS model, I met a problem about the IBIS simulation for a complete device. Let's take an inverter as an example. If I want to model a complete inverter including the transfer function by using IBIS, do I just need to simulate the output model only(i.e. does the output model contain the transfer function) ? or cascade IBIS input model with output model?
If we need to cascade them, does that mean just to receive the output signal of the input model as the input signal of the output mod= el?

Thanks and regards,
Ji Yuancheng

- --
This message has been scanned for viruses and
dangerous content by MailScanne= r, and is
believed to be clean.

This communication contains confidential information intended o= nly for the addressee(s). If you have received this communication in error, ple= ase notify us immediately and delete this communication from your mail box.

- --
This message has been scanned for viruses and
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This message has been scanned for viruses and
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