From: owner-ibis-users@eda.org (ibis-users) To: ibis-users-digest@eda.org Subject: ibis-users V1 #147 Reply-To: Sender: owner-ibis-users@eda.org Errors-To: owner-ibis-users@eda.org Precedence: bulk ibis-users Monday, September 27 2010 Volume 01 : Number 147 ---------------------------------------------------------------------- Date: Mon, 27 Sep 2010 14:12:24 +0200 From: Fabio BRINA Subject: [IBIS-Users] C_comp Max < C_comp Min - --_000_4C81667D7A02944B98C4DC6290A19E6CA1116C567ESAFEX1MAIL3st_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hello Ibis experts, I'm working in CMOS tecnology; very often in the C_comp extraction I obtain the Min value bigger then Max= value: the values come from ac simulations in these conditions: C_comp Min value consider: Vcc Min, Process Min, Temp Max C_comp Max value consider: Vcc Max, Process Max, Temp Min The Ibis Check output is: WARNING (line 76) - Model mod1: C_comp min value is not the smallest value listed WARNING (line 76) - Model mod1: C_comp max value is not the largest value listed Is that situation acceptable? or I have to switch the Min Value with Max Value? ... suggestions are welcome ! Thank you, Fabio - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - --_000_4C81667D7A02944B98C4DC6290A19E6CA1116C567ESAFEX1MAIL3st_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hello Ibis experts,

I'm working in CMOS tecnology;<= /span>

very often in the C_comp extraction I obta= in the Min value bigger then Max value:

the values come from ac simulations in the= se conditions:

C_comp Min value consider: Vcc Min, Proces= s Min, Temp Max

C_comp Max value consider: Vcc Max, Proces= s Max, Temp Min

The Ibis Check output is:

WARNING (line 76) -

Model mod1: C_comp min value = is not the smallest value listed

WARNING (line 76) -

Model mod1: C_comp max value = is not the largest value listed

Is that situation acceptable? =

or I have to switch the Min Value with Max Value= ?

... suggestions are welcome !<= /p>

Thank you,

Fabio

--=20
This message has been scanned for viruses and
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You need to be careful about C_comp, because it is not only important for the device in the receive mode, but also in the driving mode. The reflections coming back to the driver will bounce back to the T-line, and C_comp does have a big role in determining these secondary reflections from the driver. Arpad =================================================================== - -----Original Message----- From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of surendra.deshmukh@wipro.com Sent: Wednesday, September 22, 2010 12:18 AM To: Muranyi, Arpad; ibis-users@eda.org Subject: RE: [IBIS-Users] Simulation with VT tables for different load conditions Hi All, Thanks for responses. Actually in one of the cases of modeling, I met with over-clocking issue when I used R_fixture. Then I came to know that the design was made only to drive capacitive load Hence I tried with C_fixture value and modeled it. Initially I found problem with C_comp but later by changing its value I was able to get good correlation when compared with spice netlist simulation. Is that the way correct to model if results are pretty good? Regards Surendra - -----Original Message----- From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Muranyi, Arpad Sent: Friday, September 17, 2010 10:15 AM To: ibis-users@eda.org Subject: RE: [IBIS-Users] Simulation with VT tables for different load conditions Bob, Thanks for the note on this. This seems to be a pretty clever way of doing the extraction, and fairly simple too (as long as the *_fixture circuit remains simple and can be solved like that). But we need to be careful with our selection of words. This presentation talks about extraction, and calculates the I_die(t) in the presence of the known LRC *_fixture elements during extraction. And this is the correct answer to the original question which dealt with *_fixture. My presentation, on the other hand, deals with the reactive loading problem of an I-V / V-t curve based IBIS model during simulation. This problem cannot be solved with the Synopsys presentation you quoted if the basic IBIS algorithm only uses the 2EQ/2UK algorithm, because it involves only Ohm's law and doesn't have enough information for the EDA tool to solve the differential equations associated with the reactive loads. So strictly speaking I have to admit that I didn't answer the original question by quoting my own presentation, but the two topics are related. Arpad ======================================================== - -----Original Message----- From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Bob Ross Sent: Thursday, September 16, 2010 1:52 PM Cc: ibis-users@eda.org Subject: Re: [IBIS-Users] Simulation with VT tables for different load conditions Hi Sunrendra: Even though IBIS has syntax to support reactive load elements (L_fixture, C_fixture, and even L_dut and C_dut) we recommend not extracting models using these elements. Some tools do not even support these load elements, and others may support them by vendor-specfic methods. However, it is possible to process reactive loads by accounting for the time-varying reactive path derivatives within the four V-T methodology. One presentation provides some details. http://www.eda.org/ibis/summits/sep07a/chen.pdf Bob - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 Please do not print this email unless it is absolutely necessary. The information contained in this electronic message and any attachments to this message are intended for the exclusive use of the addressee(s) and may contain proprietary, confidential or privileged information. If you are not the intended recipient, you should not disseminate, distribute or copy this e-mail. Please notify the sender immediately and destroy all copies of this message and any attachments. WARNING: Computer viruses can be transmitted via email. The recipient should check this email and any attachments for the presence of viruses. The company accepts no liability for any damage caused by any virus transmitted by this email. www.wipro.com - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Fri, 24 Sep 2010 13:52:10 -0700 From: Bob Ross Subject: [IBIS-Users] [SI-LIST] Asian IBIS Summit (Taiwan) - Third Announcement To All: The IBIS Open Forum is holding an Asian IBIS Summit Meeting in Taipei, Taiwan a major technology center on Friday, November 12, 2010. This is the third announcement for travel planning. Several companies listed below are co-sponsoring this major event to be held at the Sherwood Hotel, Taipei. We are planning for many local attendees and also several IBIS experts from the USA. We encourage technical contributions from Asia. We expect a full agenda of relevant material. Note we are also holding these Asian IBIS Summit meetings: Shenzhen, P.R. China, Tuesday November 9, Four Points Hotel Tokyo, Japan, Monday, November 15, JEITA headquarters Bob Ross Teraspeed Consulting Group Polin Chi Sigrity - ----------------------------------------------------------------------- ASIAN IBIS SUMMIT (TAIWAN) THIRD CALL FOR PARTICIPATION AND PRESENTATIONS - ----------------------------------------------------------------------- A S I A N I B I S S U M M I T ( T A I W A N ) Time/Date: Friday, November 12, 2010, 8:00 to 16:30 (date correction) Meeting starts at 8:30 AM Location: Sherwood Hotel 11 Min Sheng E Road, Sec. 3 Taipei, Taiwan Rooms: Ballroom I and II Content: Presentations and Discussions Purpose: Solicit and exchange IBIS and interconnect model related information and ideas. Co-sponsors (in alphabetical order): Agilent Technologies Avant Technology (IO Methodology) Foxconn ICT-Lanto Intel Corporation Sigrity Synopsys Cost: FREE, including refreshments and buffet lunch Vendors: Some vendors will have information tables outside the meeting room Contact us for details regarding sponsorship. BACKGROUND We have held many successful Summit meetings across Asia in previous years. This year we are adding a meeting in Taipei where many national and international high technology companies have operations. Presentations from past events are available at our Summit archive: http://www.eda.org/pub/ibis/summits/ Our objective is to reach out internationally to communicate with the local experts and to learn of regional concerns. CONFERENCE LANGUAGE The conference language is English, but we will plan for technical translations in English and Chinese. So presenters can optionally deliver in Chinese as long as an English version of the material is available. IBIS SUMMIT This meeting will be conducted as a formal IBIS Summit Meeting. Presentations will be archived in an electronic format on our Summits site, and minutes of the meeting will be issued. However, no formal decisions requiring votes will be planned. CALL FOR PARTICIPANTS People involved in IBIS and interconnect model development, EDA tool development, and digital circuit design are invited to participate in the Summit meeting. If you plan to participate, please register using the information below (in English): Name: E-mail address: Company: Top-level Web Link: Country: Telephone: Comments: Send to BOTH: Bob Ross, Teraspeed Consulting Group bob@teraspeed.com Polin Chi, Sigrity polinchi@sigrity.com SIGNUP DEADLINE: November 4, 2010 CALL FOR PRESENTATIONS We are seeking presentations from individuals who have IBIS and interconnect modeling experiences or issues. If we have to select presentations for the number of time slots available, we will give preferential consideration to presentations from Asia. Presentation Format: LCD Projection from meeting laptop computer Time: 15-30 Minutes including questions Electronic Archival: All presentations will uploaded to our public IBIS Summit archives Electronic Format: Power Point or Acrobat Presentation Booklet: Available at the meeting for all attendees Presentation Deadline: October 22, 2010 to produce the presentation copies for the meeting If you plan a presentation, please ADD to the above registration information: Title of Presentation: Estimated Time: (30 minutes or less) We will notify you of acceptance and may follow up with questions when we form the program agenda. Note: Vendor promotional or business information is prohibited. We review all submitted presentations and may request modifications. Submitted presentations must be in English, although the delivery can be in Chinese. Submissions from Taiwan and across Asia are strongly encouraged, though submissions from other regions are very welcome. Topics may include behavioral modeling of buffers, interconnects or other system components. AGENDA 8:00 - 8:30 Vendor table setup and tables 8:00 - 8:30 Sign in 8:30 - 12:00 Presentations 12:00 - 13:30 Free buffet lunch, vendor tables 13:30 - 16:30 Presentations The specific agenda is being developed. We expect nine or ten presentations covering a range of issues from existing customer experiences, existing clarifications and some of the future directions in IBIS to deal with technical advances. Several major IBIS Committee presentations from IBIS officers or active members are planned. Several presentations on IBIS applications and behavioral modeling issues, including interconnects and system components, are expected from co-sponsor companies and/or their customers. LIST OF NEARBY HOTELS AND TRAVEL RULES Hotels in all price ranges can be found through internet searches. - ----------------------------------------------------------------- - -- Bob Ross Teraspeed Consulting Group LLC Teraspeed Labs 121 North River Drive 13610 SW Harness Lane Narragansett, RI 02882 Beaverton, OR 97008 401-284-1827 503-430-1065 http://www.teraspeed.com 503-246-8048 Direct bob@teraspeed.com Teraspeed is a registered service mark of Teraspeed Consulting Group LLC - ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@freelists.org with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: http://www.freelists.org/webpage/si-list For help: si-list-request@freelists.org with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: http://www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 27 Sep 2010 13:35:59 -0400 From: "Walter Katz" Subject: [IBIS-Users] RE: [IBIS] C_comp Max < C_comp Min This is a multi-part message in MIME format. - ------=_NextPart_000_0049_01CB5E48.ED12CE40 Content-Type: multipart/alternative; boundary="----=_NextPart_001_004A_01CB5E48.ED12CE40" - ------=_NextPart_001_004A_01CB5E48.ED12CE40 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable All, =20 There is a very simple solution to this issue, please review the enclosed draft {Model Corner] draft BIRD. =20 Walter =20 - -----Original Message----- From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Mirmak, Michael Sent: Monday, September 27, 2010 12:02 PM To: Muranyi, Arpad; ibis@server.eda.org; ibis-users@server.eda.org Subject: RE: [IBIS] C_comp Max < C_comp Min =20 One other item to note: not all device technologies associate a numerically-smallest capacitance with the "fast/strong" process. Assuming that CMOS rules universally apply would not have been appropriate, and IBIS does not include any notations as to which process technology is used in the design for the data presented. Without that information or some basic ordering assumption, parsers have no means to confirm that the C_comp data had been entered correctly.=20=20 =20 As Arpad states, the only way to have enforceable parsing rules was to order the C_comp from numerically-smallest to -largest, with the assumption that the EDA tool would supply the missing information, likely from asking the user (for example, the tool might inquire about the process used for the IC in question).=20=20 =20 Michael Mirmak Intel Corp. Chair, IBIS Open Forum =20 From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Muranyi, Arpad Sent: Monday, September 27, 2010 7:35 AM To: ibis@server.eda.org; ibis-users@server.eda.org Subject: RE: [IBIS] C_comp Max < C_comp Min =20 Fabio, =20 The reason you are getting that message is because the die capacitance does not have a direct relationship with the fast/slow process corners and when we wrote the IBIS specification we decided that it was best to just put the small number into the min place and the big number into the max place. It was expected that an EDA tool would allow the user to try out all possible combinations between min/max curves and C_comp. =20 Arpad =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 _____=20=20 From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Fabio BRINA Sent: Monday, September 27, 2010 7:12 AM To: ibis@server.eda.org; ibis-users@server.eda.org Subject: [IBIS] C_comp Max < C_comp Min Hello Ibis experts, =20 I'm working in CMOS tecnology; very often in the C_comp extraction I obtain the Min value bigger then Max value: the values come from ac simulations in these conditions: =20 C_comp Min value consider: Vcc Min, Process Min, Temp Max C_comp Max value consider: Vcc Max, Process Max, Temp Min =20 The Ibis Check output is: =20 WARNING (line 76) - Model mod1: C_comp min value is not the smallest value listed WARNING (line 76) - Model mod1: C_comp max value is not the largest value listed =20 Is that situation acceptable?=20 or I have to switch the Min Value with Max Value? =20 ... suggestions are welcome ! =20 Thank you, Fabio =20 - --=20 This message has been scanned for viruses and=20 dangerous content by MailScanner, and is=20 believed to be clean.=20 - --=20 This message has been scanned for viruses and=20 dangerous content by MailScanner, and is=20 believed to be clean.=20 - --=20 This message has been scanned for viruses and=20 dangerous content by MailScanner, and is=20 believed to be clean.=20 - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_001_004A_01CB5E48.ED12CE40 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

All,

There is a very simple solution to this issue, please review the enclosed draft {Model Corner] draft BIRD.

Walter

-----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf O= f Mirmak, Michael
Sent: Monday, September 27, = 2010 12:02 PM
To: Muranyi, Arpad; ibis@server.eda.org; ibis-users@server.eda.org
Subject: RE: [IBIS] C_comp M= ax < C_comp Min

One other ite= m to note: not all device technologies associate a numerically-smallest capacita= nce with the “fast/strong” process. Assuming that CMOS rules universally apply would not have been appropriate, and IBIS does not include any notations as to which process technology is used in the design for the = data presented. Without that information or some basic ordering assumption, parsers have no means to confirm that the C_comp data had been entered corr= ectly.

As Arpad stat= es, the only way to have enforceable parsing rules was to order the C_comp from numerically-smallest to –largest, with the assumption that the EDA to= ol would supply the missing information, likely from asking the user (for exam= ple, the tool might inquire about the process used for the IC in question). = ;

Michael Mirma= k

Intel Corp.

Chair, IBIS O= pen Forum

From:= owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Muranyi, Arpad
Sent: Monday, September 27, = 2010 7:35 AM
To: ibis@server.eda.org; ibis-users@server.eda.org
Subject: RE: [IBIS] C_comp M= ax < C_comp Min

Fabio,

The reason you are get= ting that message is because the die capacitance

does not have a direct relationship with the fast/slow process corners

and when we wrote the = IBIS specification we decided that it was best

to just put the small = number into the min place and the big number into

the max place. I= t was expected that an EDA tool would allow the user

to try out all possible combinations between min/max curves and C_comp.

Arpad

=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf O= f Fabio BRINA
Sent: Monday, September 27, = 2010 7:12 AM
To: ibis@server.eda.org; ibis-users@server.eda.org
Subject: [IBIS] C_comp Max &= lt; C_comp Min

Hello Ibis experts,

I'm working in C= MOS tecnology;

very often in the C_comp extraction I obtain the Min value bigger then Max value:

the values come = from ac simulations in these conditions:

C_comp Min value consider: Vcc Min, Process Min, Temp Max

C_comp Max value consider: Vcc Max, Process Max, Temp Min

The Ibis Check o= utput is:

WARNING (line &nb= sp; 76) -

Mod= el mod1: C_comp min value is not the smallest value listed

WARNING (line &nb= sp; 76) -

Mod= el mod1: C_comp max value is not the largest value listed

Is that situation acceptable?

or I have to switch th= e Min Value with Max Value?

... suggestions are we= lcome !

Thank you,

Fabio

- --
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--=20
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help or to subscribe/unsubscribe, e-mail majordomo@eda-stds.org |with the appropriate command message(s) in the body: | | help | subscribe ibis | subscribe ibis-users | unsubscribe ibis | unsubscribe ibis-users | |or e-mail a request to ibis-request@eda-stds.org. | |IBIS reflector archives exist under: | | http://www.eda-stds.org/pub/ibis/email_archive/ Recent | http://www.eda-stds.org/pub/ibis/users_archive/ Recent | http://www.eda-stds.org/pub/ibis/email/ E-mail since 1993 ------------------------------ End of ibis-users V1 #147 *************************