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ibis-users         Thursday, December 16 2010         Volume 01 : Number 164




----------------------------------------------------------------------

Date: Tue, 23 Nov 2010 17:15:15 +0800
From: ji xiao <xiaoji86@gmail.com>
Subject: [IBIS-Users] Extract IBIS data from lab measurement

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Dear all,
I want to extract the IV and Vt data from the chip measurement results, but
there are two problems.
1. For the Vt data, IBIS cookbook Version 4.0 and 5.0 only mention the
procedure of extract ramp rate. If I want to extract the detail Vt curve
table from the measurement results of a packaged chip, is it possible?
2. For the IV data, I successfully extract it from the measurement but the
extracted result only show agreement with original IBIS model (provided by
manufacturer)  for operation region. When out of the operation region, i.e.,
in diode model, the IV characteristics  I got is quite different from the
original one.
For example, the voltage operation region of my chip is [-0.5, 3.8], in this
range, the measurement value of current is reasonable. However, for the
current measured beyond this voltage range, such as [-3.3, -0.5], the
measurement result will distort severely from the original IBIS value. Could
anyone help me analyze the possible reason for the disagreement? Or is there
something wrong I may make in measurement setting? (I made the measurement
setup according to cookbook version4.0)

Thanks and regards,

Yuancheng

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<font class=3D"Apple-style-span" face=3D"arial, helvetica, sans-serif">Dear=
 all,</font><div><font class=3D"Apple-style-span" face=3D"arial, helvetica,=
 sans-serif">I want to extract the IV and Vt data from the chip measurement=
 results, but there are two problems.</font></div>
<div><font class=3D"Apple-style-span" face=3D"arial, helvetica, sans-serif"=
>1. For the Vt data, IBIS cookbook Version 4.0 and 5.0 only mention the pro=
cedure of extract ramp rate. If I want to extract the detail Vt curve table=
 from the measurement results of a packaged chip, is it possible? =A0</font=
></div>
<div><font class=3D"Apple-style-span" face=3D"arial, helvetica, sans-serif"=
>2. For the IV data, I successfully extract it from the measurement but the=
 extracted result only show agreement with original IBIS model (provided by=
 manufacturer) =A0for operation region. When out of the operation region, i=
.e., in diode model, the IV characteristics =A0I got is quite different fro=
m the original one.</font></div>
<div><font class=3D"Apple-style-span" face=3D"arial, helvetica, sans-serif"=
>For example, the voltage operation region of my chip is=A0[-0.5, 3.8], in =
this range, the measurement value of current is reasonable. However, for th=
e current measured beyond this voltage range, such as [-3.3, -0.5], the mea=
surement result will distort severely from the original IBIS value. Could a=
nyone help me analyze the possible reason for the disagreement? Or is there=
 something wrong I may make in measurement setting? (I made the measurement=
 setup according to cookbook version4.0)</font></div>
<div><span style=3D"font-size: 10.5pt; "><font class=3D"Apple-style-span" f=
ace=3D"arial, helvetica, sans-serif"><br></font></span></div><div><span sty=
le=3D"font-size: 10.5pt; "><span style=3D"font-size: 10.5pt; "><font class=
=3D"Apple-style-span" face=3D"arial, helvetica, sans-serif">Thanks and rega=
rds,</font></span></span></div>
<div><span style=3D"font-size: 10.5pt; "><span style=3D"font-size: 10.5pt; =
"><font class=3D"Apple-style-span" face=3D"arial, helvetica, sans-serif"><b=
r></font></span></span></div><div><span style=3D"font-size: 10.5pt; "><span=
 style=3D"font-size: 10.5pt; "><font class=3D"Apple-style-span" face=3D"ari=
al, helvetica, sans-serif">Yuancheng</font></span></span></div>
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Date: Thu, 2 Dec 2010 14:19:34 +0530
From: "Ghatawade, Vinayak" <vinayak@ti.com>
Subject: [IBIS-Users]

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All,

This has been discussed previously in this forum on modeling Adaptive feedb=
ack buffers.
Is there anyway we can model adaptive feedback buffer which depends on the =
PAD voltage and inturn switches on pmos/nmos depending on external loading =
condition.

I tried looking at few of the options like driver schedule but since these =
are timing related I cannot use for my case since in my case the buffer
Adjust the slews based on PAD voltage and not with respect to the time (del=
ayed turn on). Also if I want to model the PAD dependency in time domain th=
is will be very
Specific to a loading condition. Since IBIS modeling can be done using R_lo=
ad only we cannot make sure this approach can work across different user co=
nditions (tline, loading etc).

Do you have any other suggestion to model a buffer with PAD feedback.

Thanks
vinayak



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<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'>All, <o:p></o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'><o:p>&nbsp;</o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'>This has been discussed previously in
this forum on modeling Adaptive feedback buffers.<o:p></o:p></span></font><=
/p>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'>Is there anyway we can model adaptive
feedback buffer which depends on the PAD voltage and inturn switches on
pmos/nmos depending on external loading condition.<o:p></o:p></span></font>=
</p>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'><o:p>&nbsp;</o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'>I tried looking at few of the options
like driver schedule but since these are timing related I cannot use for my
case since in my case the buffer <o:p></o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'>Adjust the slews based on PAD voltage=
 and
not with respect to the time (delayed turn on). Also if I want to model the=
 PAD
dependency in time domain this will be very<o:p></o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'>Specific to a loading condition. Since
IBIS modeling can be done using R_load only we cannot make sure this approa=
ch
can work across different user conditions (tline, loading etc).<o:p></o:p><=
/span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'><o:p>&nbsp;</o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'>Do you have any other suggestion to m=
odel
a buffer with PAD feedback.<o:p></o:p></span></font></p>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'><o:p>&nbsp;</o:p></span></font></p>

<div>

<p class=3DMsoNormal><font size=3D1 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
9.0pt;font-family:Tahoma;color:blue'>Thanks <o:p></o:p></span></font></p>

<p class=3DMsoNormal><font size=3D1 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
9.0pt;font-family:Tahoma;color:blue'>vinayak<o:p></o:p></span></font></p>

<p class=3Dlistparagraph><font size=3D2 color=3Dnavy face=3DCalibri><span
style=3D'font-size:11.0pt;font-family:Calibri;color:navy'>&nbsp;<o:p></o:p>=
</span></font></p>

</div>

<p class=3DMsoNormal><font size=3D2 color=3Dblue face=3DTahoma><span style=
=3D'font-size:
10.0pt;font-family:Tahoma;color:blue'><o:p>&nbsp;</o:p></span></font></p>

<div>

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center'><font
size=3D3 face=3D"Times New Roman"><span style=3D'font-size:12.0pt'>

<hr size=3D2 width=3D"100%" align=3Dcenter tabindex=3D-1>

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Date: Fri, 19 Nov 2010 11:04:34 +0800
From: Chee Pin Chan <cpchan@altera.com>
Subject: RE: [IBIS-Users] : Validation setup for Diff driver

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Hi Shiju,

Just for your reference, please see the following setups which I usually us=
e to do a quick correlation between differential IBIS driver (ie LVDS) and =
its SPICE.  Please let me know if there is any concern. Thank you.

[cid:image001.jpg@01CB87D9.8CC736B0]

Best regards,
Chee Pin

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf =
Of shiju.abraham@wipro.com
Sent: Wednesday, November 17, 2010 10:18 PM
To: ibis-users@eda.org
Subject: [IBIS-Users] : Validation setup for Diff driver

Hi,

I am using the below setup to validate differential driver ibis model again=
st its spice,

[cid:image004.jpg@01CB87D9.4C0A0850]

Is this a proper validation setup? If not, Can anyone give me a proper or c=
ommonly used validation setup for differential driver?

Thanks,
Shiju

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<p class=3D"MsoNormal"><span style=3D"font-size:11.0pt;font-family:&quot;Ca=
libri&quot;,&quot;sans-serif&quot;;color:#1F497D">Hi Shiju,<o:p></o:p></spa=
n></p>
<p class=3D"MsoNormal"><span style=3D"font-size:11.0pt;font-family:&quot;Ca=
libri&quot;,&quot;sans-serif&quot;;color:#1F497D"><o:p>&nbsp;</o:p></span><=
/p>
<p class=3D"MsoNormal"><span style=3D"font-size:11.0pt;font-family:&quot;Ca=
libri&quot;,&quot;sans-serif&quot;;color:#1F497D">Just for your reference, =
please see the following setups which I usually use to do a quick correlati=
on between differential IBIS driver (ie LVDS) and its SPICE.
 &nbsp;Please let me know if there is any concern. Thank you.<o:p></o:p></s=
pan></p>
<p class=3D"MsoNormal"><span style=3D"font-size:11.0pt;font-family:&quot;Ca=
libri&quot;,&quot;sans-serif&quot;;color:#1F497D"><o:p>&nbsp;</o:p></span><=
/p>
<p class=3D"MsoNormal"><span style=3D"font-size:11.0pt;font-family:&quot;Ca=
libri&quot;,&quot;sans-serif&quot;;color:#1F497D"><img width=3D"589" height=
=3D"394" id=3D"Picture_x0020_2" src=3D"cid:image001.jpg@01CB87D9.8CC736B0">=
</span><span style=3D"font-size:11.0pt;font-family:&quot;Calibri&quot;,&quo=
t;sans-serif&quot;;color:#1F497D"><o:p></o:p></span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:11.0pt;font-family:&quot;Ca=
libri&quot;,&quot;sans-serif&quot;;color:#1F497D"><o:p>&nbsp;</o:p></span><=
/p>
<div>
<p class=3D"MsoNormal"><span style=3D"font-size:11.0pt;font-family:&quot;Ca=
libri&quot;,&quot;sans-serif&quot;;color:#1F497D">Best regards,<o:p></o:p><=
/span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:11.0pt;font-family:&quot;Ca=
libri&quot;,&quot;sans-serif&quot;;color:#1F497D">Chee Pin<o:p></o:p></span=
></p>
</div>
<p class=3D"MsoNormal"><span style=3D"font-size:11.0pt;font-family:&quot;Ca=
libri&quot;,&quot;sans-serif&quot;;color:#1F497D"><o:p>&nbsp;</o:p></span><=
/p>
<div>
<div style=3D"border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in =
0in 0in">
<p class=3D"MsoNormal"><b><span style=3D"font-size:10.0pt;font-family:&quot=
;Tahoma&quot;,&quot;sans-serif&quot;">From:</span></b><span style=3D"font-s=
ize:10.0pt;font-family:&quot;Tahoma&quot;,&quot;sans-serif&quot;"> owner-ib=
is-users@eda.org [mailto:owner-ibis-users@eda.org]
<b>On Behalf Of </b>shiju.abraham@wipro.com<br>
<b>Sent:</b> Wednesday, November 17, 2010 10:18 PM<br>
<b>To:</b> ibis-users@eda.org<br>
<b>Subject:</b> [IBIS-Users] : Validation setup for Diff driver<o:p></o:p><=
/span></p>
</div>
</div>
<p class=3D"MsoNormal"><o:p>&nbsp;</o:p></p>
<p class=3D"MsoNormal"><span style=3D"font-size:10.0pt;font-family:&quot;Ce=
ntury Gothic&quot;,&quot;sans-serif&quot;">Hi,<o:p></o:p></span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:10.0pt;font-family:&quot;Ce=
ntury Gothic&quot;,&quot;sans-serif&quot;"><o:p>&nbsp;</o:p></span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:10.0pt;font-family:&quot;Ce=
ntury Gothic&quot;,&quot;sans-serif&quot;">I am using the below setup to va=
lidate differential driver ibis model against its spice,
<o:p></o:p></span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:10.0pt;font-family:&quot;Ce=
ntury Gothic&quot;,&quot;sans-serif&quot;"><o:p>&nbsp;</o:p></span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:10.0pt;font-family:&quot;Ce=
ntury Gothic&quot;,&quot;sans-serif&quot;"><img width=3D"544" height=3D"234=
" id=3D"_x0000_i1025" src=3D"cid:image004.jpg@01CB87D9.4C0A0850"><o:p></o:p=
></span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:10.0pt;font-family:&quot;Ce=
ntury Gothic&quot;,&quot;sans-serif&quot;"><o:p>&nbsp;</o:p></span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:10.0pt;font-family:&quot;Ce=
ntury Gothic&quot;,&quot;sans-serif&quot;">Is this a proper validation setu=
p? If not, Can anyone give me a proper or commonly used validation setup fo=
r differential driver?<o:p></o:p></span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:10.0pt;font-family:&quot;Ce=
ntury Gothic&quot;,&quot;sans-serif&quot;"><o:p>&nbsp;</o:p></span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:10.0pt;font-family:&quot;Ce=
ntury Gothic&quot;,&quot;sans-serif&quot;">Thanks,<o:p></o:p></span></p>
<p class=3D"MsoNormal"><span style=3D"font-size:10.0pt;font-family:&quot;Ce=
ntury Gothic&quot;,&quot;sans-serif&quot;">Shiju<o:p></o:p></span></p>
<p><strong><span style=3D"font-size:10.0pt;font-family:&quot;Palatino Linot=
ype&quot;,&quot;serif&quot;;color:green">Please do not print this email unl=
ess it is absolutely necessary.
</span></strong><span style=3D"font-family:&quot;Arial&quot;,&quot;sans-ser=
if&quot;"><o:p></o:p></span></p>
<p>The information contained in this electronic message and any attachments=
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e not the intended recipient, you
 should not disseminate, distribute or copy this e-mail. Please notify the =
sender immediately and destroy all copies of this message and any attachmen=
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<o:p></o:p></p>
<p>WARNING: Computer viruses can be transmitted via email. The recipient sh=
ould check this email and any attachments for the presence of viruses. The =
company accepts no liability for any damage caused by any virus transmitted=
 by this email.
<o:p></o:p></p>
<p>www.wipro.com <o:p></o:p></p>
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|  http://www.eda-stds.org/pub/ibis/email/         E-mail since 1993

------------------------------

Date: Thu, 16 Dec 2010 08:48:03 -0800
From: "Muranyi, Arpad" <Arpad_Muranyi@mentor.com>
Subject: [IBIS-Users] RE: [IBIS] Composite current and Initial dead time in waveform table

Thanks for the answers.  I agree, this will not
help the over-clocking problem, because limits
the amount you can shorten the tables.

Unfortunately I don't know how we can get around
this problem until we find a good way to model
over-clocking.

Arpad
==================================================

- -----Original Message-----
From: Prabhat RANJAN [mailto:prabhat.ranjan@st.com] 
Sent: Thursday, December 16, 2010 5:35 AM
To: Muranyi, Arpad; ibis@eda.org; ibis-users@eda.org
Subject: RE: [IBIS] Composite current and Initial dead time in waveform
table

Hello Arpad,

IBIS specification document doesn't have exact words but last cookbook
has some similar recommendation in "V-T Table Windowing".
Various discussions in this forum also suggest removal of initial time
from waveform to fit in half of time-period.
And yes, now we have to consider the I-T table also for removal.

But, in most of cases, the initial dead time in I-T tables are almost
negligible in comparison to V-T tables. So, initial time of I-T tables
are not going to help me in case of over-clocking and hence I'll not be
able to use that model with composite current for even SI simulations
with most of tools.


Regards
Prabhat 





- -----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of
Muranyi, Arpad
Sent: Thursday, December 16, 2010 11:26 AM
To: ibis@eda.org; ibis-users@eda.org
Subject: RE: [IBIS] Composite current and Initial dead time in waveform
table

Prabhat,

You are raising a very good point.  The question is how much
can you remove from the beginning of the waveform tables.

You wrote that the "IBIS specification recommends to remove
the initial non-switching time".  I tried to find this in
the specification to double check the exact wording, but I
can't find this recommendation in the specification.  Can you
give me a page number for it?  Or is this in the Cookbook?

Either way, common sense would dictate that if you want to 
be able to get correct power currents, you should NOT chop
off the beginning of the I-T table just because the V-t table
is inactive.  In other words, when you decide how much to shift
the waveforms to the left, don't make your decision solely based
on the content of the V-t tables, look at the I-T tables also
and move things to the left only by as much as the shortest
inactive I-T or V-t waveform lets you.

Please let me know where the spec or Cookbook talks about this
so we could make the necessary corrections if the wording is
incorrect or misleading.  Please keep in mind that the I-T
tables were added much later to the specification as the V-t
tables, and we may have forgotten to update some text which
deals with this topic in the V-t sections when the I-T section
was added.

Arpad
================================================================

- -----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of
Prabhat RANJAN
Sent: Wednesday, December 15, 2010 9:34 PM
To: ibis@eda.org; ibis-users@eda.org
Cc: Prabhat RANJAN
Subject: [IBIS] Composite current and Initial dead time in waveform
table

Hello Experts,

Composite current tables have been introduced in IBIS ver5.0 for better
modeling of pre-driver and driver current.
In buffers, major pre-driver current flows from source just after input
stimuli transition and before the output driver actually starts
switching.

Also, IBIS specification recommends to remove the initial non-switching
time (or dead-time or startup time) from waveform tables to avoid the
over-clocking issues.

If my buffer needs to remove the initial non-switching time from
waveform tables then I have to remove or shift the corresponding
composite current tables also. This shifting of composite current will
remove all pre-driver currents from tables and hence I shall not be able
to get advantages of composite current.

In most of high speed buffers, non-switching times should be removed
from waveform tables but we also need complete composite current with
pre-driver current for accurate power integrity.

So, I am wondering that how composite current tables are going to be
useful in above cases??


- -- 
Regards
Prabhat Ranjan
STMicroelectronics

- -- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.


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|  http://www.eda-stds.org/pub/ibis/email/         E-mail since 1993

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|
|or e-mail a request to ibis-request@eda-stds.org.
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|
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|  http://www.eda-stds.org/pub/ibis/users_archive/ Recent
|  http://www.eda-stds.org/pub/ibis/email/         E-mail since 1993

------------------------------

Date: Thu, 16 Dec 2010 19:35:03 +0800
From: Prabhat RANJAN <prabhat.ranjan@st.com>
Subject: [IBIS-Users] RE: [IBIS] Composite current and Initial dead time in waveform table

Hello Arpad,

IBIS specification document doesn't have exact words but last cookbook has some similar recommendation in "V-T Table Windowing".
Various discussions in this forum also suggest removal of initial time from waveform to fit in half of time-period.
And yes, now we have to consider the I-T table also for removal.

But, in most of cases, the initial dead time in I-T tables are almost negligible in comparison to V-T tables. So, initial time of I-T tables are not going to help me in case of over-clocking and hence I'll not be able to use that model with composite current for even SI simulations with most of tools.


Regards
Prabhat 





- -----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of Muranyi, Arpad
Sent: Thursday, December 16, 2010 11:26 AM
To: ibis@eda.org; ibis-users@eda.org
Subject: RE: [IBIS] Composite current and Initial dead time in waveform table

Prabhat,

You are raising a very good point.  The question is how much
can you remove from the beginning of the waveform tables.

You wrote that the "IBIS specification recommends to remove
the initial non-switching time".  I tried to find this in
the specification to double check the exact wording, but I
can't find this recommendation in the specification.  Can you
give me a page number for it?  Or is this in the Cookbook?

Either way, common sense would dictate that if you want to 
be able to get correct power currents, you should NOT chop
off the beginning of the I-T table just because the V-t table
is inactive.  In other words, when you decide how much to shift
the waveforms to the left, don't make your decision solely based
on the content of the V-t tables, look at the I-T tables also
and move things to the left only by as much as the shortest
inactive I-T or V-t waveform lets you.

Please let me know where the spec or Cookbook talks about this
so we could make the necessary corrections if the wording is
incorrect or misleading.  Please keep in mind that the I-T
tables were added much later to the specification as the V-t
tables, and we may have forgotten to update some text which
deals with this topic in the V-t sections when the I-T section
was added.

Arpad
================================================================

- -----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of
Prabhat RANJAN
Sent: Wednesday, December 15, 2010 9:34 PM
To: ibis@eda.org; ibis-users@eda.org
Cc: Prabhat RANJAN
Subject: [IBIS] Composite current and Initial dead time in waveform
table

Hello Experts,

Composite current tables have been introduced in IBIS ver5.0 for better
modeling of pre-driver and driver current.
In buffers, major pre-driver current flows from source just after input
stimuli transition and before the output driver actually starts
switching.

Also, IBIS specification recommends to remove the initial non-switching
time (or dead-time or startup time) from waveform tables to avoid the
over-clocking issues.

If my buffer needs to remove the initial non-switching time from
waveform tables then I have to remove or shift the corresponding
composite current tables also. This shifting of composite current will
remove all pre-driver currents from tables and hence I shall not be able
to get advantages of composite current.

In most of high speed buffers, non-switching times should be removed
from waveform tables but we also need complete composite current with
pre-driver current for accurate power integrity.

So, I am wondering that how composite current tables are going to be
useful in above cases??


- -- 
Regards
Prabhat Ranjan
STMicroelectronics

- -- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.


- --------------------------------------------------------------------
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|with the appropriate command message(s) in the body:
|
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|  unsubscribe ibis-users <optional e-mail address, if different>
|
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------------------------------

Date: Wed, 15 Dec 2010 21:56:20 -0800
From: "Muranyi, Arpad" <Arpad_Muranyi@mentor.com>
Subject: [IBIS-Users] RE: [IBIS] Composite current and Initial dead time in waveform table

Prabhat,

You are raising a very good point.  The question is how much
can you remove from the beginning of the waveform tables.

You wrote that the "IBIS specification recommends to remove
the initial non-switching time".  I tried to find this in
the specification to double check the exact wording, but I
can't find this recommendation in the specification.  Can you
give me a page number for it?  Or is this in the Cookbook?

Either way, common sense would dictate that if you want to 
be able to get correct power currents, you should NOT chop
off the beginning of the I-T table just because the V-t table
is inactive.  In other words, when you decide how much to shift
the waveforms to the left, don't make your decision solely based
on the content of the V-t tables, look at the I-T tables also
and move things to the left only by as much as the shortest
inactive I-T or V-t waveform lets you.

Please let me know where the spec or Cookbook talks about this
so we could make the necessary corrections if the wording is
incorrect or misleading.  Please keep in mind that the I-T
tables were added much later to the specification as the V-t
tables, and we may have forgotten to update some text which
deals with this topic in the V-t sections when the I-T section
was added.

Arpad
================================================================

- -----Original Message-----
From: owner-ibis@eda.org [mailto:owner-ibis@eda.org] On Behalf Of
Prabhat RANJAN
Sent: Wednesday, December 15, 2010 9:34 PM
To: ibis@eda.org; ibis-users@eda.org
Cc: Prabhat RANJAN
Subject: [IBIS] Composite current and Initial dead time in waveform
table

Hello Experts,

Composite current tables have been introduced in IBIS ver5.0 for better
modeling of pre-driver and driver current.
In buffers, major pre-driver current flows from source just after input
stimuli transition and before the output driver actually starts
switching.

Also, IBIS specification recommends to remove the initial non-switching
time (or dead-time or startup time) from waveform tables to avoid the
over-clocking issues.

If my buffer needs to remove the initial non-switching time from
waveform tables then I have to remove or shift the corresponding
composite current tables also. This shifting of composite current will
remove all pre-driver currents from tables and hence I shall not be able
to get advantages of composite current.

In most of high speed buffers, non-switching times should be removed
from waveform tables but we also need complete composite current with
pre-driver current for accurate power integrity.

So, I am wondering that how composite current tables are going to be
useful in above cases??


- -- 
Regards
Prabhat Ranjan
STMicroelectronics

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------------------------------

Date: Thu, 2 Dec 2010 08:34:52 -0600
From: John Phillippe <john.phillippe@freescale.com>
Subject: Re: [IBIS-Users]

Vinayak,
   The IBIS standard itself doesn't allow for any kind of feedback 
modeling of slew rate control.  I forget the exact IBIS version, but 
either 4.0, 4.2 or 5.0 allows for the inclusion of verilog-A models 
which can be written to model this behavior.

Ghatawade, Vinayak wrote:
> All,
> 
>  
> 
> This has been discussed previously in this forum on modeling Adaptive 
> feedback buffers.
> 
> Is there anyway we can model adaptive feedback buffer which depends on 
> the PAD voltage and inturn switches on pmos/nmos depending on external 
> loading condition.
> 
>  
> 
> I tried looking at few of the options like driver schedule but since 
> these are timing related I cannot use for my case since in my case the 
> buffer
> 
> Adjust the slews based on PAD voltage and not with respect to the time 
> (delayed turn on). Also if I want to model the PAD dependency in time 
> domain this will be very
> 
> Specific to a loading condition. Since IBIS modeling can be done using 
> R_load only we cannot make sure this approach can work across different 
> user conditions (tline, loading etc).
> 
>  
> 
> Do you have any other suggestion to model a buffer with PAD feedback.
> 
>  
> 
> Thanks
> 
> vinayak
> 
>  
> 
>  
> 
> ------------------------------------------------------------------------
> 
> -- 
> This message has been scanned for viruses and
> dangerous content by *MailScanner* <http://www.mailscanner.info/>, and is
> believed to be clean.


- -- 
John Phillippe
MSG, I/O Pad Design
Freescale  - 512-895-1835
Austin, TX - john.phillippe@freescale.com


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------------------------------

Date: Tue, 23 Nov 2010 01:41:21 -0800
From: "Tom Dagostino" <tom@teraspeed.com>
Subject: RE: [IBIS-Users] Extract IBIS data from lab measurement

This is a multi-part message in MIME format.

- ------=_NextPart_000_041A_01CB8AAF.89371730
Content-Type: text/plain;
	charset="us-ascii"
Content-Transfer-Encoding: 7bit

Yuancheng

 

It is easy to extract good VT data from a measurement if you have the proper
equipment.  We've done this for 1000s of models.

 

Hopefully you are not trying to measure at -3.3V.  If you are I can
understand that there would be a large difference between what is measured
and what the manufacture's model shows. I've not seen an IC's ground clamp
that could handle that much forward bias.  You need to keep the forward bias
to a volt or less in most cases and extrapolate to -Vdd.  But without
knowing what difference you are seeing it is hard to tell why you are seeing
it.

 

Regards,

 

Tom Dagostino

Teraspeed Labs

13610 SW Harness Lane

Beaverton, OR 97008

503-430-1065

tom@teraspeed.com 

www.teraspeed.com 

 

Teraspeed Consulting Group LLC

121 North River Drive
Narragansett, RI 02882

401-284-1827

www.teraspeed.com  

 

From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf
Of ji xiao
Sent: Tuesday, November 23, 2010 1:15 AM
To: ibis-users
Subject: [IBIS-Users] Extract IBIS data from lab measurement

 

Dear all,

I want to extract the IV and Vt data from the chip measurement results, but
there are two problems.

1. For the Vt data, IBIS cookbook Version 4.0 and 5.0 only mention the
procedure of extract ramp rate. If I want to extract the detail Vt curve
table from the measurement results of a packaged chip, is it possible?  

2. For the IV data, I successfully extract it from the measurement but the
extracted result only show agreement with original IBIS model (provided by
manufacturer)  for operation region. When out of the operation region, i.e.,
in diode model, the IV characteristics  I got is quite different from the
original one.

For example, the voltage operation region of my chip is [-0.5, 3.8], in this
range, the measurement value of current is reasonable. However, for the
current measured beyond this voltage range, such as [-3.3, -0.5], the
measurement result will distort severely from the original IBIS value. Could
anyone help me analyze the possible reason for the disagreement? Or is there
something wrong I may make in measurement setting? (I made the measurement
setup according to cookbook version4.0)

 

Thanks and regards,

 

Yuancheng


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erator content=3D"Microsoft Word 12 (filtered medium)"><style><!--
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</o:shapelayout></xml><![endif]--></head><body lang=3DEN-US link=3Dblue vli=
nk=3Dpurple><div class=3DWordSection1><p class=3DMsoNormal><span style=3D'f=
ont-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Yuancheng=
<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:11.0pt;=
font-family:"Calibri","sans-serif";color:#1F497D'><o:p>&nbsp;</o:p></span><=
/p><p class=3DMsoNormal><span style=3D'font-size:11.0pt;font-family:"Calibr=
i","sans-serif";color:#1F497D'>It is easy to extract good VT data from a me=
asurement if you have the proper equipment.&nbsp; We&#8217;ve done this for=
 1000s of models.<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'=
font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p>&nb=
sp;</o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:11.0pt;fo=
nt-family:"Calibri","sans-serif";color:#1F497D'>Hopefully you are not tryin=
g to measure at -3.3V.&nbsp; If you are I can understand that there would b=
e a large difference between what is measured and what the manufacture&#821=
7;s model shows. I&#8217;ve not seen an IC&#8217;s ground clamp that could =
handle that much forward bias.&nbsp; You need to keep the forward bias to a=
 volt or less in most cases and extrapolate to &#8211;Vdd.&nbsp; But withou=
t knowing what difference you are seeing it is hard to tell why you are see=
ing it.<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:=
11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p>&nbsp;</o:p><=
/span></p><p class=3DMsoNormal><span style=3D'font-size:11.0pt;font-family:=
"Calibri","sans-serif";color:#1F497D'>Regards,<o:p></o:p></span></p><p clas=
s=3DMsoNormal><span style=3D'font-size:11.0pt;font-family:"Calibri","sans-s=
erif";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span=
 style=3D'font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D=
'>Tom Dagostino<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'fo=
nt-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Teraspeed =
Labs<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:11.=
0pt;font-family:"Calibri","sans-serif";color:#1F497D'>13610 SW Harness Lane=
<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:11.0pt;=
font-family:"Calibri","sans-serif";color:#1F497D'>Beaverton, OR 97008<o:p><=
/o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:11.0pt;font-f=
amily:"Calibri","sans-serif";color:#1F497D'>503-430-1065<o:p></o:p></span><=
/p><p class=3DMsoNormal><span style=3D'font-size:11.0pt;font-family:"Calibr=
i","sans-serif";color:#1F497D'>tom@teraspeed.com <o:p></o:p></span></p><p c=
lass=3DMsoNormal><span style=3D'font-size:11.0pt;font-family:"Calibri","san=
s-serif";color:#1F497D'>www.teraspeed.com <o:p></o:p></span></p><p class=3D=
MsoNormal><span style=3D'font-size:11.0pt;font-family:"Calibri","sans-serif=
";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span sty=
le=3D'font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Te=
raspeed Consulting Group LLC<o:p></o:p></span></p><p class=3DMsoNormal><spa=
n style=3D'font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497=
D'>121 North River Drive<br>Narragansett, RI 02882<o:p></o:p></span></p><p =
class=3DMsoNormal><span style=3D'font-size:11.0pt;font-family:"Calibri","sa=
ns-serif";color:#1F497D'>401-284-1827<o:p></o:p></span></p><p class=3DMsoNo=
rmal><span style=3D'font-size:11.0pt;font-family:"Calibri","sans-serif";col=
or:#1F497D'>www.teraspeed.com&nbsp; <o:p></o:p></span></p><p class=3DMsoNor=
mal><span style=3D'font-size:11.0pt;font-family:"Calibri","sans-serif";colo=
r:#1F497D'><o:p>&nbsp;</o:p></span></p><div style=3D'border:none;border-top=
:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in'><p class=3DMsoNormal><b><sp=
an style=3D'font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span=
></b><span style=3D'font-size:10.0pt;font-family:"Tahoma","sans-serif"'> ow=
ner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] <b>On Behalf Of </=
b>ji xiao<br><b>Sent:</b> Tuesday, November 23, 2010 1:15 AM<br><b>To:</b> =
ibis-users<br><b>Subject:</b> [IBIS-Users] Extract IBIS data from lab measu=
rement<o:p></o:p></span></p></div><p class=3DMsoNormal><o:p>&nbsp;</o:p></p=
><p class=3DMsoNormal><span style=3D'font-family:"Arial","sans-serif"'>Dear=
 all,</span><o:p></o:p></p><div><p class=3DMsoNormal><span style=3D'font-fa=
mily:"Arial","sans-serif"'>I want to extract the IV and Vt data from the ch=
ip measurement results, but there are two problems.</span><o:p></o:p></p></=
div><div><p class=3DMsoNormal><span style=3D'font-family:"Arial","sans-seri=
f"'>1. For the Vt data, IBIS cookbook Version 4.0 and 5.0 only mention the =
procedure of extract ramp rate. If I want to extract the detail Vt curve ta=
ble from the measurement results of a packaged chip, is it possible? &nbsp;=
</span><o:p></o:p></p></div><div><p class=3DMsoNormal><span style=3D'font-f=
amily:"Arial","sans-serif"'>2. For the IV data, I successfully extract it f=
rom the measurement but the extracted result only show agreement with origi=
nal IBIS model (provided by manufacturer) &nbsp;for operation region. When =
out of the operation region, i.e., in diode model, the IV characteristics &=
nbsp;I got is quite different from the original one.</span><o:p></o:p></p><=
/div><div><p class=3DMsoNormal><span style=3D'font-family:"Arial","sans-ser=
if"'>For example, the voltage operation region of my chip is&nbsp;[-0.5, 3.=
8], in this range, the measurement value of current is reasonable. However,=
 for the current measured beyond this voltage range, such as [-3.3, -0.5], =
the measurement result will distort severely from the original IBIS value. =
Could anyone help me analyze the possible reason for the disagreement? Or i=
s there something wrong I may make in measurement setting? (I made the meas=
urement setup according to cookbook version4.0)</span><o:p></o:p></p></div>=
<div><p class=3DMsoNormal><o:p>&nbsp;</o:p></p></div><div><p class=3DMsoNor=
mal><span style=3D'font-size:10.5pt;font-family:"Arial","sans-serif"'>Thank=
s and regards,</span><o:p></o:p></p></div><div><p class=3DMsoNormal><o:p>&n=
bsp;</o:p></p></div><div><p class=3DMsoNormal><span style=3D'font-size:10.5=
pt;font-family:"Arial","sans-serif"'>Yuancheng</span><o:p></o:p></p></div><=
p class=3DMsoNormal><br>-- <br>This message has been scanned for viruses an=
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------------------------------

Date: Fri, 10 Dec 2010 15:48:48 -0800
From: Bob Ross <bob@teraspeed.com>
Subject: [IBIS-Users] New IBISCHK5 Version 5.0.4  Executables

All:

Per the announcement at the IBIS meeting today, a partial set
of ibischk5 executables (Version 5.0.4) are uploaded  for several
operating systems:

  http://www.eda.org/ibis/ibischk5/

and the previous versions 5.0.3 are under the old_v503/ subdirectory.

See 00readme.txt for more information, but the following BUG reports
were processed:

        BUG99      Misleading Text in [Node Declarations] Error Message
        BUG101     No Warning for Unused [Model Selector] Name
        BUG103     Driver Schedule Delay Value Tests
        BUG105     Incorrect Error for [Model Selector] Description Field Length
        BUG106     S_overshoot_* Invalid for Some Model_types
        BUG107     Checking for [Ramp] dV_r and dV_f
        BUG114     V4.X Name and Column Lengths for [Submodel] and
                   [Model Selector]
        BUG118     Vmeas Check with Version 4.2.1 and Beyond Failure
        BUG119     Waveform Test Missing Results with Version 4.2.1 and Beyond
        BUG121     Broken Missing [Component] Test

Note, BUG107 now allows checking (and calculation) of dV_f and dV_r
when the -caution flag is used.

Several executables still need to be generated and uploaded.  Let us know if
there are any errors or problems.

Bob

- -- 
Bob Ross
Teraspeed Consulting Group LLC     Teraspeed Labs
121 North River Drive              13610 SW Harness Lane
Narragansett, RI 02882             Beaverton, OR 97008
401-284-1827                       503-430-1065
http://www.teraspeed.com           503-246-8048 Direct
bob@teraspeed.com

Teraspeed is a registered service mark of Teraspeed Consulting Group LLC


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|  http://www.eda-stds.org/pub/ibis/users_archive/ Recent
|  http://www.eda-stds.org/pub/ibis/email/         E-mail since 1993

------------------------------

Date: Thu, 16 Dec 2010 15:40:45 -0500
From: "Lance Wang" <lwang@iometh.com>
Subject: [IBIS-Users] IBIS SUMMIT at DesignCon 2011 - First call for participation and presentations

This is a multipart message in MIME format.

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To All: 

 

 

The IBIS Open Forum is pleased to announce our IBIS Summit meeting at 

DesignCon 2011.  The Summit will be held at the Santa Clara Convention 

Center in Santa Clara, California, during DesignCon 2011. 

 

IBIS Summits are designed to enable face-to-face interactions between 

model users, model makers and tool developers in the IBIS Community.

Those interested in presenting at or in attending the event may register

using the information below.  

 

The IBIS Open Forum is sponsoring the event, but we welcome additional 

sponsors to cover some of the meeting expenses, including the FREE lunch and


refreshments. 

 

We look forward to seeing you in Santa Clara!

 

 

Best Regards, 

 

 

Michael Mirmak

Intel Corp.

Chair, IBIS Open Forum

 

 

 

- ----------------------------------------------------------------------- 

 

 

                               IBIS SUMMIT 

                              FIRST CALL FOR         

               PARTICIPATION & PRESENTATIONS 

 

 

- ----------------------------------------------------------------------- 

 

 

                  I B I S   S U M M I T   M E E T I N G 

 

 

Time/Date: Thursday, February 3, 2011 8:00 AM to 5:00 PM 

 

 

Location: Santa Clara Convention Center 

          5101 Great America Parkway, 

          Santa Clara, California, USA 

 

 

Room:     Great America Ballroom 3

          Santa Clara Convention Center 

 

 

Content:  Presentations and Discussions 

 

 

Purpose:  Solicit and Exchange IBIS Model Related Information and 

            ideas. 

 

 

Costs:    FREE 

 

Sponsors: IBIS Open Forum, DesignCon

 

 

            We are seeking more co-sponsors. The benefits to sponsors
include 

            recognition at the meeting and acknowledgement in the Calls 

            for Papers and meeting minutes. 

 

 

            Your financial support strengthens the organization by 

            allowing IBIS to focus resources on industry activities 

            rather than raising money.  You will receive generous 

            thanks and public acknowledgement for your support. 

 

            Please contact Lance Wang <lwang@iometh.com> for co-sponsorship 

            information.

 

  

DesignCon 2011 Conference: 

 

 

            January 31 - February 4, 2011 

            Santa Clara Convention Center 

            Santa Clara, CA 

  

              http://www.designcon.com/2011/ 

 

 

            Exhibits registration: 

 

 

              http://designcon.techinsightsevents.com/how_to_register

 

 

            Conference Schedule: 

    

              http://designcon.techinsightsevents.com/conference

 

 

Information on discounts for IBIS Summit attendees will be announced 

when available.

 

 

BACKGROUND 

 

 

DesignCon is the premier annual Silicon Valley event for the electronic 

design automation (EDA) and semiconductor industry. Topics of current 

interest to the IBIS Open Forum are addressed at DesignCon. 

 

 

This meeting will be conducted as a formal IBIS meeting. 

 

 

Presentations are expected to be available and archived in an electronic 

format, and minutes of the meeting will be issued. Any pending formal 

decisions (votes) will be announced at least two weeks prior to the 

meeting. 

 

 

 

CALL FOR PARTICIPANTS 

 

 

People involved in IBIS Model development, EDA tool development, and 

digital circuit design are invited to participate in the Summit meeting. 

If you plan to participate, please register with the information below: 

 

 

   Name: 

   E-mail address: 

   Company: 

   Telephone: 

 

 

Send your registration information to Lance Wang <lwang@iometh.com>. 

 

 

Registration deadline is Wednesday, January 27, 2011 to receive the free 

lunch. 

 

 

 

CALL FOR PRESENTATIONS 

  

We are seeking presentations from individuals who have experiences of 

interest to the IBIS modeling community. These can include, but are not 

limited to: 

 

 

   Demonstrations of modeling techniques 

   Explanations of behavioral algorithms 

   Descriptions of difficulties encountered 

   Model correlation 

   Modeling building experiences 

   Comparisons to other modeling methods 

   New technologies for modeling buffers and component 

   New technologies for modeling packaging and interconnects 

   Algorithmic modeling topics 

   Etc. 

 

 

Presentations may be addressed to any and all levels of IBIS experience, 

from beginner to expert. 

 

 

Presentation Format: 

 

   Microsoft Powerpoint* or Adobe Acrobat* 

   electronic formats are favored and will pre-loaded on the 

   Microsoft Windows*-based meeting laptop prior to the meeting. 

   Materials will be projected but handouts or other physical media

   are welcome.

  

Time: Usually 15-30 Minutes 

 

 

Electronic Archival: 

 

   Presentations will be archived under the IBIS Summits site 

   and also must be submitted in time for uploading and copying. 

   Final submission deadline is: 

 

 

     Wednesday, January 27, 2011

 

 

   Otherwise, presenters must bring 50 copies for distribution. 

 

 

If you plan a presentation, please supply the following information as 

soon as possible: 

 

 

   Presentation Title: 

   Presenter: 

   E-mail address: 

   Company: 

   Telephone: 

   Estimated Time: 

  

Send to - Michael Mirmak <michael.mirmak@intel.com> 

 

 

Note, vendor-specific or product promotion material is forbidden at 

IBIS summits.  We strongly advise that the presentations be submitted 

by the deadline for review. The IBIS Open Forum reserves the right to 

stop or reject a scheduled presentation that has not been reviewed. 

 

 

AGENDA 

 

 

The agenda includes presentations, discussions, breaks, and a FREE 

lunch.  A formal list of speakers and topics will be released one

week prior to the event.

 

 

HOTEL AND TRAVEL INFORMATION 

 

 

The Hotel and Travel Link below provides a conference hotel discount, as

well as transportation suggestions: 

 

 

    http://designcon.techinsightsevents.com/travel_information

 

 


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osoft-com:office:office" xmlns:w=3D"urn:schemas-microsoft-com:office:word" =
xmlns:m=3D"http://schemas.microsoft.com/office/2004/12/omml" xmlns=3D"http:=
//www.w3.org/TR/REC-html40"><head><meta http-equiv=3DContent-Type content=
=3D"text/html; charset=3Dus-ascii"><meta name=3DGenerator content=3D"Micros=
oft Word 14 (filtered medium)"><style><!--
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	{size:8.5in 11.0in;
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<o:shapedefaults v:ext=3D"edit" spidmax=3D"1026" />
</xml><![endif]--><!--[if gte mso 9]><xml>
<o:shapelayout v:ext=3D"edit">
<o:idmap v:ext=3D"edit" data=3D"1" />
</o:shapelayout></xml><![endif]--></head><body lang=3DEN-US link=3Dblue vli=
nk=3Dpurple><div class=3DWordSection1><p class=3DMsoNormal>To All: <o:p></o=
:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>=
&nbsp;</o:p></p><p class=3DMsoNormal>The IBIS Open Forum is pleased to anno=
unce our IBIS Summit meeting at <o:p></o:p></p><p class=3DMsoNormal>DesignC=
on 2011.&nbsp; The Summit will be held at the Santa Clara Convention <o:p><=
/o:p></p><p class=3DMsoNormal>Center in Santa Clara, California, during Des=
ignCon 2011. <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p cl=
ass=3DMsoNormal>IBIS Summits are designed to enable face-to-face interactio=
ns between <o:p></o:p></p><p class=3DMsoNormal>model users, model makers an=
d tool developers in the IBIS Community.<o:p></o:p></p><p class=3DMsoNormal=
>Those interested in presenting at or in attending the event may register<o=
:p></o:p></p><p class=3DMsoNormal>using the information below.&nbsp; <o:p><=
/o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>The=
 IBIS Open Forum is sponsoring the event, but we welcome additional <o:p></=
o:p></p><p class=3DMsoNormal>sponsors to cover some of the meeting expenses=
, including the FREE lunch and <o:p></o:p></p><p class=3DMsoNormal>refreshm=
ents. <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DM=
soNormal>We look forward to seeing you in Santa Clara!<o:p></o:p></p><p cla=
ss=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p><=
/p><p class=3DMsoNormal>Best Regards, <o:p></o:p></p><p class=3DMsoNormal><=
o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMs=
oNormal>Michael Mirmak<o:p></o:p></p><p class=3DMsoNormal>Intel Corp.<o:p><=
/o:p></p><p class=3DMsoNormal>Chair, IBIS Open Forum<o:p></o:p></p><p class=
=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p=
><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>-----------=
- ------------------------------------------------------------ <o:p></o:p></p=
><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;=
</o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; IBIS SUMMIT <=
o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;FIRST CALL=
 FOR&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; <o:p></o:p></p><p clas=
s=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;PARTICIPATION &amp; PRESENTATIONS <o:p></o:p><=
/p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbs=
p;</o:p></p><p class=3DMsoNormal>------------------------------------------=
- ----------------------------- <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbs=
p;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp; I B I S&nbsp;&nbsp; S U M M I T&nbsp;&nbsp; M E=
 E T I N G <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p clas=
s=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>Time/Date: Thursday=
, February 3, 2011 8:00 AM to 5:00 PM <o:p></o:p></p><p class=3DMsoNormal><=
o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMs=
oNormal>Location: Santa Clara Convention Center <o:p></o:p></p><p class=3DM=
soNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;5101 G=
reat America Parkway, <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Santa Clara, California, USA <o:=
p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>=
<o:p>&nbsp;</o:p></p><p class=3DMsoNormal>Room:&nbsp;&nbsp;&nbsp;&nbsp; Gre=
at America Ballroom 3<o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Santa Clara Convention Center <o:p></o=
:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>=
&nbsp;</o:p></p><p class=3DMsoNormal>Content:&nbsp; Presentations and Discu=
ssions <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3D=
MsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>Purpose:&nbsp; Solicit =
and Exchange IBIS Model Related Information and <o:p></o:p></p><p class=3DM=
soNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;ideas. <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p cl=
ass=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>Costs:&nbsp;&nbsp=
;&nbsp; FREE <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p cl=
ass=3DMsoNormal>Sponsors: IBIS Open Forum, DesignCon<o:p></o:p></p><p class=
=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p=
><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp; We are seeking more co-sponsors. The benefits to sponsors inc=
lude <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;recognition at the meeting and acknow=
ledgement in the Calls <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;for Papers and meet=
ing minutes. <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p cl=
ass=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp=
;&nbsp; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Your financial support st=
rengthens the organization by <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;allowing IBI=
S to focus resources on industry activities <o:p></o:p></p><p class=3DMsoNo=
rmal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;rather than raising money.&nbsp; You will receive generous <o:p></o:p></p=
><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;thanks and public acknowledgement for your support. <o:p=
></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Please co=
ntact Lance Wang &lt;lwang@iometh.com&gt; for co-sponsorship <o:p></o:p></p=
><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;information.<o:p></o:p></p><p class=3DMsoNormal><o:p>&nb=
sp;</o:p></p><p class=3DMsoNormal>&nbsp; <o:p></o:p></p><p class=3DMsoNorma=
l>DesignCon 2011 Conference: <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp=
;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; January 3=
1 - February 4, 2011 <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Santa Clara Conventio=
n Center <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Santa Clara, CA <o:p></o:p></p><p=
 class=3DMsoNormal>&nbsp;&nbsp;<o:p></o:p></p><p class=3DMsoNormal>&nbsp;&n=
bsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;http://www.designcon.com/2011/ <o:p></o:p></p><p class=3DMsoNormal><o:p>&n=
bsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNorma=
l>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Exhibi=
ts registration: <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><=
p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; http://de=
signcon.techinsightsevents.com/how_to_register<o:p></o:p></p><p class=3DMso=
Normal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p cl=
ass=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp; Conference Schedule: <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbs=
p;&nbsp;&nbsp;<o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;http://designcon=
.techinsightsevents.com/conference<o:p></o:p></p><p class=3DMsoNormal><o:p>=
&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNor=
mal>Information on discounts for IBIS Summit attendees will be announced <o=
:p></o:p></p><p class=3DMsoNormal>when available.<o:p></o:p></p><p class=3D=
MsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p=
 class=3DMsoNormal>BACKGROUND <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbs=
p;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>=
DesignCon is the premier annual Silicon Valley event for the electronic <o:=
p></o:p></p><p class=3DMsoNormal>design automation (EDA) and semiconductor =
industry. Topics of current <o:p></o:p></p><p class=3DMsoNormal>interest to=
 the IBIS Open Forum are addressed at DesignCon. <o:p></o:p></p><p class=3D=
MsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p=
 class=3DMsoNormal>This meeting will be conducted as a formal IBIS meeting.=
 <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNor=
mal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>Presentations are expected to=
 be available and archived in an electronic <o:p></o:p></p><p class=3DMsoNo=
rmal>format, and minutes of the meeting will be issued. Any pending formal =
<o:p></o:p></p><p class=3DMsoNormal>decisions (votes) will be announced at =
least two weeks prior to the <o:p></o:p></p><p class=3DMsoNormal>meeting. <=
o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNorma=
l><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=
=3DMsoNormal>CALL FOR PARTICIPANTS <o:p></o:p></p><p class=3DMsoNormal><o:p=
>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNo=
rmal>People involved in IBIS Model development, EDA tool development, and <=
o:p></o:p></p><p class=3DMsoNormal>digital circuit design are invited to pa=
rticipate in the Summit meeting. <o:p></o:p></p><p class=3DMsoNormal>If you=
 plan to participate, please register with the information below: <o:p></o:=
p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&=
nbsp;</o:p></p><p class=3DMsoNormal>&nbsp;&nbsp; Name: <o:p></o:p></p><p cl=
ass=3DMsoNormal>&nbsp;&nbsp;&nbsp;E-mail address: <o:p></o:p></p><p class=
=3DMsoNormal>&nbsp;&nbsp;&nbsp;Company: <o:p></o:p></p><p class=3DMsoNormal=
>&nbsp;&nbsp;&nbsp;Telephone: <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbs=
p;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>=
Send your registration information to Lance Wang &lt;lwang@iometh.com&gt;. =
<o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNorm=
al><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>Registration deadline is Wedne=
sday, January 27, 2011 to receive the free <o:p></o:p></p><p class=3DMsoNor=
mal>lunch. <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p clas=
s=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></=
p><p class=3DMsoNormal>CALL FOR PRESENTATIONS <o:p></o:p></p><p class=3DMso=
Normal>&nbsp;&nbsp;<o:p></o:p></p><p class=3DMsoNormal>We are seeking prese=
ntations from individuals who have experiences of <o:p></o:p></p><p class=
=3DMsoNormal>interest to the IBIS modeling community. These can include, bu=
t are not <o:p></o:p></p><p class=3DMsoNormal>limited to: <o:p></o:p></p><p=
 class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o=
:p></p><p class=3DMsoNormal>&nbsp;&nbsp; Demonstrations of modeling techniq=
ues <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;Explanations of b=
ehavioral algorithms <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;=
Descriptions of difficulties encountered <o:p></o:p></p><p class=3DMsoNorma=
l>&nbsp;&nbsp;&nbsp;Model correlation <o:p></o:p></p><p class=3DMsoNormal>&=
nbsp;&nbsp;&nbsp;Modeling building experiences <o:p></o:p></p><p class=3DMs=
oNormal>&nbsp;&nbsp;&nbsp;Comparisons to other modeling methods <o:p></o:p>=
</p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;New technologies for modeling bu=
ffers and component <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;N=
ew technologies for modeling packaging and interconnects <o:p></o:p></p><p =
class=3DMsoNormal>&nbsp;&nbsp;&nbsp;Algorithmic modeling topics <o:p></o:p>=
</p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;Etc. <o:p></o:p></p><p class=3DM=
soNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p =
class=3DMsoNormal>Presentations may be addressed to any and all levels of I=
BIS experience, <o:p></o:p></p><p class=3DMsoNormal>from beginner to expert=
. <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNo=
rmal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>Presentation Format: <o:p></=
o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>&nbs=
p;&nbsp; Microsoft Powerpoint* or Adobe Acrobat* <o:p></o:p></p><p class=3D=
MsoNormal>&nbsp;&nbsp;&nbsp;electronic formats are favored and will pre-loa=
ded on the <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;Microsoft =
Windows*-based meeting laptop prior to the meeting. <o:p></o:p></p><p class=
=3DMsoNormal>&nbsp;&nbsp;&nbsp;Materials will be projected but handouts or =
other physical media<o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp; are we=
lcome.<o:p></o:p></p><p class=3DMsoNormal>&nbsp; <o:p></o:p></p><p class=3D=
MsoNormal>Time: Usually 15-30 Minutes <o:p></o:p></p><p class=3DMsoNormal><=
o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMs=
oNormal>Electronic Archival: <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp=
;</o:p></p><p class=3DMsoNormal>&nbsp;&nbsp; Presentations will be archived=
 under the IBIS Summits site <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbs=
p;&nbsp;and also must be submitted in time for uploading and copying. <o:p>=
</o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;Final submission deadline =
is: <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMso=
Normal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;&nbsp; W=
ednesday, January 27, 2011<o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</=
o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>&nbs=
p;&nbsp; Otherwise, presenters must bring 50 copies for distribution. <o:p>=
</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o=
:p>&nbsp;</o:p></p><p class=3DMsoNormal>If you plan a presentation, please =
supply the following information as <o:p></o:p></p><p class=3DMsoNormal>soo=
n as possible: <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p =
class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>&nbsp;&nbsp; Pr=
esentation Title: <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;Pre=
senter: <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;E-mail addres=
s: <o:p></o:p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;Company: <o:p></o:=
p></p><p class=3DMsoNormal>&nbsp;&nbsp;&nbsp;Telephone: <o:p></o:p></p><p c=
lass=3DMsoNormal>&nbsp;&nbsp;&nbsp;Estimated Time: <o:p></o:p></p><p class=
=3DMsoNormal>&nbsp;&nbsp;<o:p></o:p></p><p class=3DMsoNormal>Send to - Mich=
ael Mirmak &lt;michael.mirmak@intel.com&gt; <o:p></o:p></p><p class=3DMsoNo=
rmal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p clas=
s=3DMsoNormal>Note, vendor-specific or product promotion material is forbid=
den at <o:p></o:p></p><p class=3DMsoNormal>IBIS summits.&nbsp; We strongly =
advise that the presentations be submitted <o:p></o:p></p><p class=3DMsoNor=
mal>by the deadline for review. The IBIS Open Forum reserves the right to <=
o:p></o:p></p><p class=3DMsoNormal>stop or reject a scheduled presentation =
that has not been reviewed. <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;=
</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>AG=
ENDA <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMs=
oNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>The agenda includes prese=
ntations, discussions, breaks, and a FREE <o:p></o:p></p><p class=3DMsoNorm=
al>lunch.&nbsp; A formal list of speakers and topics will be released one<o=
:p></o:p></p><p class=3DMsoNormal>week prior to the event.<o:p></o:p></p><p=
 class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o=
:p></p><p class=3DMsoNormal>HOTEL AND TRAVEL INFORMATION <o:p></o:p></p><p =
class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:=
p></p><p class=3DMsoNormal>The Hotel and Travel Link below provides a confe=
rence hotel discount, as<o:p></o:p></p><p class=3DMsoNormal>well as transpo=
rtation suggestions: <o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p><=
/p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>&nbsp;&nb=
sp;&nbsp; http://designcon.techinsightsevents.com/travel_information<o:p></=
o:p></p><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal><o:p=
>&nbsp;</o:p></p></div><br />--=20
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