From: owner-ibis-users@eda.org (ibis-users)
To: ibis-users-digest@eda.org
Subject: ibis-users V1 #201
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ibis-users           Wednesday, May 9 2012           Volume 01 : Number 201




----------------------------------------------------------------------

Date: Mon, 7 Nov 2011 17:59:26 -0800
From: "Bob Ross" <bob@teraspeed.com>
Subject: [IBIS-Users] Asian IBIS Summit (Shanghai) - Agenda

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All:

 

Attached is the Agenda for a full meting 13 presentations.

We look forward to seeing you in Shanghai.

 

Bob and Lance

 

- ------------------------------------------------------------------

 

       A S I A N   I B I S   S U M M I T    I N F O R M A T I O N

 

Time/Date:  8:15 - 17:30, Tuesday November 15, 2011

 

Location:   Parkyard Hotel Shanghai

            699 Bibo Road

            Zhangjiang Hi-Tech Park

            Shanghai 201203

            P.R. China

 

Rooms:      Ballroom ABC   (Look for signs)

 

Sponsors:   Huawei Technologies (Primary)

            Agilent Technologies

            ANSYS

            Cadence Design Systems

            Intel Corporation

            IO Methodology

            Sigrity

            Synopsys

            ZTE Corporation

 

- ------------------------------------------------------------------

 

          I B I S  S U M M I T  M E E T I N G  A G E N D A

 

8:15    REFRESHMENTS & SIGN IN

         - Vendor Tables Open at 8:30

 

8:45    Welcome

         - Li, JinJun

           (Huawei Technologies, China)

         - Mirmak, Michael

           (Chair, IBIS Open Forum, Intel Corporation, USA)

 

9:00    IBIS Status and Future Direction

          Mirmak, Michael (Intel Corporation, USA)

 

9:15    IBIS Model as De-Facto Standard

          Kusunoki, Kazuhiko* and Dai, WenLiang**

          (*Wadow Co., Japan and **Xpeedic, China)

 

9:40    IBIS VT Waveform and Over Clocking

          Chen, XueFeng (Synopsys, China)

10:10   BREAK (Refreshments and Vendor Tables)

 

10:30   IBIS Parsers

          Ross, Bob (Teraspeed Consulting Group, USA)

 

11:00   DDR3 System Timing Budget Analysis by SI&PI Co-Simulation

          Yi, Bi; Wang, Ping; and Zhu, Shunlin (ZTE Corporation, China)

 

11:30   Modeling the On-die De-cap of IBIS 5.0 PDN-aware Buffers

          Wang, Lance* and Wolff, Randy**

          (*IO Methodology, and **Micron Technology, USA)

 

12:00   FREE BUFFET LUNCH (Hosted by Sponsors)

          - Vendor Tables

 

13:30   Power-aware I/O Modeling for High-speed Parallel Bus Simulation

          Qin, ZuLi#; Wang' HaiSan#; Lin, Jack W.C.#;

          and Chen, Raymond Y.##

          (Sigrity, #China, ##USA)

 

14:05   The Application of of IBIS-AMI Model Cascaded Simulation

        for 10 Gigabit Repeater Serial Link Analysis

          Xu, ZhengRong*; Ma, LuYu*; Willis, Ken**#; Wang, HaiSan**##;

          Sledjeski, Lee***; and Unger, Nate***

          (*Huawei Technologies, China, **Sigrity, #USA, ##China,

          ***Texas Instruments, USA)

 

14:30   AMI Applications in High-speed Serial Channel Analysis and

        Measurement Correlation

          Jia, Wei; Sun, AnBing; and Zhu, ShunLin

          (ZTE Corporation, China)

 

15:00   BREAK (Refreshments and Vendor Tables)

 

15:20   Pseudo Transient Eye Analysis by Convolution Method

          Li, BaoLong (ANSYS, China)

 

15:45   Introduction of FEC IL Gain Estimation Method in High Speed Link

          Dong, XiaoQing and Huang, ChunXing

          (Huawei Technologies, China)

 

16:15   Supporting External Circuit as Spice or S-parameters in

        Conjunction with I-V/V-T Tables

          Drumstad, Kent*; Hawes, Adge*##; Kukal,Taranjit**###;

          Al-Hawari, Feras**#; Varma, Ambrish**#; and Jernberg, Terry**#

          (*IBM, #USA, ##United Kingdom,

          **Cadence Design Systems, ###India, #USA)

 

16:50   Board-Only Power Delivery Prediction for Voltage Regulator and

        Mother Board Designs

          He, JiangQi# and Li, Y.L.## (Intel, #USA, ##China)

 

17:25   Concluding Items

 

17:30   END OF IBIS SUMMIT MEETING

 

- ------------------------------------------------------------------

 

To Register by November 10, 2011:

 

     Name:

     E-mail address:

 

     Company:

     Top-level Web Link:

 

     Country:

     Telephone:

 

   Send to BOTH:

 

     Bob Ross, Teraspeed Consulting Group    bob@teraspeed.com

     Lance Wang, IO Methodology Inc.         lwang@iometh.com


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</o:shapelayout></xml><![endif]--></head><body lang=3DEN-US link=3Dblue vli=
nk=3Dpurple><div class=3DWordSection1><p class=3DMsoNormal><span style=3D'f=
ont-size:10.0pt;font-family:"Courier New";color:#1F497D'>All:<o:p></o:p></s=
pan></p><p class=3DMsoNormal><span style=3D'color:#1F497D'><o:p>&nbsp;</o:p=
></span></p><p class=3DMsoNormal><span style=3D'color:#1F497D'>Attached is =
the Agenda for a full meting 13 presentations.<o:p></o:p></span></p><p clas=
s=3DMsoNormal><span style=3D'color:#1F497D'>We look forward to seeing you i=
n Shanghai.<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'color:=
#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=3D'co=
lor:#1F497D'>Bob and Lance<o:p></o:p></span></p><p class=3DMsoNormal><span =
style=3D'color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><s=
pan style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>----=
- --------------------------------------------------------------<o:p></o:p></=
span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"=
Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNorma=
l><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; A S I A N&nbsp;&nbsp; I B I S&nbsp;&nb=
sp; S U M M I T&nbsp;&nbsp;&nbsp; I N F O R M A T I O N<o:p></o:p></span></=
p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier=
 New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span=
 style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>Time/Da=
te:&nbsp; 8:15 - 17:30, Tuesday November 15, 2011<o:p></o:p></span></p><p c=
lass=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";=
color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=
=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>Location:&nbs=
p;&nbsp; Parkyard Hotel Shanghai<o:p></o:p></span></p><p class=3DMsoNormal>=
<span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&n=
bsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 699 Bibo R=
oad<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0=
pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Zhangjiang Hi-Tech Park<o:p></o:p></spa=
n></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Cou=
rier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;&nbsp;&nbsp; Shanghai 201203<o:p></o:p></span></p><p class=3DMsoNormal>=
<span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&n=
bsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; P.R. China=
<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;=
font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p cla=
ss=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";co=
lor:#1F497D'>Rooms:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Ballroom ABC&nbsp;&nbsp; =
(Look for signs)<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'f=
ont-size:10.0pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p><=
/span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:=
"Courier New";color:#1F497D'>Sponsors:&nbsp;&nbsp; Huawei Technologies (Pri=
mary)<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10=
.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Agilent Technologies<o:p></o:p></span=
></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Cour=
ier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp; ANSYS<o:p></o:p></span></p><p class=3DMsoNormal><span style=
=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Cadence Design System=
s<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt=
;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Intel Corporation<o:p></o:p></span></p><p=
 class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New=
";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; IO Methodology<o:p></o:p></span></p><p class=3DMsoNormal><span sty=
le=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Sigrity<o:p></o:p><=
/span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:=
"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp;&nbsp; Synopsys<o:p></o:p></span></p><p class=3DMsoNormal><sp=
an style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ZTE Corporati=
on<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0p=
t;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p c=
lass=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";=
color:#1F497D'>------------------------------------------------------------=
- ------<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:1=
0.0pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p>=
<p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier N=
ew";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; I=
 B I S&nbsp; S U M M I T&nbsp; M E E T I N G&nbsp; A G E N D A<o:p></o:p></=
span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"=
Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNorma=
l><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>=
8:15&nbsp;&nbsp;&nbsp; REFRESHMENTS &amp; SIGN IN<o:p></o:p></span></p><p c=
lass=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";=
color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - Vendor Ta=
bles Open at 8:30<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'=
font-size:10.0pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p>=
</span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family=
:"Courier New";color:#1F497D'>8:45&nbsp;&nbsp;&nbsp; Welcome<o:p></o:p></sp=
an></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Co=
urier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; =
- - Li, JinJun<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-=
size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (Huawei Technologies, China)<o:p></o=
:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-fam=
ily:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
&nbsp; - Mirmak, Michael<o:p></o:p></span></p><p class=3DMsoNormal><span st=
yle=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbs=
p;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (Chair, IBIS Open Forum,=
 Intel Corporation, USA)<o:p></o:p></span></p><p class=3DMsoNormal><span st=
yle=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp=
;</o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font=
- -family:"Courier New";color:#1F497D'>9:00&nbsp;&nbsp;&nbsp; IBIS Status and=
 Future Direction<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'=
font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Mirmak, Michael (Intel Corporation, U=
SA)<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0=
pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p =
class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New"=
;color:#1F497D'>9:15&nbsp;&nbsp;&nbsp; IBIS Model as De-Facto Standard<o:p>=
</o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-=
family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp; Kusunoki, Kazuhiko* and Dai, WenLiang**<o:p></o:p></span></=
p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier=
 New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;=
 (*Wadow Co., Japan and **Xpeedic, China)<o:p></o:p></span></p><p class=3DM=
soNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1=
F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=3D'font=
- -size:10.0pt;font-family:"Courier New";color:#1F497D'>9:40&nbsp;&nbsp;&nbsp=
; IBIS VT Waveform and Over Clocking<o:p></o:p></span></p><p class=3DMsoNor=
mal><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D=
'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Chen, XueFeng (Syn=
opsys, China)<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font=
- -size:10.0pt;font-family:"Courier New";color:#1F497D'> <o:p></o:p></span></=
p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier=
 New";color:#1F497D'>10:10&nbsp;&nbsp; BREAK (Refreshments and Vendor Table=
s)<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0p=
t;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p c=
lass=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";=
color:#1F497D'>10:30&nbsp;&nbsp; IBIS Parsers<o:p></o:p></span></p><p class=
=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";colo=
r:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Ross, Bob=
 (Teraspeed Consulting Group, USA)<o:p></o:p></span></p><p class=3DMsoNorma=
l><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>=
<o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:1=
0.0pt;font-family:"Courier New";color:#1F497D'>11:00&nbsp;&nbsp; DDR3 Syste=
m Timing Budget Analysis by SI&amp;PI Co-Simulation<o:p></o:p></span></p><p=
 class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New=
";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Yi,=
 Bi; Wang, Ping; and Zhu, Shunlin (ZTE Corporation, China)<o:p></o:p></span=
></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Cour=
ier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><s=
pan style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>11:3=
0&nbsp;&nbsp; Modeling the On-die De-cap of IBIS 5.0 PDN-aware Buffers<o:p>=
</o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-=
family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp; Wang, Lance* and Wolff, Randy**<o:p></o:p></span></p><p cla=
ss=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";co=
lor:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (*IO Me=
thodology, and **Micron Technology, USA)<o:p></o:p></span></p><p class=3DMs=
oNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F=
497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=3D'font-=
size:10.0pt;font-family:"Courier New";color:#1F497D'>12:00&nbsp;&nbsp; FREE=
 BUFFET LUNCH (Hosted by Sponsors)<o:p></o:p></span></p><p class=3DMsoNorma=
l><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; - Vendor Tables<o:p>=
</o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-=
family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3D=
MsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#=
1F497D'>13:30&nbsp;&nbsp; Power-aware I/O Modeling for High-speed Parallel =
Bus Simulation<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'fon=
t-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp; &=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Qin, ZuLi#; Wang' HaiSan#; Lin, Jack W.C=
.#;<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0=
pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp; and Chen, Raymond Y.##<o:p></o:p></span></p><p clas=
s=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";col=
or:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (Sigrity=
, #China, ##USA)<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'f=
ont-size:10.0pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p><=
/span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:=
"Courier New";color:#1F497D'>14:05&nbsp;&nbsp; The Application of of IBIS-A=
MI Model Cascaded Simulation<o:p></o:p></span></p><p class=3DMsoNormal><spa=
n style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; for 10 Gigabit Repeater Serial Link An=
alysis<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:1=
0.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp;&nbsp;&nbsp; Xu, ZhengRong*; Ma, LuYu*; Willis, Ken**#; Wang,=
 HaiSan**##;<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-=
size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Sledjeski, Lee***; and Unger, Nate***<o:p>=
</o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-=
family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp; (*Huawei Technologies, China, **Sigrity, #USA, ##China,<o:p=
></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font=
- -family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&n=
bsp;&nbsp;&nbsp; ***Texas Instruments, USA)<o:p></o:p></span></p><p class=
=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";colo=
r:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=3D'=
font-size:10.0pt;font-family:"Courier New";color:#1F497D'>14:30&nbsp;&nbsp;=
 AMI Applications in High-speed Serial Channel Analysis and<o:p></o:p></spa=
n></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Cou=
rier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Measure=
ment Correlation<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'f=
ont-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Jia, Wei; Sun, AnBing; and Zhu, ShunLi=
n<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt=
;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nb=
sp;&nbsp;&nbsp;&nbsp; (ZTE Corporation, China)<o:p></o:p></span></p><p clas=
s=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";col=
or:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=3D=
'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>15:00&nbsp;&nbsp=
; BREAK (Refreshments and Vendor Tables)<o:p></o:p></span></p><p class=3DMs=
oNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F=
497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=3D'font-=
size:10.0pt;font-family:"Courier New";color:#1F497D'>15:20&nbsp;&nbsp; Pseu=
do Transient Eye Analysis by Convolution Method<o:p></o:p></span></p><p cla=
ss=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";co=
lor:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Li, Bao=
Long (ANSYS, China)<o:p></o:p></span></p><p class=3DMsoNormal><span style=
=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</=
o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-fa=
mily:"Courier New";color:#1F497D'>15:45&nbsp;&nbsp; Introduction of FEC IL =
Gain Estimation Method in High Speed Link<o:p></o:p></span></p><p class=3DM=
soNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1=
F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Dong, XiaoQin=
g and Huang, ChunXing<o:p></o:p></span></p><p class=3DMsoNormal><span style=
=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&=
nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (Huawei Technologies, China)<o:p>=
</o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-=
family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3D=
MsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#=
1F497D'>16:15&nbsp;&nbsp; Supporting External Circuit as Spice or S-paramet=
ers in<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:1=
0.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp;&nbsp; Conjunction with I-V/V-T Tables<o:p></o:p></span></p><p clas=
s=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";col=
or:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Drumstad=
, Kent*; Hawes, Adge*##; Kukal,Taranjit**###;<o:p></o:p></span></p><p class=
=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier New";colo=
r:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Al-Hawari=
, Feras**#; Varma, Ambrish**#; and Jernberg, Terry**#<o:p></o:p></span></p>=
<p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Courier N=
ew";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (=
*IBM, #USA, ##United Kingdom,<o:p></o:p></span></p><p class=3DMsoNormal><sp=
an style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp=
;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; **Cadence Design Systems,=
 ###India, #USA)<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'f=
ont-size:10.0pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p><=
/span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:=
"Courier New";color:#1F497D'>16:50&nbsp;&nbsp; Board-Only Power Delivery Pr=
ediction for Voltage Regulator and<o:p></o:p></span></p><p class=3DMsoNorma=
l><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>=
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Mother Board Designs<o:p></o:p><=
/span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:=
"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbs=
p;&nbsp; He, JiangQi# and Li, Y.L.## (Intel, #USA, ##China)<o:p></o:p></spa=
n></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Cou=
rier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><=
span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>17:=
25&nbsp;&nbsp; Concluding Items<o:p></o:p></span></p><p class=3DMsoNormal><=
span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'><o:=
p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0=
pt;font-family:"Courier New";color:#1F497D'>17:30&nbsp;&nbsp; END OF IBIS S=
UMMIT MEETING<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font=
- -size:10.0pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p></sp=
an></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:"Co=
urier New";color:#1F497D'>-------------------------------------------------=
- -----------------<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'=
font-size:10.0pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p>=
</span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family=
:"Courier New";color:#1F497D'>To Register by November 10, 2011:<o:p></o:p><=
/span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family:=
"Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNorm=
al><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'=
>&nbsp;&nbsp;&nbsp;&nbsp; Name:<o:p></o:p></span></p><p class=3DMsoNormal><=
span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'>&nb=
sp;&nbsp;&nbsp;&nbsp; E-mail address:<o:p></o:p></span></p><p class=3DMsoNo=
rmal><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497=
D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=3D'font-siz=
e:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp; =
Company:<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size=
:10.0pt;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp; T=
op-level Web Link:<o:p></o:p></span></p><p class=3DMsoNormal><span style=3D=
'font-size:10.0pt;font-family:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p=
></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-famil=
y:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp; Country:<o:p></o:p>=
</span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family=
:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp; Telephone:<o:p></o:p=
></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-famil=
y:"Courier New";color:#1F497D'><o:p>&nbsp;</o:p></span></p><p class=3DMsoNo=
rmal><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497=
D'>&nbsp;&nbsp; Send to BOTH:<o:p></o:p></span></p><p class=3DMsoNormal><sp=
an style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F497D'><o:p>=
&nbsp;</o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt=
;font-family:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp; Bob Ross=
, Teraspeed Consulting Group&nbsp;&nbsp;&nbsp; bob@teraspeed.com<o:p></o:p>=
</span></p><p class=3DMsoNormal><span style=3D'font-size:10.0pt;font-family=
:"Courier New";color:#1F497D'>&nbsp;&nbsp;&nbsp;&nbsp; Lance Wang, IO Metho=
dology Inc.&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; lwang@iometh.co=
m</span><span style=3D'font-size:10.0pt;font-family:"Courier New";color:#1F=
497D'><o:p></o:p></span></p><p class=3DMsoNormal><span style=3D'font-size:1=
2.0pt;font-family:"Times New Roman","serif"'> <o:p></o:p></span></p></div><=
br />--=20
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------------------------------

Date: Fri, 30 Mar 2012 11:50:17 -0700
From: "Bob Ross" <bob@teraspeed.com>
Subject: [IBIS-Users] European IBIS Summit at SPI 2012 - Second Call for Papers/Participation

(Resent due to possible reflector issues)

All:

We are holding the 15th European IBIS Summit Meeting along with the
16th IEEE Workshop on Signal and Power Integrity (SPI 2012),
formerly Signal Propagation and Interconnects) on Wednesday,
May 16, 2011 in Sorrento, Italy

The purpose is to promote communication among users and developers of
IBIS models in Europe.

The meeting is FREE and OPEN to everyone.

Below is some information on the IBIS Summit and the SPI2012 Workshop.

You are invited to register and also to submit presentation proposals.
We already plan for several topics listed below

Antonio Girardi
Micron Technology

Lance Wang
IO Methodology


======================================================================

                  European IBIS Summit at SPI 2012
            Second Call for Participation and Presentations

======================================================================

       http://www.eda.org/ibis/summits/may12/announcement.pdf

- ----------------------------------------------------------------------
      E U R O P E A N   I B I S   S U M M I T   M E E T I N G 
- ----------------------------------------------------------------------

Time/Date:     13:00 - 18:00, Wednesday, May 16, 2012  
                  
Location:      Parco dei Principi - Sorrento Hotel
 
http://www.royalgroup.it/eng/parco_dei_principi_hotel_sorrento/
               Via Rota, 1, 80067 Sorrento (NA) Italy
              
               Tel. + 39 081 8784644  Fax + 39 081 8783786

Meeting-Room:  To Be Determined
                     
Content:       Presentations and Discussions

Purpose:       Solicit and Exchange IBIS Model Related Information
               and Ideas

Sponsors:      Micron Technology, Nokia Siemens Network and Zuken
                       
               If your company would be interested in sponsoring this 
               event, please contact Bob Ross bob@teraspeed.com

                               
SPI 2011:      May 13 - 16, 2012.
Location:      Grand Hotel Parco dei Principi - Sorrento, Italy
URL:           http://www.spi2012.org/
Program:       http://www.spi2012.org/images/SPI2012_preprogram.pdf
Registration:  http://www.spi2012.org/?who=registration

- -----------------------------------------------------------------------

BACKGROUND

  We have had successful IBIS meeting along the DATe conference
  for many years, and more recently the IEEE Workshop on Signal
  Propagation on Interconnects.

  This meeting will be conducted as a formal IBIS Summit Meeting.
  Presentations are expected to be available and archived in an
  electronic format, and minutes of the meeting will be issued.
        
  The meeting is FREE and OPEN to everyone.  Refreshments & coffee
  breaks are planned.

CALL FOR PARTICIPANTS

  People involved in IBIS Model development, EDA tool development,
  and digital circuit design are invited to  participate. If you
  want to participate, please register with the information below:

    Name: 
    E-mail address: 
    Company: 
    Telephone: 

  Send to BOTH:

  Antonio Girardi (agirardi@micron.com)
  Lance Wang      (lwang@iometh.com)

  Deadline: May 9, 2012

CALL FOR PRESENTATIONS

  We are seeking presentations from individuals who have IBIS
  experiences or issues. Some suggested subjects of interest are:
      
  - IBIS Model Development Experiences
  - Company IBIS Standards and Requirements
  - Generating & Validating IBIS Models
  - Future IBIS Developments and Requirements (e.g., IBIS-AMI)
  - Modeling of dedicated technology issues (e.g., connectors,
    and very high speed interfaces)
  - EMC/EMI and Power Integrity Issues
  - Related modeling issues (e.g., SPICE, S-Parameter modeling)
  - Experiences using IBIS in the PCB Design process
   
  Format of Presentation:  LCD Projections
  Time:                    15-30 Minutes

  Electronic Archival:
  We require electronic versions for so they can be archived and
  also made available to non-attendees.

  We prefer Power Point or Acrobat formats.

  Please send presentations for processing and brief review.
  Otherwise please bring 20 copies to the meeting.
          
  If you plan a presentation, please supply:

    Title:
    Presenter:
    E-mail address:
    Company:
    Telephone:
    Estimated Time:

  Send this to BOTH:

  Lance Wang   (lwang@iometh.com) 
  Bob Ross     (bob@teraspeed.com)

  Deadline: May 4, 2012.

  Note, Vendor-specific or product promotional material is forbidden
  at IBIS Summits.  We strongly advise that the presentations be
  submitted by the deadline for review. The IBIS Open Forum reserves
  the right to stop or reject a scheduled presentation that has not
  been reviewed.

AGENDA 

  The agenda includes presentations, discussions, breaks and
  refreshments. This will be developed as presentation proposals
  are received.


LIST OF NEARBY HOTELS

  http://www.spi2012.org/?who=accomodation

- ----------------------------------------------------------------------  

- --
Bob Ross
Teraspeed Consulting Group, LCC
http://www.teraspeed.com
bob@teraspeeed.com
Direct : 503-246-8048
Teraspeed Labs: 503-430-1065
Headquarters: 401-284-1827

Teraspeed is a registered service mark of Teraspeed Consulting Group LLC



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dangerous content by MailScanner, and is
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|with the appropriate command message(s) in the body:
|
|  help
|  subscribe   ibis       <optional e-mail address, if different>
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|  unsubscribe ibis       <optional e-mail address, if different>
|  unsubscribe ibis-users <optional e-mail address, if different>
|
|or e-mail a request to ibis-request@eda-stds.org.
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|
|  http://www.eda-stds.org/pub/ibis/email_archive/ Recent
|  http://www.eda-stds.org/pub/ibis/users_archive/ Recent
|  http://www.eda-stds.org/pub/ibis/email/         E-mail since 1993

------------------------------

Date: Fri, 6 Jan 2012 00:22:15 +0000
From: "Mirmak, Michael" <michael.mirmak@intel.com>
Subject: [IBIS-Users] IBIS Summit at DesignCon 2012 - Second Call for Participation and Presentations

The IBIS Open Forum is holding an IBIS Summit meeting at DesignCon 2012 
at the Santa Clara Convention Center in Santa Clara, California on February 2.

IBIS Summits are designed to enable face-to-face interactions between 
model users, model makers and tool developers in the IBIS community. 
Those interested in presenting at or attending the event may 
register using the information below. 

Note that a 30% discount on DesignCon registration is available to 
IBIS Summit attendees.  Please consult the links below for more information.

The IBIS Open Forum is sponsoring the event, but we welcome additional 
sponsors to cover some of the meeting expenses, including the FREE lunch and
refreshments. 

We look forward to seeing you in Santa Clara! 

Best regards, 

   Michael Mirmak 
   Intel Corp. 
   Chair, IBIS Open Forum 

- ----------------------------------------------------------------------- 

        I  B  I  S     S  U  M  M  I  T     M  E  E  T  I  N  G      

                        SECOND CALL FOR 
        
                 PARTICIPATION & PRESENTATIONS 

- ----------------------------------------------------------------------- 

Time/Date: Thursday, February 2, 2012 8:00 AM to 5:00 PM 

Location:  Santa Clara Convention Center 
           5101 Great America Parkway, 
           Santa Clara, California, USA 

Room:      Great America Ballroom 1 (look for signs)
           Santa Clara Convention Center 

Content:   Presentations and Discussions 
 
Cost:      FREE 

Sponsors:  IBIS Open Forum, DesignCon 

           We are seeking more co-sponsors. The benefits to sponsors include 
           recognition at the meeting and acknowledgement in the Calls 
           for Papers and meeting minutes. 

           Your financial support strengthens the organization by 
           allowing IBIS to focus resources on industry activities 
           rather than raising money. You will receive generous 
           thanks and public acknowledgement for your support. 

           Please contact Lance Wang (lwang@iometh.com) for co-sponsorship 
           information. 

DesignCon 2012: 

           January 30 - February 2, 2012 (Conference)
           January 31 - February 1, 2012 (Exhibition)

           Santa Clara Convention Center 
           Santa Clara, CA 
             http://www.designcon.com/   
 
           Exhibits registration: 
             http://www.designcon.com/how_to_register   

           Conference Schedule: 
             http://www.designcon.com/conference   

           Discount Registration for IBIS Summit Attendees
             https://designcon.reg.ubmelectronics.com/2012/registrations/registration?_mc=IBIS30 

           (please ensure you also register for the Summit itself as described below)

BACKGROUND 

DesignCon is the premier annual Silicon Valley event for the electronic 
design automation (EDA) and semiconductor industry. Topics of current 
interest to the IBIS Open Forum are addressed at DesignCon. 

This meeting will be conducted as a formal IBIS meeting. 

Presentations are expected to be available and archived in an electronic 
format, and minutes of the meeting will be issued. Any pending formal 
decisions (votes) will be announced at least two weeks prior to the 
meeting. 


CALL FOR PARTICIPANTS 

People involved in IBIS or related model development, EDA tool development,
and digital circuit design are invited to participate in the Summit meeting. 
If you plan to participate, please register with the information below: 

   Name: 

   E-mail address: 

   Company: 

   Telephone: 

Send your registration information to Lance Wang (lwang@iometh.com).     

Registration deadline is Wednesday, January 25, 2012 to receive the free 
lunch. 


CALL FOR PRESENTATIONS 

We are seeking presentations from individuals who have experiences of 
interest to the IBIS modeling community. These can include, but are not 
limited to: 

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------------------------------

Date: Wed, 21 Sep 2011 10:52:53 +0530
From: Nagarjuna Vallamkonda <Nagarjuna.Vallamkonda@synopsys.com>
Subject: [IBIS-Users] IBIS Delay Model

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Hi

As we know that, rm_dly_* keywords are used to remove the initial and flat =
tail delay for rising and falling waveforms in HSPICE. Does these keywords =
have any impact on rising and falling times of waveforms?

When we compare the results of HSPICE with Mentor ICX Pro explorer, I see d=
ifferent results for the two tools. Why is it happening so for such a simpl=
e circuit?

Can anyone help me regarding this ASAP.

Thanks & Regards
Nagarjuna

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st=3D"&#1;" xmlns=3D"http://www.w3.org/TR/REC-html40"><head><meta http-equi=
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erator content=3D"Microsoft Word 12 (filtered medium)"><style><!--
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<o:shapedefaults v:ext=3D"edit" spidmax=3D"1026" />
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<o:shapelayout v:ext=3D"edit">
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</o:shapelayout></xml><![endif]--></head><body lang=3DEN-US link=3Dblue vli=
nk=3Dpurple><div class=3DWordSection1><p class=3DMsoNormal>Hi<o:p></o:p></p=
><p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>As we know =
that, rm_dly_* keywords are used to remove the initial and flat tail delay =
for rising and falling waveforms in HSPICE. Does these keywords have any im=
pact on rising and falling times of waveforms?<o:p></o:p></p><p class=3DMso=
Normal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>When we compare the result=
s of HSPICE with Mentor ICX Pro explorer, I see different results for the t=
wo tools. Why is it happening so for such a simple circuit?<o:p></o:p></p><=
p class=3DMsoNormal><o:p>&nbsp;</o:p></p><p class=3DMsoNormal>Can anyone he=
lp me regarding this ASAP.<o:p></o:p></p><p class=3DMsoNormal><o:p>&nbsp;</=
o:p></p><p class=3DMsoNormal>Thanks &amp; Regards<o:p></o:p></p><p class=3D=
MsoNormal>Nagarjuna <o:p></o:p></p></div><br />--=20
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------------------------------

Date: Thu, 03 Mar 2011 14:16:08 +0100
From: Petar <petar.perisin@cadcam.hr>
Subject: [IBIS-Users] IBIS [Add Submodel] workaround

This is a multi-part message in MIME format.
- --------------070106060000020302090100
Content-Type: text/plain; charset=ISO-8859-1; format=flowed
Content-Transfer-Encoding: 7bit

  Hi,

I use EDA tool called Altium. It uses old version of ibis so every time 
I want to do analysis I need to modify IBIS file for Altium to accept it.

I know for a fact that Altium does not support [series_switch], [Add 
Submodel] and [Model Selector]. I do not need to workaround 
[series_switch], and i have managed to work around [Model Selector].

Now the last thing I need to do is to work around [Add Submodel] keyword.

I'm simulating DDR3 memory modules, and I want to use their On Die 
Terminations (ODT). Pin model looks like this:

    [Model]          DQ34_ODT20_1066
    Model_type       I/O
    .
    .   some normal stuff from
    .   model definition here
    .
    [Add Submodel]
    | Submodel Name        Mode
    20Ohm_ODT_1066         Non-Driving
    |
    [Temperature Range]       85.00               110.00              0.00
    [Voltage Range]           1.500V              1.425V              1.575V
    [Pullup Reference]        1.500V              1.425V              1.575V
    [Pulldown]
    .
    .  Pulldown table here
    .
    [Pullup]
    .
    .  Pullup table here
    .
    [GND Clamp]
    .
    .  GND Clamp table here
    .
    [POWER Clamp]
    .
    .  POWER Clamp table here
    .

After this are other model definitions, and my submodel is defined after 
them:

    .
    .
    [Submodel]  20Ohm_ODT_1066
    Submodel_type   Dynamic_clamp
    |
    |***************************************************************************
    |
    [GND Clamp]
    |
    .
    .   Submodel's GND Clamp table here
    .
    [POWER Clamp]
    |
    .
    .   Submodel's POWER Clamp table here
    .


Since Altium does not support [Add Submodel], I can get correct results 
for this pin only if I set it to output (driving). If it is set to Input 
(Non-driving) a submodel should be used, and I will get wrong results.

Now, I want to modify this IBIS file by "implementing" data from 
[Submodel] into [Model]. This way I would get correct results when doing 
analysis with this pin set as input. I know that by doing that I will 
not get correct results with this pin set as output, but that is OK. I 
will then combine two IBIS files based on the analysis that I'm doing.

Do I have to simply replace [GND Clamp] and [POWER Clamp] tables from 
the [Model] with the ones from the [Submodel], or do I have to use some 
arithmetic functions in order to combine the two (or something third).


I hope I was clear, since I find this very hard to explain :-)

Regards
Petar Perisin



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      charset=ISO-8859-1">
  </head>
  <body bgcolor="#ffffff" text="#000000">
    &nbsp;Hi,<br>
    <br>
    I use EDA tool called Altium. It uses old version of ibis so every
    time I want to do analysis I need to modify IBIS file for Altium to
    accept it.<br>
    <br>
    I know for a fact that Altium does not support [series_switch], [Add
    Submodel] and [Model Selector]. I do not need to workaround
    [series_switch], and i have managed to work around [Model Selector].<br>
    <br>
    Now the last thing I need to do is to work around [Add Submodel]
    keyword.<br>
    <br>
    I'm simulating DDR3 memory modules, and I want to use their On Die
    Terminations (ODT). Pin model looks like this:<br>
    <br>
    <blockquote>[Model]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DQ34_ODT20_1066<br>
      Model_type&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; I/O<br>
      .<br>
      .&nbsp;&nbsp; some normal stuff from<br>
      .&nbsp;&nbsp; model definition here<br>
      .<br>
      [Add Submodel]<br>
      | Submodel Name&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Mode<br>
      20Ohm_ODT_1066&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; Non-Driving<br>
      |<br>
      [Temperature Range]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 85.00&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 110.00&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
      0.00 <br>
      [Voltage Range]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1.500V&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1.425V&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
      1.575V<br>
      [Pullup Reference]&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1.500V&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 1.425V&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
      1.575V<br>
      [Pulldown]<br>
      .<br>
      .&nbsp; Pulldown table here<br>
      .<br>
      [Pullup]<br>
      .<br>
      .&nbsp; Pullup table here<br>
      .<br>
      [GND Clamp]<br>
      .<br>
      .&nbsp; GND Clamp table here<br>
      .<br>
      [POWER Clamp]<br>
      .<br>
      .&nbsp; POWER Clamp table here<br>
      .<br>
      <br>
    </blockquote>
    After this are other model definitions, and my submodel is defined
    after them:<br>
    <blockquote>.<br>
      .<br>
      [Submodel]&nbsp; 20Ohm_ODT_1066<br>
      Submodel_type&nbsp;&nbsp; Dynamic_clamp<br>
      |<br>
|***************************************************************************<br>
      |<br>
      [GND Clamp]<br>
      |<br>
      .<br>
      .&nbsp;&nbsp; Submodel's GND Clamp table here<br>
      .<br>
      [POWER Clamp]<br>
      |<br>
      .<br>
      .&nbsp;&nbsp; Submodel's POWER Clamp table here<br>
      .<br>
    </blockquote>
    <br>
    Since Altium does not support [Add Submodel], I can get correct
    results for this pin only if I set it to output (driving). If it is
    set to Input (Non-driving) a submodel should be used, and I will get
    wrong results.<br>
    <br>
    Now, I want to modify this IBIS file by "implementing" data from
    [Submodel] into [Model]. This way I would get correct results when
    doing analysis with this pin set as input. I know that by doing that
    I will not get correct results with this pin set as output, but that
    is OK. I will then combine two IBIS files based on the analysis that
    I'm doing.<br>
    <br>
    Do I have to simply replace [GND Clamp] and [POWER Clamp] tables
    from the [Model] with the ones from the [Submodel], or do I have to
    use some arithmetic functions in order to combine the two (or
    something third).<br>
    <br>
    <br>
    I hope I was clear, since I find this very hard to explain :-)<br>
    <br>
    Regards<br>
    Petar Perisin<br>
    <br>
    <br>
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*************************

