From: owner-ibis-users@eda.org (ibis-users) To: ibis-users-digest@eda.org Subject: ibis-users V1 #214 Reply-To: Sender: owner-ibis-users@eda.org Errors-To: owner-ibis-users@eda.org Precedence: bulk ibis-users Monday, June 24 2013 Volume 01 : Number 214 ---------------------------------------------------------------------- Date: Thu, 4 Apr 2013 16:59:24 +0000 From: "Randy Wolff (rrwolff)" Subject: [IBIS-Users] RE: Validation of IBIS 5.0 model with package parasitics - --_000_1154B2DA8E5C264AB33C4ABE5FAF6BCF402E4076NTXBOIMBX05micr_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Rinsha, I've run across this same issue recently with an IBIS 5.0 power aware model= I created. I believe the problem is related to not having [Composite Curr= ent] waveforms for the ground currents. The DDR4 memory device I modeled i= ncludes two supplies (VDD (core) and VDDQ (IO)) and two grounds (VSS (core)= and VSSQ (IO)). EDA software might assume that pre-driver currents for VC= CQ are balanced for VSSQ, but this is not totally valid. When significant = parasitics are added to VSSQ, the correlation gets bad. What I've found he= lps me is that VSS and VSSQ are shorted on the die. The result is that the= package impedance for VSSQ becomes quite small since it is now in parallel= with VSS (which typically has low inductance in the package). With a smal= l package impedance on VSSQ/VSS, the correlation is pretty good to Spice. It may be worth starting a conversation about whether [Composite Current] n= eeds to be expanded to include modeling of ground currents. Regards, Randy Randy Wolff Micron Technology From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf = Of Rinsha Reghunath Sent: Thursday, April 04, 2013 5:39 AM To: ibis@eda.org; ibis-users@eda.org Subject: [IBIS-Users] Validation of IBIS 5.0 model with package parasitics Hi all, I am trying to validate an IBIS 5.0 model at 500Mbps with package parasitic= s (R, L, C for supply, ground and pad) and on-die RC decoupling. The issue = is that the I-T waveforms are not matching when I add inductance to the gro= und terminal. When I remove the inductance on the ground terminal keeping t= he rest of the setup same, the I-T waveforms correlate. Has anyone come acr= oss this issue or any suggestions on rectifying the same? Thanks & Regards, Rinsha - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - --_000_1154B2DA8E5C264AB33C4ABE5FAF6BCF402E4076NTXBOIMBX05micr_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hi Rinsha,<= /span>

 

I’ve run across = this same issue recently with an IBIS 5.0 power aware model I created. = ; I believe the problem is related to not having [Composite Current] wavefo= rms for the ground currents.  The DDR4 memory device I modeled includes two supplies (VDD (core) and VDDQ (IO)) and two grounds= (VSS (core) and VSSQ (IO)).  EDA software might assume that pre-drive= r currents for VCCQ are balanced for VSSQ, but this is not totally valid.&n= bsp; When significant parasitics are added to VSSQ, the correlation gets bad.  What I’ve found helps me is= that VSS and VSSQ are shorted on the die.  The result is that the pac= kage impedance for VSSQ becomes quite small since it is now in parallel wit= h VSS (which typically has low inductance in the package).  With a small package impedance on VSSQ/VSS, the correlatio= n is pretty good to Spice.

 

It may be worth starti= ng a conversation about whether [Composite Current] needs to be expanded to= include modeling of ground currents.

 

Regards,

Randy

 

Randy Wolff=

Micron Technology=

 

From: owner-ib= is-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Rinsha Reghunath
Sent: Thursday, April 04, 2013 5:39 AM
To: ibis@eda.org; ibis-users@eda.org
Subject: [IBIS-Users] Validation of IBIS 5.0 model with package para= sitics

 

Hi all,

 

I am trying to validate an IBIS 5.0 model at 500Mbps= with package parasitics (R, L, C for supply, ground and pad) and on-die RC= decoupling. The issue is that the I-T waveforms are not matching when I ad= d inductance to the ground terminal. When I remove the inductance on the ground terminal keeping the rest of th= e setup same, the I-T waveforms correlate. Has anyone come across this issu= e or any suggestions on rectifying the same?

 

Thanks & Regards,

Rinsha


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This message has been scanned for viruses and
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believed to be clean. - --_000_1154B2DA8E5C264AB33C4ABE5FAF6BCF402E4076NTXBOIMBX05micr_-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail mikelabonte@eda-stds.org |or ibis-request@eda-stds.org | |IBIS reflector archives exist under: | | http://www.eda-stds.org/ibis/email_archive/ Recent | http://www.eda-stds.org/ibis/users_archive/ Recent | http://www.eda-stds.org/ibis/email/ E-mail since 1993 ------------------------------ Date: Wed, 10 Apr 2013 18:31:04 -0700 From: "Bob Ross" Subject: [IBIS-Users] European IBIS Summit at SPI 2013 - Second Call This is a multipart message in MIME format. - ------=_NextPart_000_0004_01CE3619.8FC4E150 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable All: =20 We are holding the 16th European IBIS Summit Meeting along with the 17th IEEE Workshop on Signal and Power Integrity (SPI 2013), on Wednesday, May 15, 2013 in Paris, France. =20 The purpose is to promote communication among users and developers of IBIS models in Europe. =20 The meeting is FREE and OPEN to everyone. =20 Below is some information on the IBIS Summit and the SPI2013 Workshop. =20 You are invited to register and also to submit presentation proposals. We already plan for several topics listed below =20 Lance Wang IO Methodology =20 Bob Ross Teraspeed Consulting Group =20 =20 =20 =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 European IBIS Summit at SPI 2013 Second Call for Participation and Presentations =20 =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 http://www.eda.org/ibis/summits/may13/announcement.pdf =20 - ---------------------------------------------------------------------- E U R O P E A N I B I S S U M M I T M E E T I N G=20 - ---------------------------------------------------------------------- =20 Time/Date: 13:00 - 18:00, Wednesday, May 15, 2013=20=20 =20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20 Location: Hotel Concorde La Fayette http://www.concorde-lafayette.com/en/? 3, Place du G=E9n=E9ral Koenig 75017 Paris, France Tel: +33 1 40 68 50 68 =20=20=20=20=20=20=20=20=20=20=20=20=20=20 Room: To Be Determined =20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20 Content: Presentations and Discussions =20 Purpose: Solicit and Exchange IBIS Model Related Information and Ideas =20 Sponsors: Micron Technology, Zuken and others to be determined =20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20 If your company would be interested in sponsoring this=20 event, please contact Bob Ross bob@teraspeed.com =20 =20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20=20= =20=20=20=20=20=20 SPI 2013: May 12 - 15, 2013 Location: Hotel Concorde La Fayette, Paris France URL: http://www.spi2013.org/ =20 - ---------------------------------------------------------------------- - - =20 BACKGROUND =20 We have had successful IBIS meeting along the DATe conference for many years, and more recently the IEEE Workshop on Signal and Power Integrity (formerly Signal Propagation on Interconnects). =20 This meeting will be conducted as a formal IBIS Summit Meeting. Presentations are expected to be available and archived in an electronic format, and minutes of the meeting will be issued. =20=20=20=20=20=20=20=20 The meeting is FREE and OPEN to everyone. Refreshments & coffee breaks are planned. =20 CALL FOR PARTICIPANTS =20 People involved in IBIS Model development, EDA tool development, and digital circuit design are invited to participate. If you want to participate, please register with the information below: =20 Name:=20 E-mail address:=20 Company:=20 Telephone:=20 =20 Send to: =20 Lance Wang (lwang@iometh.com) =20 Deadline: May 8, 2013 =20 CALL FOR PRESENTATIONS =20 We are seeking presentations from individuals who have IBIS experiences or issues. Some suggested subjects of interest are: =20=20=20=20=20=20 - IBIS Model Development Experiences - Company IBIS Standards and Requirements - Generating & Validating IBIS Models - Future IBIS Developments and Requirements (e.g., IBIS-AMI) - Modeling of dedicated technology issues (e.g., connectors, and very high speed interfaces) - EMC/EMI and Power Integrity Issues - Related modeling issues (e.g., SPICE, S-Parameter modeling) - Experiences using IBIS in the PCB Design process =20=20=20 Format of Presentation: LCD Projections Time: 15-30 Minutes =20 Electronic Archival: We require electronic versions for so they can be archived and also made available to non-attendees. =20 We prefer Power Point or Acrobat formats. =20 Please send presentations for processing and brief review. Otherwise please bring 20 copies to the meeting. =20=20=20=20=20=20=20=20=20=20 If you plan a presentation, please supply: =20 Title: Presenter: E-mail address: Company: Telephone: Estimated Time: =20 Send this to BOTH: =20 Lance Wang (lwang@iometh.com)=20 Bob Ross (bob@teraspeed.com) =20 Deadline: May 3, 2013 =20 Note, Vendor-specific or product promotional material is forbidden at IBIS Summits. We strongly advise that the presentations be submitted by the deadline for review. The IBIS Open Forum reserves the right to stop or reject a scheduled presentation that has not been reviewed. =20 AGENDA=20 =20 The agenda includes presentations, discussions, breaks and refreshments. This will be developed as presentation proposals are received. =20 =20 LIST OF NEARBY HOTELS=20 =20 Use a search engine to find nearby hotels =20 - ---------------------------------------------------------------------- =20 =20 - -- Bob Ross Teraspeed Consulting Group, LCC http://www.teraspeed.com bob@teraspeeed.com Direct : 503-246-8048 Teraspeed Labs: 971-279-5325 Headquarters: 401-284-1827 =20 Teraspeed is a registered service mark of Teraspeed Consulting Group LLC =20 - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - ------=_NextPart_000_0004_01CE3619.8FC4E150 Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

All:

 

We are h= olding the 16th European IBIS Summit Meeting along with the

17t= h IEEE Workshop on Signal and Power Integrity (SPI 2013),=

on We= dnesday, May 15, 2013 in Paris, France.

 

The = purpose is to promote communication among users and developers of

 

The meeting is FR= EE and OPEN to everyone.

 

Below is some inf= ormation on the IBIS Summit and the SPI2013 Workshop.

=

&nbs= p;

You are invited to register and also to submit presentation propo= sals.

We already plan for several topics listed below

Lance Wang

IO Methodology

 

Bob Ross

Teraspeed Consulting Group<= /span>

 

 

 

=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

 =

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 Second Call for Partici= pation and Presentations

 

=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

 =

 

-------------------------------------------= - ---------------------------

=A0=A0=A0=A0=A0 E U R O P E A N=A0= =A0 I B I S=A0=A0 S U M M I T=A0=A0 M E E T I N G

------------= - ----------------------------------------------------------

 

Time/Date:=A0=A0=A0=A0 13:00 - 18:00, Wednesday, May 15, 201= 3=A0

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0

Location:=A0=A0=A0=A0=A0 Hotel Concorde La Fayette

= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 http://www.concorde-lafayette.co= m/en/?

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 3, Place du G= =E9n=E9ral Koenig 75017

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0 Paris, France

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 T= el: +33 1 40 68 50 68

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 <= o:p>

Room: =A0=A0=A0=A0=A0=A0=A0=A0=A0To Be Determined

= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0

C= ontent:=A0=A0=A0=A0=A0=A0 Presentations and Discussions

&n= bsp;

Purpose:=A0=A0=A0=A0=A0=A0 Solicit and Exchange IBIS Model Rela= ted Information

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 and = Ideas

 

Sponsors:=A0=A0=A0=A0=A0 Micron Techno= logy, Zuken and others to be determined

=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0

=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0If your company would be interested in sponso= ring this

=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0event, = please contact Bob Ross bob@teraspeed.com

 

= =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0=A0=A0

SPI 2013:=A0=A0=A0=A0=A0 May 12 - 15, 2013

Location:=A0=A0=A0=A0=A0 Hotel Concorde La Fayette, Paris France=

URL:=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 http://www.spi2013.org/

 

-----------------------------------------------= - -----------------------

-

 <= /p>

BACKGR= OUND

 

=A0 We have had successful IBIS meeting= along the DATe conference

=A0 for many years, and more recentl= y the IEEE Workshop on Signal

= =A0 and Power Integrity (formerly= Signal Propagation on Interconnects).

 =

=A0 T= his meeting will be conducted as a formal IBIS Summit Meeting.

= =A0 Presentations are expected to be available and archived in an

=A0=A0=A0=A0=A0=A0=A0

<= span style=3D'font-family:"Courier New"'>=A0=A0The meeting is FREE and OPEN= to everyone.=A0 Refreshments & coffee

=A0 breaks are plann= ed.

 

CALL FOR PARTICIPANTS<= /p>

&= nbsp;

=A0 People involved in IBIS Model development, EDA tool develo= pment,

=A0 and digital circuit design are invited to=A0 partici= pate. If you

=A0 want to participate, please register with the = information below:

 

=A0=A0=A0 Name:

=A0=A0=A0=A0E-mail address:

=A0=A0=A0=A0Company:

=A0=A0=A0=A0Telephone:

 

=A0 Send to:

 

=A0 Lance Wang=A0=A0=A0=A0=A0 (lwang@iometh.com= )

 

=A0 Deadline: May 8, 2013

 

CALL FOR PRESENTATIONS

 <= /p>

=A0 We= are seeking presentations from individuals who have IBIS=

=A0 e= xperiences or issues. Some suggested subjects of interest are:

= =A0=A0=A0=A0=A0

=A0=A0- IBIS Model Development Experiences

=A0 - Company IBIS Standards and Requirements<= /p>

=A0 - = Generating & Validating IBIS Models

=A0 - Future IBIS Devel= opments and Requirements (e.g., IBIS-AMI)

=A0 - Modeling of ded= icated technology issues (e.g., connectors,

=A0=A0=A0 and ver= y high speed interfaces)

=A0 - EMC/EMI and Power Integrity Issu= es

=A0 - Related modeling issues (e.g., SPICE, S-Parameter mode= ling)

=A0 - Experiences using IBIS in the PCB Design process

=A0=A0

=A0=A0Format of Presentation:=A0 LCD Project= ions

=A0 Time:=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0= =A0=A0=A0 15-30 Minutes

 

=A0 Electronic Archi= val:

=A0 We require electronic versions for so they can be arch= ived and

=A0 also made available to non-attendees.

=  

=A0 We prefer Power Point or Acrobat formats.=

=A0 Please send presentations for processing and brief= review.

=A0 Otherwise please bring 20 copies to the meeting.

=A0=A0=A0=A0=A0=A0=A0=A0=A0

=A0=A0If you plan a pre= sentation, please supply:

 

=A0=A0=A0 Title:<= o:p>

=A0=A0=A0 Presenter:

=A0=A0=A0 E-mail address:=

=A0=A0=A0 Company:

=A0=A0=A0 Telephone:

=A0= =A0=A0 Estimated Time:

 

=A0 Send this to BOTH= :

 

=A0 Lance Wang=A0=A0 (lwang@iometh.com)

=A0=A0Bob Ross=A0=A0=A0=A0 (bob@teraspeed.com)=

=  

=A0 Deadline: May 3, 2013

 

=A0 = Note, Vendor-specific or product promotional material is forbidden

=A0 at IBIS Summits.=A0 We strongly advise that the presentations be

=A0 submitted by the deadline for review. The IBIS Open Forum res= erves

=A0 the right to stop or reject a scheduled presentation = that has not

=A0 been reviewed.

 =

 

<= span style=3D'font-family:"Courier New"'>=A0 The agenda includes presentati= ons, discussions, breaks and

<= span style=3D'font-family:"Courier New"'>=A0 refreshments. This will be dev= eloped as presentation proposals

=A0 are received.

=  

 

LIST OF NEARBY HOTELS

 

=A0 Use a search engine to find nearby hotels

=  

--------------------------------------------------------= - --------------

 

 

= - --

Bob Ross

Teraspeed Consulting Group, LCC

http://www.teraspeed.com

bob@= teraspeeed.com

Direct : 503-246-8048<= o:p>

Teraspeed Labs: 971-279-5325

Headquarters: 401-284-1827

 

Teraspeed = is a registered service mark of Teraspeed Consulting Group LLC

 


--=20
This message has been scanned for viruses and
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believed to be clean. - ------=_NextPart_000_0004_01CE3619.8FC4E150-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail mikelabonte@eda-stds.org |or ibis-request@eda-stds.org | |IBIS reflector archives exist under: | | http://www.eda-stds.org/ibis/email_archive/ Recent | http://www.eda-stds.org/ibis/users_archive/ Recent | http://www.eda-stds.org/ibis/email/ E-mail since 1993 ------------------------------ Date: Thu, 4 Apr 2013 11:38:45 +0000 From: Rinsha Reghunath Subject: [IBIS-Users] Validation of IBIS 5.0 model with package parasitics - --_000_6CF2432F84DCD244B763C5F4FD9D86F70A2CB9IN01WEMBXAinterna_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi all, I am trying to validate an IBIS 5.0 model at 500Mbps with package parasitic= s (R, L, C for supply, ground and pad) and on-die RC decoupling. The issue = is that the I-T waveforms are not matching when I add inductance to the gro= und terminal. When I remove the inductance on the ground terminal keeping t= he rest of the setup same, the I-T waveforms correlate. Has anyone come acr= oss this issue or any suggestions on rectifying the same? Thanks & Regards, Rinsha - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - --_000_6CF2432F84DCD244B763C5F4FD9D86F70A2CB9IN01WEMBXAinterna_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hi all,

 

I am trying to validate an IBIS 5.0 model at 500Mbps= with package parasitics (R, L, C for supply, ground and pad) and on-die RC= decoupling. The issue is that the I-T waveforms are not matching when I ad= d inductance to the ground terminal. When I remove the inductance on the ground terminal keeping the rest of th= e setup same, the I-T waveforms correlate. Has anyone come across this issu= e or any suggestions on rectifying the same?

 

Thanks & Regards,

Rinsha


--=20
This message has been scanned for viruses and
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believed to be clean. - --_000_6CF2432F84DCD244B763C5F4FD9D86F70A2CB9IN01WEMBXAinterna_-- - -------------------------------------------------------------------- |For help or to subscribe/unsubscribe, e-mail mikelabonte@eda-stds.org |or ibis-request@eda-stds.org | |IBIS reflector archives exist under: | | http://www.eda-stds.org/ibis/email_archive/ Recent | http://www.eda-stds.org/ibis/users_archive/ Recent | http://www.eda-stds.org/ibis/email/ E-mail since 1993 ------------------------------ Date: Mon, 24 Jun 2013 09:31:47 -0500 From: Gregory R Edlund Subject: RE: [IBIS-Users] IBIS query - --0__=09BBF107DFDCF34A8f9e8a93df938690918c09BBF107DFDCF34A Content-type: multipart/alternative; Boundary="1__=09BBF107DFDCF34A8f9e8a93df938690918c09BBF107DFDCF34A" - --1__=09BBF107DFDCF34A8f9e8a93df938690918c09BBF107DFDCF34A Content-type: text/plain; charset=US-ASCII Content-transfer-encoding: quoted-printable Girija, He means that the driver must not be pulling the net high or low. If the driver is a standard CMOS push-pull driver, that means both the NFET and the PFET devices must be off. In other words, the driver is in a high-impedance state. If either the NFET or PFET devices are on, the driver output impedance will be in the range of 50 Ohms (or slightly higher/lower). The EDA simulator will probably not allow this unless the Model_type is set to 3-state. Greg Edlund Senior Engineer Signal Integrity and System Timing IBM Systems & Technology Group 3605 Hwy. 52 N Bldg 050-3 Rochester, MN 55901 From: Girija V Chougala To: Gregory R Edlund/Rochester/IBM@IBMUS Cc: "ibis-users@eda.org" , "owner-ibis-users@eda.org" Date: 06/24/2013 09:18 AM Subject: RE: [IBIS-Users] IBIS query Sent by: owner-ibis-users@eda.org Greg, IBIS model is already done. This is the question from the customer. I am not able to understand what he means telling that he needs to simulate data lines in which ibis model need to be tri stated. Regards, Girija From: owner-ibis-users@eda.org [mailto:owner-ibis-users@eda.org] On Behalf Of Gregory R Edlund Sent: Monday, June 24, 2013 6:34 PM To: Girija V Chougala Cc: ibis-users@eda.org; owner-ibis-users@eda.org Subject: Re: [IBIS-Users] IBIS query Girija, IBIS uses the following syntax to identify a tri-state model: Model_type 3-state Are you making a new IBIS model or using one that's already made? The IBIS community has free tools available for making IBIS models. If you are new to IBIS, I recommend reading the original IBIS 1.1 specification and the Cookbook. http://www.eda.org/ibis/ver1.1/ver1_1.ibs http://www.eda.org/ibis/tools/ Greg Edlund Senior Engineer Signal Integrity and System Timing IBM Systems & Technology Group 3605 Hwy. 52 N Bldg 050-3 Rochester, MN 55901 Inactive hide details for Girija V Chougala ---06/24/2013 02:11:00 AM---Hi, Please guide me in the following query which I got Girija V Chougala - ---06/24/2013 02:11:00 AM---Hi, Please guide me in the following query which I got from one of my customer, From: Girija V Chougala To: "ibis-users@eda.org" Date: 06/24/2013 02:11 AM Subject: [IBIS-Users] IBIS query Sent by: owner-ibis-users@eda.org Hi, Please guide me in the following query which I got from one of my customer, Question: How i can assign a tri state model? I need to simulate a local bus data line in which ibis model is a member which need to be tri stated. Please let me know what need to be done and what is he asking. I appreciate quick response. Regards, Girija This message and any attachments may contain Cypress (or its subsidiaries) confidential information. If it has been received in error, please advise the sender and immediately delete this message. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. This message and any attachments may contain Cypress (or its subsidiaries) confidential information. If it has been received in error, please advise the sender and immediately delete this message. - -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - --=20 This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. - --1__=09BBF107DFDCF34A8f9e8a93df938690918c09BBF107DFDCF34A Content-type: text/html; charset=US-ASCII Content-Disposition: inline Content-transfer-encoding: quoted-printable

Girija,

He means that the driver must not be p= ulling the net high or low.  If the driver is a standard CMOS push-pul= l driver, that means both the NFET and the PFET devices must be off.  = In other words, the driver is in a high-impedance state.  If either th= e NFET or PFET devices are on, the driver output impedance will be in the r= ange of 50 Ohms (or slightly higher/lower).

The EDA simulator will probably not al= low this unless the Model_type is set to 3-state.

Greg Edlund
Senior Engineer
Signal Integrity and System Timing
IBM Systems & Technology Group
3605 Hwy. 52 N  Bldg 050-3
Rochester, MN 55901



3D"InactiveGirij= a V Chougala ---06/24/2013 09:18:40 AM---Greg, IBIS model is already done. = This is the question from the customer. I am not able to understan
From: Girija V Chougala <gvch@cypress.com>
To: Gregory R Edlund/Rochester/IBM@IBMUS
Cc: "ibis-users@eda.org" <ibis-users@e= da.org>, "owner-ibis-users@eda.org" <owner-ibis-users@eda.o= rg>
Date: 06/24/2013 09:18 AM
Subject: RE: [IBIS-Users] IBIS query
Sent by: owner-ibis-users@eda.org




Greg,
IBIS model is already d= one. This is the question from the customer. I am not able to understand wh= at he means telling that he needs to simulate data lines in which ibis mode= l need to be tri stated.
Regards,
Girija
 
From: owner-ibis-users@eda.org [mailto:owner-ibis-user= s@eda.org] On Behalf Of Gregory R Edlund
Sent: Monday, June 24, 201= 3 6:34 PM
To: Girija V Chougala
Cc: ibis-users@eda.org; ow= ner-ibis-users@eda.org
Subject: Re: [IBIS-Users] = IBIS query
 

Girija,

IBIS uses the following syntax to identify a tri-state model:

Model_type      3-state

Are you making a new IBIS model or using one that's already made?  The= IBIS community has free tools available for making IBIS models.  If y= ou are new to IBIS, I recommend reading the original IBIS 1.1 specification= and the Cookbook.

http://www.eda.org/ibis/ver1.1/v= er1_1.ibs

http://www.eda.org/ibis/tools/

Greg Edlund
Senior Engineer
Signal Integrity and System Timing
IBM Systems & Technology Group
3605 Hwy. 52 N  Bldg 050-3
Rochester, MN 55901



3D"InactiveGirija V Chougal= a ---06/24/2013 02:11:00 AM---Hi, Please guide me in the following query wh= ich I got from one of my customer,

From: Girija V Chougala <<= a href=3D"mailto:gvch@cypress.com">gvch@cypress.com>
To: "ibi= s-users@eda.org" <ibis-users@eda.org>
Date: 06/24/2013 02:11 AM
Subject: [IBIS-Users] IBIS query
Sent by: owner-ibis-users@eda.org





Hi,
Please guide me in the following query which I got from one of my customer,=
Question: How i can assign a tri state model? I need to simulate a local bu= s data line in which ibis model is a member which need to be tri stated.

Please let me know what need to be done and what is he asking.
I appreciate quick response.

Regards,
Girija 

This message and any attachmen= ts may contain Cypress (or its subsidiaries) confidential information. If i= t has been received in error, please advise the sender and immediately dele= te this message.
- --
This message has been scanned for viruses and
dangerous content by MailScanner= , and is
believed to be clean.


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This message has been scanned for viruses and
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believed to be clean.

This message and any attachments may con= tain Cypress (or its subsidiaries) confidential information. If it has been= received in error, please advise the sender and immediately delete this me= ssage.
- --
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.


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